d1_pac/ce_ns/
ce_esr.rs

1#[doc = "Register `ce_esr` reader"]
2pub type R = crate::R<CE_ESR_SPEC>;
3#[doc = "Register `ce_esr` writer"]
4pub type W = crate::W<CE_ESR_SPEC>;
5#[doc = "Field `task_channel_error_type[0-3]` reader - Task Channel Error Type"]
6pub type TASK_CHANNEL_ERROR_TYPE_R = crate::FieldReader<TASK_CHANNEL_ERROR_TYPE_A>;
7#[doc = "Task Channel Error Type\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9#[repr(u8)]
10pub enum TASK_CHANNEL_ERROR_TYPE_A {
11    #[doc = "1: Algorithm not support"]
12    ALGORITHM_NOT_SUPPORT = 1,
13    #[doc = "2: Data length error"]
14    DATA_LENGTH_ERROR = 2,
15    #[doc = "4: keysram access error for AES"]
16    KEYSRAM_ACCESS_ERROR = 4,
17}
18impl From<TASK_CHANNEL_ERROR_TYPE_A> for u8 {
19    #[inline(always)]
20    fn from(variant: TASK_CHANNEL_ERROR_TYPE_A) -> Self {
21        variant as _
22    }
23}
24impl crate::FieldSpec for TASK_CHANNEL_ERROR_TYPE_A {
25    type Ux = u8;
26}
27impl TASK_CHANNEL_ERROR_TYPE_R {
28    #[doc = "Get enumerated values variant"]
29    #[inline(always)]
30    pub const fn variant(&self) -> Option<TASK_CHANNEL_ERROR_TYPE_A> {
31        match self.bits {
32            1 => Some(TASK_CHANNEL_ERROR_TYPE_A::ALGORITHM_NOT_SUPPORT),
33            2 => Some(TASK_CHANNEL_ERROR_TYPE_A::DATA_LENGTH_ERROR),
34            4 => Some(TASK_CHANNEL_ERROR_TYPE_A::KEYSRAM_ACCESS_ERROR),
35            _ => None,
36        }
37    }
38    #[doc = "Algorithm not support"]
39    #[inline(always)]
40    pub fn is_algorithm_not_support(&self) -> bool {
41        *self == TASK_CHANNEL_ERROR_TYPE_A::ALGORITHM_NOT_SUPPORT
42    }
43    #[doc = "Data length error"]
44    #[inline(always)]
45    pub fn is_data_length_error(&self) -> bool {
46        *self == TASK_CHANNEL_ERROR_TYPE_A::DATA_LENGTH_ERROR
47    }
48    #[doc = "keysram access error for AES"]
49    #[inline(always)]
50    pub fn is_keysram_access_error(&self) -> bool {
51        *self == TASK_CHANNEL_ERROR_TYPE_A::KEYSRAM_ACCESS_ERROR
52    }
53}
54#[doc = "Field `task_channel_error_type[0-3]` writer - Task Channel Error Type"]
55pub type TASK_CHANNEL_ERROR_TYPE_W<'a, REG> =
56    crate::FieldWriter<'a, REG, 4, TASK_CHANNEL_ERROR_TYPE_A>;
57impl<'a, REG> TASK_CHANNEL_ERROR_TYPE_W<'a, REG>
58where
59    REG: crate::Writable + crate::RegisterSpec,
60    REG::Ux: From<u8>,
61{
62    #[doc = "Algorithm not support"]
63    #[inline(always)]
64    pub fn algorithm_not_support(self) -> &'a mut crate::W<REG> {
65        self.variant(TASK_CHANNEL_ERROR_TYPE_A::ALGORITHM_NOT_SUPPORT)
66    }
67    #[doc = "Data length error"]
68    #[inline(always)]
69    pub fn data_length_error(self) -> &'a mut crate::W<REG> {
70        self.variant(TASK_CHANNEL_ERROR_TYPE_A::DATA_LENGTH_ERROR)
71    }
72    #[doc = "keysram access error for AES"]
73    #[inline(always)]
74    pub fn keysram_access_error(self) -> &'a mut crate::W<REG> {
75        self.variant(TASK_CHANNEL_ERROR_TYPE_A::KEYSRAM_ACCESS_ERROR)
76    }
77}
78impl R {
79    #[doc = "Task Channel Error Type\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `task_channel0_error_type` field"]
80    #[inline(always)]
81    pub fn task_channel_error_type(&self, n: u8) -> TASK_CHANNEL_ERROR_TYPE_R {
82        #[allow(clippy::no_effect)]
83        [(); 4][n as usize];
84        TASK_CHANNEL_ERROR_TYPE_R::new(((self.bits >> (n * 4)) & 0x0f) as u8)
85    }
86    #[doc = "Bits 0:3 - Task Channel Error Type"]
87    #[inline(always)]
88    pub fn task_channel0_error_type(&self) -> TASK_CHANNEL_ERROR_TYPE_R {
89        TASK_CHANNEL_ERROR_TYPE_R::new((self.bits & 0x0f) as u8)
90    }
91    #[doc = "Bits 4:7 - Task Channel Error Type"]
92    #[inline(always)]
93    pub fn task_channel1_error_type(&self) -> TASK_CHANNEL_ERROR_TYPE_R {
94        TASK_CHANNEL_ERROR_TYPE_R::new(((self.bits >> 4) & 0x0f) as u8)
95    }
96    #[doc = "Bits 8:11 - Task Channel Error Type"]
97    #[inline(always)]
98    pub fn task_channel2_error_type(&self) -> TASK_CHANNEL_ERROR_TYPE_R {
99        TASK_CHANNEL_ERROR_TYPE_R::new(((self.bits >> 8) & 0x0f) as u8)
100    }
101    #[doc = "Bits 12:15 - Task Channel Error Type"]
102    #[inline(always)]
103    pub fn task_channel3_error_type(&self) -> TASK_CHANNEL_ERROR_TYPE_R {
104        TASK_CHANNEL_ERROR_TYPE_R::new(((self.bits >> 12) & 0x0f) as u8)
105    }
106}
107impl W {
108    #[doc = "Task Channel Error Type\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `task_channel0_error_type` field"]
109    #[inline(always)]
110    #[must_use]
111    pub fn task_channel_error_type(&mut self, n: u8) -> TASK_CHANNEL_ERROR_TYPE_W<CE_ESR_SPEC> {
112        #[allow(clippy::no_effect)]
113        [(); 4][n as usize];
114        TASK_CHANNEL_ERROR_TYPE_W::new(self, n * 4)
115    }
116    #[doc = "Bits 0:3 - Task Channel Error Type"]
117    #[inline(always)]
118    #[must_use]
119    pub fn task_channel0_error_type(&mut self) -> TASK_CHANNEL_ERROR_TYPE_W<CE_ESR_SPEC> {
120        TASK_CHANNEL_ERROR_TYPE_W::new(self, 0)
121    }
122    #[doc = "Bits 4:7 - Task Channel Error Type"]
123    #[inline(always)]
124    #[must_use]
125    pub fn task_channel1_error_type(&mut self) -> TASK_CHANNEL_ERROR_TYPE_W<CE_ESR_SPEC> {
126        TASK_CHANNEL_ERROR_TYPE_W::new(self, 4)
127    }
128    #[doc = "Bits 8:11 - Task Channel Error Type"]
129    #[inline(always)]
130    #[must_use]
131    pub fn task_channel2_error_type(&mut self) -> TASK_CHANNEL_ERROR_TYPE_W<CE_ESR_SPEC> {
132        TASK_CHANNEL_ERROR_TYPE_W::new(self, 8)
133    }
134    #[doc = "Bits 12:15 - Task Channel Error Type"]
135    #[inline(always)]
136    #[must_use]
137    pub fn task_channel3_error_type(&mut self) -> TASK_CHANNEL_ERROR_TYPE_W<CE_ESR_SPEC> {
138        TASK_CHANNEL_ERROR_TYPE_W::new(self, 12)
139    }
140    #[doc = r" Writes raw bits to the register."]
141    #[doc = r""]
142    #[doc = r" # Safety"]
143    #[doc = r""]
144    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
145    #[inline(always)]
146    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
147        self.bits = bits;
148        self
149    }
150}
151#[doc = "Error Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ce_esr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ce_esr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
152pub struct CE_ESR_SPEC;
153impl crate::RegisterSpec for CE_ESR_SPEC {
154    type Ux = u32;
155}
156#[doc = "`read()` method returns [`ce_esr::R`](R) reader structure"]
157impl crate::Readable for CE_ESR_SPEC {}
158#[doc = "`write(|w| ..)` method takes [`ce_esr::W`](W) writer structure"]
159impl crate::Writable for CE_ESR_SPEC {
160    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
161    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0x0f;
162}
163#[doc = "`reset()` method sets ce_esr to value 0"]
164impl crate::Resettable for CE_ESR_SPEC {
165    const RESET_VALUE: Self::Ux = 0;
166}
d1_pac/ce_ns/ce_esr.rs

d1_pac/ce_ns/
ce_esr.rs
