d1_pac/ccu/
fre_det_ctrl.rs

1#[doc = "Register `fre_det_ctrl` reader"]
2pub type R = crate::R<FRE_DET_CTRL_SPEC>;
3#[doc = "Register `fre_det_ctrl` writer"]
4pub type W = crate::W<FRE_DET_CTRL_SPEC>;
5#[doc = "Field `fre_det_fun_en` reader - Frequence Detect Function Enable"]
6pub type FRE_DET_FUN_EN_R = crate::BitReader<FRE_DET_FUN_EN_A>;
7#[doc = "Frequence Detect Function Enable\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum FRE_DET_FUN_EN_A {
10    #[doc = "0: `0`"]
11    DISABLE = 0,
12    #[doc = "1: `1`"]
13    ENABLE = 1,
14}
15impl From<FRE_DET_FUN_EN_A> for bool {
16    #[inline(always)]
17    fn from(variant: FRE_DET_FUN_EN_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl FRE_DET_FUN_EN_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> FRE_DET_FUN_EN_A {
25        match self.bits {
26            false => FRE_DET_FUN_EN_A::DISABLE,
27            true => FRE_DET_FUN_EN_A::ENABLE,
28        }
29    }
30    #[doc = "`0`"]
31    #[inline(always)]
32    pub fn is_disable(&self) -> bool {
33        *self == FRE_DET_FUN_EN_A::DISABLE
34    }
35    #[doc = "`1`"]
36    #[inline(always)]
37    pub fn is_enable(&self) -> bool {
38        *self == FRE_DET_FUN_EN_A::ENABLE
39    }
40}
41#[doc = "Field `fre_det_fun_en` writer - Frequence Detect Function Enable"]
42pub type FRE_DET_FUN_EN_W<'a, REG> = crate::BitWriter<'a, REG, FRE_DET_FUN_EN_A>;
43impl<'a, REG> FRE_DET_FUN_EN_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "`0`"]
48    #[inline(always)]
49    pub fn disable(self) -> &'a mut crate::W<REG> {
50        self.variant(FRE_DET_FUN_EN_A::DISABLE)
51    }
52    #[doc = "`1`"]
53    #[inline(always)]
54    pub fn enable(self) -> &'a mut crate::W<REG> {
55        self.variant(FRE_DET_FUN_EN_A::ENABLE)
56    }
57}
58#[doc = "Field `fre_det_irq_en` reader - Frequence Detect IRQ Enable"]
59pub type FRE_DET_IRQ_EN_R = crate::BitReader<FRE_DET_IRQ_EN_A>;
60#[doc = "Frequence Detect IRQ Enable\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum FRE_DET_IRQ_EN_A {
63    #[doc = "0: `0`"]
64    DISABLE = 0,
65    #[doc = "1: `1`"]
66    ENABLE = 1,
67}
68impl From<FRE_DET_IRQ_EN_A> for bool {
69    #[inline(always)]
70    fn from(variant: FRE_DET_IRQ_EN_A) -> Self {
71        variant as u8 != 0
72    }
73}
74impl FRE_DET_IRQ_EN_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> FRE_DET_IRQ_EN_A {
78        match self.bits {
79            false => FRE_DET_IRQ_EN_A::DISABLE,
80            true => FRE_DET_IRQ_EN_A::ENABLE,
81        }
82    }
83    #[doc = "`0`"]
84    #[inline(always)]
85    pub fn is_disable(&self) -> bool {
86        *self == FRE_DET_IRQ_EN_A::DISABLE
87    }
88    #[doc = "`1`"]
89    #[inline(always)]
90    pub fn is_enable(&self) -> bool {
91        *self == FRE_DET_IRQ_EN_A::ENABLE
92    }
93}
94#[doc = "Field `fre_det_irq_en` writer - Frequence Detect IRQ Enable"]
95pub type FRE_DET_IRQ_EN_W<'a, REG> = crate::BitWriter<'a, REG, FRE_DET_IRQ_EN_A>;
96impl<'a, REG> FRE_DET_IRQ_EN_W<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "`0`"]
101    #[inline(always)]
102    pub fn disable(self) -> &'a mut crate::W<REG> {
103        self.variant(FRE_DET_IRQ_EN_A::DISABLE)
104    }
105    #[doc = "`1`"]
106    #[inline(always)]
107    pub fn enable(self) -> &'a mut crate::W<REG> {
108        self.variant(FRE_DET_IRQ_EN_A::ENABLE)
109    }
110}
111#[doc = "Field `det_time` reader - Detect Time"]
112pub type DET_TIME_R = crate::FieldReader;
113#[doc = "Field `det_time` writer - Detect Time"]
114pub type DET_TIME_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
115#[doc = "Field `error_flag` reader - Error Flag"]
116pub type ERROR_FLAG_R = crate::BitReader<ERROR_FLAG_A>;
117#[doc = "Error Flag\n\nValue on reset: 0"]
118#[derive(Clone, Copy, Debug, PartialEq, Eq)]
119pub enum ERROR_FLAG_A {
120    #[doc = "0: `0`"]
121    W0C = 0,
122    #[doc = "1: `1`"]
123    ERROR = 1,
124}
125impl From<ERROR_FLAG_A> for bool {
126    #[inline(always)]
127    fn from(variant: ERROR_FLAG_A) -> Self {
128        variant as u8 != 0
129    }
130}
131impl ERROR_FLAG_R {
132    #[doc = "Get enumerated values variant"]
133    #[inline(always)]
134    pub const fn variant(&self) -> ERROR_FLAG_A {
135        match self.bits {
136            false => ERROR_FLAG_A::W0C,
137            true => ERROR_FLAG_A::ERROR,
138        }
139    }
140    #[doc = "`0`"]
141    #[inline(always)]
142    pub fn is_w0c(&self) -> bool {
143        *self == ERROR_FLAG_A::W0C
144    }
145    #[doc = "`1`"]
146    #[inline(always)]
147    pub fn is_error(&self) -> bool {
148        *self == ERROR_FLAG_A::ERROR
149    }
150}
151#[doc = "Field `error_flag` writer - Error Flag"]
152pub type ERROR_FLAG_W<'a, REG> = crate::BitWriter0C<'a, REG, ERROR_FLAG_A>;
153impl<'a, REG> ERROR_FLAG_W<'a, REG>
154where
155    REG: crate::Writable + crate::RegisterSpec,
156{
157    #[doc = "`0`"]
158    #[inline(always)]
159    pub fn w0c(self) -> &'a mut crate::W<REG> {
160        self.variant(ERROR_FLAG_A::W0C)
161    }
162    #[doc = "`1`"]
163    #[inline(always)]
164    pub fn error(self) -> &'a mut crate::W<REG> {
165        self.variant(ERROR_FLAG_A::ERROR)
166    }
167}
168impl R {
169    #[doc = "Bit 0 - Frequence Detect Function Enable"]
170    #[inline(always)]
171    pub fn fre_det_fun_en(&self) -> FRE_DET_FUN_EN_R {
172        FRE_DET_FUN_EN_R::new((self.bits & 1) != 0)
173    }
174    #[doc = "Bit 1 - Frequence Detect IRQ Enable"]
175    #[inline(always)]
176    pub fn fre_det_irq_en(&self) -> FRE_DET_IRQ_EN_R {
177        FRE_DET_IRQ_EN_R::new(((self.bits >> 1) & 1) != 0)
178    }
179    #[doc = "Bits 4:8 - Detect Time"]
180    #[inline(always)]
181    pub fn det_time(&self) -> DET_TIME_R {
182        DET_TIME_R::new(((self.bits >> 4) & 0x1f) as u8)
183    }
184    #[doc = "Bit 31 - Error Flag"]
185    #[inline(always)]
186    pub fn error_flag(&self) -> ERROR_FLAG_R {
187        ERROR_FLAG_R::new(((self.bits >> 31) & 1) != 0)
188    }
189}
190impl W {
191    #[doc = "Bit 0 - Frequence Detect Function Enable"]
192    #[inline(always)]
193    #[must_use]
194    pub fn fre_det_fun_en(&mut self) -> FRE_DET_FUN_EN_W<FRE_DET_CTRL_SPEC> {
195        FRE_DET_FUN_EN_W::new(self, 0)
196    }
197    #[doc = "Bit 1 - Frequence Detect IRQ Enable"]
198    #[inline(always)]
199    #[must_use]
200    pub fn fre_det_irq_en(&mut self) -> FRE_DET_IRQ_EN_W<FRE_DET_CTRL_SPEC> {
201        FRE_DET_IRQ_EN_W::new(self, 1)
202    }
203    #[doc = "Bits 4:8 - Detect Time"]
204    #[inline(always)]
205    #[must_use]
206    pub fn det_time(&mut self) -> DET_TIME_W<FRE_DET_CTRL_SPEC> {
207        DET_TIME_W::new(self, 4)
208    }
209    #[doc = "Bit 31 - Error Flag"]
210    #[inline(always)]
211    #[must_use]
212    pub fn error_flag(&mut self) -> ERROR_FLAG_W<FRE_DET_CTRL_SPEC> {
213        ERROR_FLAG_W::new(self, 31)
214    }
215    #[doc = r" Writes raw bits to the register."]
216    #[doc = r""]
217    #[doc = r" # Safety"]
218    #[doc = r""]
219    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
220    #[inline(always)]
221    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
222        self.bits = bits;
223        self
224    }
225}
226#[doc = "Frequency Detect Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`fre_det_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`fre_det_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
227pub struct FRE_DET_CTRL_SPEC;
228impl crate::RegisterSpec for FRE_DET_CTRL_SPEC {
229    type Ux = u32;
230}
231#[doc = "`read()` method returns [`fre_det_ctrl::R`](R) reader structure"]
232impl crate::Readable for FRE_DET_CTRL_SPEC {}
233#[doc = "`write(|w| ..)` method takes [`fre_det_ctrl::W`](W) writer structure"]
234impl crate::Writable for FRE_DET_CTRL_SPEC {
235    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0x8000_0000;
236    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
237}
238#[doc = "`reset()` method sets fre_det_ctrl to value 0"]
239impl crate::Resettable for FRE_DET_CTRL_SPEC {
240    const RESET_VALUE: Self::Ux = 0;
241}
d1_pac/ccu/fre_det_ctrl.rs

d1_pac/ccu/
fre_det_ctrl.rs
