d1_pac/ccu/
dsp_bgr.rs

1#[doc = "Register `dsp_bgr` reader"]
2pub type R = crate::R<DSP_BGR_SPEC>;
3#[doc = "Register `dsp_bgr` writer"]
4pub type W = crate::W<DSP_BGR_SPEC>;
5#[doc = "Field `cfg_gating` reader - Gating Clock"]
6pub type CFG_GATING_R = crate::BitReader<CFG_GATING_A>;
7#[doc = "Gating Clock\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum CFG_GATING_A {
10    #[doc = "0: `0`"]
11    MASK = 0,
12    #[doc = "1: `1`"]
13    PASS = 1,
14}
15impl From<CFG_GATING_A> for bool {
16    #[inline(always)]
17    fn from(variant: CFG_GATING_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl CFG_GATING_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> CFG_GATING_A {
25        match self.bits {
26            false => CFG_GATING_A::MASK,
27            true => CFG_GATING_A::PASS,
28        }
29    }
30    #[doc = "`0`"]
31    #[inline(always)]
32    pub fn is_mask(&self) -> bool {
33        *self == CFG_GATING_A::MASK
34    }
35    #[doc = "`1`"]
36    #[inline(always)]
37    pub fn is_pass(&self) -> bool {
38        *self == CFG_GATING_A::PASS
39    }
40}
41#[doc = "Field `cfg_gating` writer - Gating Clock"]
42pub type CFG_GATING_W<'a, REG> = crate::BitWriter<'a, REG, CFG_GATING_A>;
43impl<'a, REG> CFG_GATING_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "`0`"]
48    #[inline(always)]
49    pub fn mask(self) -> &'a mut crate::W<REG> {
50        self.variant(CFG_GATING_A::MASK)
51    }
52    #[doc = "`1`"]
53    #[inline(always)]
54    pub fn pass(self) -> &'a mut crate::W<REG> {
55        self.variant(CFG_GATING_A::PASS)
56    }
57}
58#[doc = "Field `rst` reader - Reset"]
59pub type RST_R = crate::BitReader<RST_A>;
60#[doc = "Reset\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum RST_A {
63    #[doc = "0: `0`"]
64    ASSERT = 0,
65    #[doc = "1: `1`"]
66    DEASSERT = 1,
67}
68impl From<RST_A> for bool {
69    #[inline(always)]
70    fn from(variant: RST_A) -> Self {
71        variant as u8 != 0
72    }
73}
74impl RST_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> RST_A {
78        match self.bits {
79            false => RST_A::ASSERT,
80            true => RST_A::DEASSERT,
81        }
82    }
83    #[doc = "`0`"]
84    #[inline(always)]
85    pub fn is_assert(&self) -> bool {
86        *self == RST_A::ASSERT
87    }
88    #[doc = "`1`"]
89    #[inline(always)]
90    pub fn is_deassert(&self) -> bool {
91        *self == RST_A::DEASSERT
92    }
93}
94#[doc = "Field `rst` writer - Reset"]
95pub type RST_W<'a, REG> = crate::BitWriter<'a, REG, RST_A>;
96impl<'a, REG> RST_W<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "`0`"]
101    #[inline(always)]
102    pub fn assert(self) -> &'a mut crate::W<REG> {
103        self.variant(RST_A::ASSERT)
104    }
105    #[doc = "`1`"]
106    #[inline(always)]
107    pub fn deassert(self) -> &'a mut crate::W<REG> {
108        self.variant(RST_A::DEASSERT)
109    }
110}
111#[doc = "Field `cfg_rst` reader - Reset"]
112pub type CFG_RST_R = crate::BitReader<CFG_RST_A>;
113#[doc = "Reset\n\nValue on reset: 0"]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115pub enum CFG_RST_A {
116    #[doc = "0: `0`"]
117    ASSERT = 0,
118    #[doc = "1: `1`"]
119    DEASSERT = 1,
120}
121impl From<CFG_RST_A> for bool {
122    #[inline(always)]
123    fn from(variant: CFG_RST_A) -> Self {
124        variant as u8 != 0
125    }
126}
127impl CFG_RST_R {
128    #[doc = "Get enumerated values variant"]
129    #[inline(always)]
130    pub const fn variant(&self) -> CFG_RST_A {
131        match self.bits {
132            false => CFG_RST_A::ASSERT,
133            true => CFG_RST_A::DEASSERT,
134        }
135    }
136    #[doc = "`0`"]
137    #[inline(always)]
138    pub fn is_assert(&self) -> bool {
139        *self == CFG_RST_A::ASSERT
140    }
141    #[doc = "`1`"]
142    #[inline(always)]
143    pub fn is_deassert(&self) -> bool {
144        *self == CFG_RST_A::DEASSERT
145    }
146}
147#[doc = "Field `cfg_rst` writer - Reset"]
148pub type CFG_RST_W<'a, REG> = crate::BitWriter<'a, REG, CFG_RST_A>;
149impl<'a, REG> CFG_RST_W<'a, REG>
150where
151    REG: crate::Writable + crate::RegisterSpec,
152{
153    #[doc = "`0`"]
154    #[inline(always)]
155    pub fn assert(self) -> &'a mut crate::W<REG> {
156        self.variant(CFG_RST_A::ASSERT)
157    }
158    #[doc = "`1`"]
159    #[inline(always)]
160    pub fn deassert(self) -> &'a mut crate::W<REG> {
161        self.variant(CFG_RST_A::DEASSERT)
162    }
163}
164#[doc = "Field `dbg_rst` reader - Reset"]
165pub type DBG_RST_R = crate::BitReader<DBG_RST_A>;
166#[doc = "Reset\n\nValue on reset: 0"]
167#[derive(Clone, Copy, Debug, PartialEq, Eq)]
168pub enum DBG_RST_A {
169    #[doc = "0: `0`"]
170    ASSERT = 0,
171    #[doc = "1: `1`"]
172    DEASSERT = 1,
173}
174impl From<DBG_RST_A> for bool {
175    #[inline(always)]
176    fn from(variant: DBG_RST_A) -> Self {
177        variant as u8 != 0
178    }
179}
180impl DBG_RST_R {
181    #[doc = "Get enumerated values variant"]
182    #[inline(always)]
183    pub const fn variant(&self) -> DBG_RST_A {
184        match self.bits {
185            false => DBG_RST_A::ASSERT,
186            true => DBG_RST_A::DEASSERT,
187        }
188    }
189    #[doc = "`0`"]
190    #[inline(always)]
191    pub fn is_assert(&self) -> bool {
192        *self == DBG_RST_A::ASSERT
193    }
194    #[doc = "`1`"]
195    #[inline(always)]
196    pub fn is_deassert(&self) -> bool {
197        *self == DBG_RST_A::DEASSERT
198    }
199}
200#[doc = "Field `dbg_rst` writer - Reset"]
201pub type DBG_RST_W<'a, REG> = crate::BitWriter<'a, REG, DBG_RST_A>;
202impl<'a, REG> DBG_RST_W<'a, REG>
203where
204    REG: crate::Writable + crate::RegisterSpec,
205{
206    #[doc = "`0`"]
207    #[inline(always)]
208    pub fn assert(self) -> &'a mut crate::W<REG> {
209        self.variant(DBG_RST_A::ASSERT)
210    }
211    #[doc = "`1`"]
212    #[inline(always)]
213    pub fn deassert(self) -> &'a mut crate::W<REG> {
214        self.variant(DBG_RST_A::DEASSERT)
215    }
216}
217impl R {
218    #[doc = "Bit 1 - Gating Clock"]
219    #[inline(always)]
220    pub fn cfg_gating(&self) -> CFG_GATING_R {
221        CFG_GATING_R::new(((self.bits >> 1) & 1) != 0)
222    }
223    #[doc = "Bit 16 - Reset"]
224    #[inline(always)]
225    pub fn rst(&self) -> RST_R {
226        RST_R::new(((self.bits >> 16) & 1) != 0)
227    }
228    #[doc = "Bit 17 - Reset"]
229    #[inline(always)]
230    pub fn cfg_rst(&self) -> CFG_RST_R {
231        CFG_RST_R::new(((self.bits >> 17) & 1) != 0)
232    }
233    #[doc = "Bit 18 - Reset"]
234    #[inline(always)]
235    pub fn dbg_rst(&self) -> DBG_RST_R {
236        DBG_RST_R::new(((self.bits >> 18) & 1) != 0)
237    }
238}
239impl W {
240    #[doc = "Bit 1 - Gating Clock"]
241    #[inline(always)]
242    #[must_use]
243    pub fn cfg_gating(&mut self) -> CFG_GATING_W<DSP_BGR_SPEC> {
244        CFG_GATING_W::new(self, 1)
245    }
246    #[doc = "Bit 16 - Reset"]
247    #[inline(always)]
248    #[must_use]
249    pub fn rst(&mut self) -> RST_W<DSP_BGR_SPEC> {
250        RST_W::new(self, 16)
251    }
252    #[doc = "Bit 17 - Reset"]
253    #[inline(always)]
254    #[must_use]
255    pub fn cfg_rst(&mut self) -> CFG_RST_W<DSP_BGR_SPEC> {
256        CFG_RST_W::new(self, 17)
257    }
258    #[doc = "Bit 18 - Reset"]
259    #[inline(always)]
260    #[must_use]
261    pub fn dbg_rst(&mut self) -> DBG_RST_W<DSP_BGR_SPEC> {
262        DBG_RST_W::new(self, 18)
263    }
264    #[doc = r" Writes raw bits to the register."]
265    #[doc = r""]
266    #[doc = r" # Safety"]
267    #[doc = r""]
268    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
269    #[inline(always)]
270    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
271        self.bits = bits;
272        self
273    }
274}
275#[doc = "DSP Bus Gating Reset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dsp_bgr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dsp_bgr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
276pub struct DSP_BGR_SPEC;
277impl crate::RegisterSpec for DSP_BGR_SPEC {
278    type Ux = u32;
279}
280#[doc = "`read()` method returns [`dsp_bgr::R`](R) reader structure"]
281impl crate::Readable for DSP_BGR_SPEC {}
282#[doc = "`write(|w| ..)` method takes [`dsp_bgr::W`](W) writer structure"]
283impl crate::Writable for DSP_BGR_SPEC {
284    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
285    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
286}
287#[doc = "`reset()` method sets dsp_bgr to value 0"]
288impl crate::Resettable for DSP_BGR_SPEC {
289    const RESET_VALUE: Self::Ux = 0;
290}
d1_pac/ccu/dsp_bgr.rs

d1_pac/ccu/
dsp_bgr.rs
