d1_pac/audio_codec/
power.rs

1#[doc = "Register `power` reader"]
2pub type R = crate::R<POWER_SPEC>;
3#[doc = "Register `power` writer"]
4pub type W = crate::W<POWER_SPEC>;
5#[doc = "Field `bg_trim` reader - BG Output Voltage Trimming\n\nOnly low 6-bit is used. The BG output voltage range is from 0.7 V to 1.208 V"]
6pub type BG_TRIM_R = crate::FieldReader;
7#[doc = "Field `bg_trim` writer - BG Output Voltage Trimming\n\nOnly low 6-bit is used. The BG output voltage range is from 0.7 V to 1.208 V"]
8pub type BG_TRIM_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `hpldo_output_voltage` reader - HPLDO Output Voltage Control"]
10pub type HPLDO_OUTPUT_VOLTAGE_R = crate::FieldReader<HPLDO_OUTPUT_VOLTAGE_A>;
11#[doc = "HPLDO Output Voltage Control\n\nValue on reset: 0"]
12#[derive(Clone, Copy, Debug, PartialEq, Eq)]
13#[repr(u8)]
14pub enum HPLDO_OUTPUT_VOLTAGE_A {
15    #[doc = "0: `0`"]
16    V165 = 0,
17    #[doc = "1: `1`"]
18    V170 = 1,
19    #[doc = "2: `10`"]
20    V175 = 2,
21    #[doc = "3: `11`"]
22    V180 = 3,
23    #[doc = "4: `100`"]
24    V185 = 4,
25    #[doc = "5: `101`"]
26    V190 = 5,
27    #[doc = "6: `110`"]
28    V195 = 6,
29    #[doc = "7: `111`"]
30    V200 = 7,
31}
32impl From<HPLDO_OUTPUT_VOLTAGE_A> for u8 {
33    #[inline(always)]
34    fn from(variant: HPLDO_OUTPUT_VOLTAGE_A) -> Self {
35        variant as _
36    }
37}
38impl crate::FieldSpec for HPLDO_OUTPUT_VOLTAGE_A {
39    type Ux = u8;
40}
41impl HPLDO_OUTPUT_VOLTAGE_R {
42    #[doc = "Get enumerated values variant"]
43    #[inline(always)]
44    pub const fn variant(&self) -> HPLDO_OUTPUT_VOLTAGE_A {
45        match self.bits {
46            0 => HPLDO_OUTPUT_VOLTAGE_A::V165,
47            1 => HPLDO_OUTPUT_VOLTAGE_A::V170,
48            2 => HPLDO_OUTPUT_VOLTAGE_A::V175,
49            3 => HPLDO_OUTPUT_VOLTAGE_A::V180,
50            4 => HPLDO_OUTPUT_VOLTAGE_A::V185,
51            5 => HPLDO_OUTPUT_VOLTAGE_A::V190,
52            6 => HPLDO_OUTPUT_VOLTAGE_A::V195,
53            7 => HPLDO_OUTPUT_VOLTAGE_A::V200,
54            _ => unreachable!(),
55        }
56    }
57    #[doc = "`0`"]
58    #[inline(always)]
59    pub fn is_v165(&self) -> bool {
60        *self == HPLDO_OUTPUT_VOLTAGE_A::V165
61    }
62    #[doc = "`1`"]
63    #[inline(always)]
64    pub fn is_v170(&self) -> bool {
65        *self == HPLDO_OUTPUT_VOLTAGE_A::V170
66    }
67    #[doc = "`10`"]
68    #[inline(always)]
69    pub fn is_v175(&self) -> bool {
70        *self == HPLDO_OUTPUT_VOLTAGE_A::V175
71    }
72    #[doc = "`11`"]
73    #[inline(always)]
74    pub fn is_v180(&self) -> bool {
75        *self == HPLDO_OUTPUT_VOLTAGE_A::V180
76    }
77    #[doc = "`100`"]
78    #[inline(always)]
79    pub fn is_v185(&self) -> bool {
80        *self == HPLDO_OUTPUT_VOLTAGE_A::V185
81    }
82    #[doc = "`101`"]
83    #[inline(always)]
84    pub fn is_v190(&self) -> bool {
85        *self == HPLDO_OUTPUT_VOLTAGE_A::V190
86    }
87    #[doc = "`110`"]
88    #[inline(always)]
89    pub fn is_v195(&self) -> bool {
90        *self == HPLDO_OUTPUT_VOLTAGE_A::V195
91    }
92    #[doc = "`111`"]
93    #[inline(always)]
94    pub fn is_v200(&self) -> bool {
95        *self == HPLDO_OUTPUT_VOLTAGE_A::V200
96    }
97}
98#[doc = "Field `hpldo_output_voltage` writer - HPLDO Output Voltage Control"]
99pub type HPLDO_OUTPUT_VOLTAGE_W<'a, REG> =
100    crate::FieldWriterSafe<'a, REG, 3, HPLDO_OUTPUT_VOLTAGE_A>;
101impl<'a, REG> HPLDO_OUTPUT_VOLTAGE_W<'a, REG>
102where
103    REG: crate::Writable + crate::RegisterSpec,
104    REG::Ux: From<u8>,
105{
106    #[doc = "`0`"]
107    #[inline(always)]
108    pub fn v165(self) -> &'a mut crate::W<REG> {
109        self.variant(HPLDO_OUTPUT_VOLTAGE_A::V165)
110    }
111    #[doc = "`1`"]
112    #[inline(always)]
113    pub fn v170(self) -> &'a mut crate::W<REG> {
114        self.variant(HPLDO_OUTPUT_VOLTAGE_A::V170)
115    }
116    #[doc = "`10`"]
117    #[inline(always)]
118    pub fn v175(self) -> &'a mut crate::W<REG> {
119        self.variant(HPLDO_OUTPUT_VOLTAGE_A::V175)
120    }
121    #[doc = "`11`"]
122    #[inline(always)]
123    pub fn v180(self) -> &'a mut crate::W<REG> {
124        self.variant(HPLDO_OUTPUT_VOLTAGE_A::V180)
125    }
126    #[doc = "`100`"]
127    #[inline(always)]
128    pub fn v185(self) -> &'a mut crate::W<REG> {
129        self.variant(HPLDO_OUTPUT_VOLTAGE_A::V185)
130    }
131    #[doc = "`101`"]
132    #[inline(always)]
133    pub fn v190(self) -> &'a mut crate::W<REG> {
134        self.variant(HPLDO_OUTPUT_VOLTAGE_A::V190)
135    }
136    #[doc = "`110`"]
137    #[inline(always)]
138    pub fn v195(self) -> &'a mut crate::W<REG> {
139        self.variant(HPLDO_OUTPUT_VOLTAGE_A::V195)
140    }
141    #[doc = "`111`"]
142    #[inline(always)]
143    pub fn v200(self) -> &'a mut crate::W<REG> {
144        self.variant(HPLDO_OUTPUT_VOLTAGE_A::V200)
145    }
146}
147#[doc = "Field `aldo_output_voltage` reader - ALDO Output Voltage Control"]
148pub type ALDO_OUTPUT_VOLTAGE_R = crate::FieldReader<ALDO_OUTPUT_VOLTAGE_A>;
149#[doc = "ALDO Output Voltage Control\n\nValue on reset: 0"]
150#[derive(Clone, Copy, Debug, PartialEq, Eq)]
151#[repr(u8)]
152pub enum ALDO_OUTPUT_VOLTAGE_A {
153    #[doc = "0: `0`"]
154    V165 = 0,
155    #[doc = "1: `1`"]
156    V170 = 1,
157    #[doc = "2: `10`"]
158    V175 = 2,
159    #[doc = "3: `11`"]
160    V180 = 3,
161    #[doc = "4: `100`"]
162    V185 = 4,
163    #[doc = "5: `101`"]
164    V190 = 5,
165    #[doc = "6: `110`"]
166    V195 = 6,
167    #[doc = "7: `111`"]
168    V200 = 7,
169}
170impl From<ALDO_OUTPUT_VOLTAGE_A> for u8 {
171    #[inline(always)]
172    fn from(variant: ALDO_OUTPUT_VOLTAGE_A) -> Self {
173        variant as _
174    }
175}
176impl crate::FieldSpec for ALDO_OUTPUT_VOLTAGE_A {
177    type Ux = u8;
178}
179impl ALDO_OUTPUT_VOLTAGE_R {
180    #[doc = "Get enumerated values variant"]
181    #[inline(always)]
182    pub const fn variant(&self) -> ALDO_OUTPUT_VOLTAGE_A {
183        match self.bits {
184            0 => ALDO_OUTPUT_VOLTAGE_A::V165,
185            1 => ALDO_OUTPUT_VOLTAGE_A::V170,
186            2 => ALDO_OUTPUT_VOLTAGE_A::V175,
187            3 => ALDO_OUTPUT_VOLTAGE_A::V180,
188            4 => ALDO_OUTPUT_VOLTAGE_A::V185,
189            5 => ALDO_OUTPUT_VOLTAGE_A::V190,
190            6 => ALDO_OUTPUT_VOLTAGE_A::V195,
191            7 => ALDO_OUTPUT_VOLTAGE_A::V200,
192            _ => unreachable!(),
193        }
194    }
195    #[doc = "`0`"]
196    #[inline(always)]
197    pub fn is_v165(&self) -> bool {
198        *self == ALDO_OUTPUT_VOLTAGE_A::V165
199    }
200    #[doc = "`1`"]
201    #[inline(always)]
202    pub fn is_v170(&self) -> bool {
203        *self == ALDO_OUTPUT_VOLTAGE_A::V170
204    }
205    #[doc = "`10`"]
206    #[inline(always)]
207    pub fn is_v175(&self) -> bool {
208        *self == ALDO_OUTPUT_VOLTAGE_A::V175
209    }
210    #[doc = "`11`"]
211    #[inline(always)]
212    pub fn is_v180(&self) -> bool {
213        *self == ALDO_OUTPUT_VOLTAGE_A::V180
214    }
215    #[doc = "`100`"]
216    #[inline(always)]
217    pub fn is_v185(&self) -> bool {
218        *self == ALDO_OUTPUT_VOLTAGE_A::V185
219    }
220    #[doc = "`101`"]
221    #[inline(always)]
222    pub fn is_v190(&self) -> bool {
223        *self == ALDO_OUTPUT_VOLTAGE_A::V190
224    }
225    #[doc = "`110`"]
226    #[inline(always)]
227    pub fn is_v195(&self) -> bool {
228        *self == ALDO_OUTPUT_VOLTAGE_A::V195
229    }
230    #[doc = "`111`"]
231    #[inline(always)]
232    pub fn is_v200(&self) -> bool {
233        *self == ALDO_OUTPUT_VOLTAGE_A::V200
234    }
235}
236#[doc = "Field `aldo_output_voltage` writer - ALDO Output Voltage Control"]
237pub type ALDO_OUTPUT_VOLTAGE_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 3, ALDO_OUTPUT_VOLTAGE_A>;
238impl<'a, REG> ALDO_OUTPUT_VOLTAGE_W<'a, REG>
239where
240    REG: crate::Writable + crate::RegisterSpec,
241    REG::Ux: From<u8>,
242{
243    #[doc = "`0`"]
244    #[inline(always)]
245    pub fn v165(self) -> &'a mut crate::W<REG> {
246        self.variant(ALDO_OUTPUT_VOLTAGE_A::V165)
247    }
248    #[doc = "`1`"]
249    #[inline(always)]
250    pub fn v170(self) -> &'a mut crate::W<REG> {
251        self.variant(ALDO_OUTPUT_VOLTAGE_A::V170)
252    }
253    #[doc = "`10`"]
254    #[inline(always)]
255    pub fn v175(self) -> &'a mut crate::W<REG> {
256        self.variant(ALDO_OUTPUT_VOLTAGE_A::V175)
257    }
258    #[doc = "`11`"]
259    #[inline(always)]
260    pub fn v180(self) -> &'a mut crate::W<REG> {
261        self.variant(ALDO_OUTPUT_VOLTAGE_A::V180)
262    }
263    #[doc = "`100`"]
264    #[inline(always)]
265    pub fn v185(self) -> &'a mut crate::W<REG> {
266        self.variant(ALDO_OUTPUT_VOLTAGE_A::V185)
267    }
268    #[doc = "`101`"]
269    #[inline(always)]
270    pub fn v190(self) -> &'a mut crate::W<REG> {
271        self.variant(ALDO_OUTPUT_VOLTAGE_A::V190)
272    }
273    #[doc = "`110`"]
274    #[inline(always)]
275    pub fn v195(self) -> &'a mut crate::W<REG> {
276        self.variant(ALDO_OUTPUT_VOLTAGE_A::V195)
277    }
278    #[doc = "`111`"]
279    #[inline(always)]
280    pub fn v200(self) -> &'a mut crate::W<REG> {
281        self.variant(ALDO_OUTPUT_VOLTAGE_A::V200)
282    }
283}
284#[doc = "Field `avccpor` reader - AVCCPOR Monitor"]
285pub type AVCCPOR_R = crate::BitReader;
286#[doc = "Field `var1speedup_further_ctrl` reader - VRA1 Speedup Down Further Control In Adda Analog"]
287pub type VAR1SPEEDUP_FURTHER_CTRL_R = crate::BitReader<VAR1SPEEDUP_FURTHER_CTRL_A>;
288#[doc = "VRA1 Speedup Down Further Control In Adda Analog\n\nValue on reset: 0"]
289#[derive(Clone, Copy, Debug, PartialEq, Eq)]
290pub enum VAR1SPEEDUP_FURTHER_CTRL_A {
291    #[doc = "0: `0`"]
292    DIGITAL = 0,
293    #[doc = "1: `1`"]
294    MANUAL = 1,
295}
296impl From<VAR1SPEEDUP_FURTHER_CTRL_A> for bool {
297    #[inline(always)]
298    fn from(variant: VAR1SPEEDUP_FURTHER_CTRL_A) -> Self {
299        variant as u8 != 0
300    }
301}
302impl VAR1SPEEDUP_FURTHER_CTRL_R {
303    #[doc = "Get enumerated values variant"]
304    #[inline(always)]
305    pub const fn variant(&self) -> VAR1SPEEDUP_FURTHER_CTRL_A {
306        match self.bits {
307            false => VAR1SPEEDUP_FURTHER_CTRL_A::DIGITAL,
308            true => VAR1SPEEDUP_FURTHER_CTRL_A::MANUAL,
309        }
310    }
311    #[doc = "`0`"]
312    #[inline(always)]
313    pub fn is_digital(&self) -> bool {
314        *self == VAR1SPEEDUP_FURTHER_CTRL_A::DIGITAL
315    }
316    #[doc = "`1`"]
317    #[inline(always)]
318    pub fn is_manual(&self) -> bool {
319        *self == VAR1SPEEDUP_FURTHER_CTRL_A::MANUAL
320    }
321}
322#[doc = "Field `var1speedup_further_ctrl` writer - VRA1 Speedup Down Further Control In Adda Analog"]
323pub type VAR1SPEEDUP_FURTHER_CTRL_W<'a, REG> =
324    crate::BitWriter<'a, REG, VAR1SPEEDUP_FURTHER_CTRL_A>;
325impl<'a, REG> VAR1SPEEDUP_FURTHER_CTRL_W<'a, REG>
326where
327    REG: crate::Writable + crate::RegisterSpec,
328{
329    #[doc = "`0`"]
330    #[inline(always)]
331    pub fn digital(self) -> &'a mut crate::W<REG> {
332        self.variant(VAR1SPEEDUP_FURTHER_CTRL_A::DIGITAL)
333    }
334    #[doc = "`1`"]
335    #[inline(always)]
336    pub fn manual(self) -> &'a mut crate::W<REG> {
337        self.variant(VAR1SPEEDUP_FURTHER_CTRL_A::MANUAL)
338    }
339}
340#[doc = "Field `hpldo_en` reader - HPLDO Enable"]
341pub type HPLDO_EN_R = crate::BitReader<HPLDO_EN_A>;
342#[doc = "HPLDO Enable\n\nValue on reset: 0"]
343#[derive(Clone, Copy, Debug, PartialEq, Eq)]
344pub enum HPLDO_EN_A {
345    #[doc = "0: `0`"]
346    DISABLE = 0,
347    #[doc = "1: `1`"]
348    ENABLE = 1,
349}
350impl From<HPLDO_EN_A> for bool {
351    #[inline(always)]
352    fn from(variant: HPLDO_EN_A) -> Self {
353        variant as u8 != 0
354    }
355}
356impl HPLDO_EN_R {
357    #[doc = "Get enumerated values variant"]
358    #[inline(always)]
359    pub const fn variant(&self) -> HPLDO_EN_A {
360        match self.bits {
361            false => HPLDO_EN_A::DISABLE,
362            true => HPLDO_EN_A::ENABLE,
363        }
364    }
365    #[doc = "`0`"]
366    #[inline(always)]
367    pub fn is_disable(&self) -> bool {
368        *self == HPLDO_EN_A::DISABLE
369    }
370    #[doc = "`1`"]
371    #[inline(always)]
372    pub fn is_enable(&self) -> bool {
373        *self == HPLDO_EN_A::ENABLE
374    }
375}
376#[doc = "Field `hpldo_en` writer - HPLDO Enable"]
377pub type HPLDO_EN_W<'a, REG> = crate::BitWriter<'a, REG, HPLDO_EN_A>;
378impl<'a, REG> HPLDO_EN_W<'a, REG>
379where
380    REG: crate::Writable + crate::RegisterSpec,
381{
382    #[doc = "`0`"]
383    #[inline(always)]
384    pub fn disable(self) -> &'a mut crate::W<REG> {
385        self.variant(HPLDO_EN_A::DISABLE)
386    }
387    #[doc = "`1`"]
388    #[inline(always)]
389    pub fn enable(self) -> &'a mut crate::W<REG> {
390        self.variant(HPLDO_EN_A::ENABLE)
391    }
392}
393#[doc = "Field `aldo_en` reader - ALDO Enable"]
394pub type ALDO_EN_R = crate::BitReader<ALDO_EN_A>;
395#[doc = "ALDO Enable\n\nValue on reset: 0"]
396#[derive(Clone, Copy, Debug, PartialEq, Eq)]
397pub enum ALDO_EN_A {
398    #[doc = "0: `0`"]
399    DISABLE = 0,
400    #[doc = "1: `1`"]
401    ENABLE = 1,
402}
403impl From<ALDO_EN_A> for bool {
404    #[inline(always)]
405    fn from(variant: ALDO_EN_A) -> Self {
406        variant as u8 != 0
407    }
408}
409impl ALDO_EN_R {
410    #[doc = "Get enumerated values variant"]
411    #[inline(always)]
412    pub const fn variant(&self) -> ALDO_EN_A {
413        match self.bits {
414            false => ALDO_EN_A::DISABLE,
415            true => ALDO_EN_A::ENABLE,
416        }
417    }
418    #[doc = "`0`"]
419    #[inline(always)]
420    pub fn is_disable(&self) -> bool {
421        *self == ALDO_EN_A::DISABLE
422    }
423    #[doc = "`1`"]
424    #[inline(always)]
425    pub fn is_enable(&self) -> bool {
426        *self == ALDO_EN_A::ENABLE
427    }
428}
429#[doc = "Field `aldo_en` writer - ALDO Enable"]
430pub type ALDO_EN_W<'a, REG> = crate::BitWriter<'a, REG, ALDO_EN_A>;
431impl<'a, REG> ALDO_EN_W<'a, REG>
432where
433    REG: crate::Writable + crate::RegisterSpec,
434{
435    #[doc = "`0`"]
436    #[inline(always)]
437    pub fn disable(self) -> &'a mut crate::W<REG> {
438        self.variant(ALDO_EN_A::DISABLE)
439    }
440    #[doc = "`1`"]
441    #[inline(always)]
442    pub fn enable(self) -> &'a mut crate::W<REG> {
443        self.variant(ALDO_EN_A::ENABLE)
444    }
445}
446impl R {
447    #[doc = "Bits 0:7 - BG Output Voltage Trimming\n\nOnly low 6-bit is used. The BG output voltage range is from 0.7 V to 1.208 V"]
448    #[inline(always)]
449    pub fn bg_trim(&self) -> BG_TRIM_R {
450        BG_TRIM_R::new((self.bits & 0xff) as u8)
451    }
452    #[doc = "Bits 8:10 - HPLDO Output Voltage Control"]
453    #[inline(always)]
454    pub fn hpldo_output_voltage(&self) -> HPLDO_OUTPUT_VOLTAGE_R {
455        HPLDO_OUTPUT_VOLTAGE_R::new(((self.bits >> 8) & 7) as u8)
456    }
457    #[doc = "Bits 12:14 - ALDO Output Voltage Control"]
458    #[inline(always)]
459    pub fn aldo_output_voltage(&self) -> ALDO_OUTPUT_VOLTAGE_R {
460        ALDO_OUTPUT_VOLTAGE_R::new(((self.bits >> 12) & 7) as u8)
461    }
462    #[doc = "Bit 16 - AVCCPOR Monitor"]
463    #[inline(always)]
464    pub fn avccpor(&self) -> AVCCPOR_R {
465        AVCCPOR_R::new(((self.bits >> 16) & 1) != 0)
466    }
467    #[doc = "Bit 29 - VRA1 Speedup Down Further Control In Adda Analog"]
468    #[inline(always)]
469    pub fn var1speedup_further_ctrl(&self) -> VAR1SPEEDUP_FURTHER_CTRL_R {
470        VAR1SPEEDUP_FURTHER_CTRL_R::new(((self.bits >> 29) & 1) != 0)
471    }
472    #[doc = "Bit 30 - HPLDO Enable"]
473    #[inline(always)]
474    pub fn hpldo_en(&self) -> HPLDO_EN_R {
475        HPLDO_EN_R::new(((self.bits >> 30) & 1) != 0)
476    }
477    #[doc = "Bit 31 - ALDO Enable"]
478    #[inline(always)]
479    pub fn aldo_en(&self) -> ALDO_EN_R {
480        ALDO_EN_R::new(((self.bits >> 31) & 1) != 0)
481    }
482}
483impl W {
484    #[doc = "Bits 0:7 - BG Output Voltage Trimming\n\nOnly low 6-bit is used. The BG output voltage range is from 0.7 V to 1.208 V"]
485    #[inline(always)]
486    #[must_use]
487    pub fn bg_trim(&mut self) -> BG_TRIM_W<POWER_SPEC> {
488        BG_TRIM_W::new(self, 0)
489    }
490    #[doc = "Bits 8:10 - HPLDO Output Voltage Control"]
491    #[inline(always)]
492    #[must_use]
493    pub fn hpldo_output_voltage(&mut self) -> HPLDO_OUTPUT_VOLTAGE_W<POWER_SPEC> {
494        HPLDO_OUTPUT_VOLTAGE_W::new(self, 8)
495    }
496    #[doc = "Bits 12:14 - ALDO Output Voltage Control"]
497    #[inline(always)]
498    #[must_use]
499    pub fn aldo_output_voltage(&mut self) -> ALDO_OUTPUT_VOLTAGE_W<POWER_SPEC> {
500        ALDO_OUTPUT_VOLTAGE_W::new(self, 12)
501    }
502    #[doc = "Bit 29 - VRA1 Speedup Down Further Control In Adda Analog"]
503    #[inline(always)]
504    #[must_use]
505    pub fn var1speedup_further_ctrl(&mut self) -> VAR1SPEEDUP_FURTHER_CTRL_W<POWER_SPEC> {
506        VAR1SPEEDUP_FURTHER_CTRL_W::new(self, 29)
507    }
508    #[doc = "Bit 30 - HPLDO Enable"]
509    #[inline(always)]
510    #[must_use]
511    pub fn hpldo_en(&mut self) -> HPLDO_EN_W<POWER_SPEC> {
512        HPLDO_EN_W::new(self, 30)
513    }
514    #[doc = "Bit 31 - ALDO Enable"]
515    #[inline(always)]
516    #[must_use]
517    pub fn aldo_en(&mut self) -> ALDO_EN_W<POWER_SPEC> {
518        ALDO_EN_W::new(self, 31)
519    }
520    #[doc = r" Writes raw bits to the register."]
521    #[doc = r""]
522    #[doc = r" # Safety"]
523    #[doc = r""]
524    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
525    #[inline(always)]
526    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
527        self.bits = bits;
528        self
529    }
530}
531#[doc = "POWER Analog Control Register\n\nThe register is not controlled by the clock and reset of Audio Codec, only controlled by the clock and reset of system bus.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`power::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`power::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
532pub struct POWER_SPEC;
533impl crate::RegisterSpec for POWER_SPEC {
534    type Ux = u32;
535}
536#[doc = "`read()` method returns [`power::R`](R) reader structure"]
537impl crate::Readable for POWER_SPEC {}
538#[doc = "`write(|w| ..)` method takes [`power::W`](W) writer structure"]
539impl crate::Writable for POWER_SPEC {
540    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
541    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
542}
543#[doc = "`reset()` method sets power to value 0"]
544impl crate::Resettable for POWER_SPEC {
545    const RESET_VALUE: Self::Ux = 0;
546}
d1_pac/audio_codec/power.rs

d1_pac/audio_codec/
power.rs
