d1_pac/audio_codec/
dac_vol_ctrl.rs

1#[doc = "Register `dac_vol_ctrl` reader"]
2pub type R = crate::R<DAC_VOL_CTRL_SPEC>;
3#[doc = "Register `dac_vol_ctrl` writer"]
4pub type W = crate::W<DAC_VOL_CTRL_SPEC>;
5#[doc = "Field `dac_vol_r` reader - DAC right channel volum\n\n(-119.25 dB to 71.25 dB, 0.75 dB/Step)\n\n0x00: Mute\n\n0x01: -119.25 dB\n\n...\n\n0x9F = -0.75 dB\n\n0xA0 = 0 dB\n\n0xA1 = 0.75 dB\n\n...\n\n0xFF = 71.25 dBe"]
6pub type DAC_VOL_R_R = crate::FieldReader;
7#[doc = "Field `dac_vol_r` writer - DAC right channel volum\n\n(-119.25 dB to 71.25 dB, 0.75 dB/Step)\n\n0x00: Mute\n\n0x01: -119.25 dB\n\n...\n\n0x9F = -0.75 dB\n\n0xA0 = 0 dB\n\n0xA1 = 0.75 dB\n\n...\n\n0xFF = 71.25 dBe"]
8pub type DAC_VOL_R_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `dac_vol_l` reader - DAC left channel volum\n\n(-119.25 dB to 71.25 dB, 0.75 dB/Step)\n\n0x00: Mute\n\n0x01: -119.25 dB\n\n...\n\n0x9F = -0.75 dB\n\n0xA0 = 0 dB\n\n0xA1 = 0.75 dB\n\n...\n\n0xFF = 71.25 dBe"]
10pub type DAC_VOL_L_R = crate::FieldReader;
11#[doc = "Field `dac_vol_l` writer - DAC left channel volum\n\n(-119.25 dB to 71.25 dB, 0.75 dB/Step)\n\n0x00: Mute\n\n0x01: -119.25 dB\n\n...\n\n0x9F = -0.75 dB\n\n0xA0 = 0 dB\n\n0xA1 = 0.75 dB\n\n...\n\n0xFF = 71.25 dBe"]
12pub type DAC_VOL_L_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13#[doc = "Field `dac_vol_sel` reader - DAC Volume Control Selection Enable"]
14pub type DAC_VOL_SEL_R = crate::BitReader<DAC_VOL_SEL_A>;
15#[doc = "DAC Volume Control Selection Enable\n\nValue on reset: 0"]
16#[derive(Clone, Copy, Debug, PartialEq, Eq)]
17pub enum DAC_VOL_SEL_A {
18    #[doc = "0: `0`"]
19    DISABLE = 0,
20    #[doc = "1: `1`"]
21    ENABLE = 1,
22}
23impl From<DAC_VOL_SEL_A> for bool {
24    #[inline(always)]
25    fn from(variant: DAC_VOL_SEL_A) -> Self {
26        variant as u8 != 0
27    }
28}
29impl DAC_VOL_SEL_R {
30    #[doc = "Get enumerated values variant"]
31    #[inline(always)]
32    pub const fn variant(&self) -> DAC_VOL_SEL_A {
33        match self.bits {
34            false => DAC_VOL_SEL_A::DISABLE,
35            true => DAC_VOL_SEL_A::ENABLE,
36        }
37    }
38    #[doc = "`0`"]
39    #[inline(always)]
40    pub fn is_disable(&self) -> bool {
41        *self == DAC_VOL_SEL_A::DISABLE
42    }
43    #[doc = "`1`"]
44    #[inline(always)]
45    pub fn is_enable(&self) -> bool {
46        *self == DAC_VOL_SEL_A::ENABLE
47    }
48}
49#[doc = "Field `dac_vol_sel` writer - DAC Volume Control Selection Enable"]
50pub type DAC_VOL_SEL_W<'a, REG> = crate::BitWriter<'a, REG, DAC_VOL_SEL_A>;
51impl<'a, REG> DAC_VOL_SEL_W<'a, REG>
52where
53    REG: crate::Writable + crate::RegisterSpec,
54{
55    #[doc = "`0`"]
56    #[inline(always)]
57    pub fn disable(self) -> &'a mut crate::W<REG> {
58        self.variant(DAC_VOL_SEL_A::DISABLE)
59    }
60    #[doc = "`1`"]
61    #[inline(always)]
62    pub fn enable(self) -> &'a mut crate::W<REG> {
63        self.variant(DAC_VOL_SEL_A::ENABLE)
64    }
65}
66impl R {
67    #[doc = "Bits 0:7 - DAC right channel volum\n\n(-119.25 dB to 71.25 dB, 0.75 dB/Step)\n\n0x00: Mute\n\n0x01: -119.25 dB\n\n...\n\n0x9F = -0.75 dB\n\n0xA0 = 0 dB\n\n0xA1 = 0.75 dB\n\n...\n\n0xFF = 71.25 dBe"]
68    #[inline(always)]
69    pub fn dac_vol_r(&self) -> DAC_VOL_R_R {
70        DAC_VOL_R_R::new((self.bits & 0xff) as u8)
71    }
72    #[doc = "Bits 8:15 - DAC left channel volum\n\n(-119.25 dB to 71.25 dB, 0.75 dB/Step)\n\n0x00: Mute\n\n0x01: -119.25 dB\n\n...\n\n0x9F = -0.75 dB\n\n0xA0 = 0 dB\n\n0xA1 = 0.75 dB\n\n...\n\n0xFF = 71.25 dBe"]
73    #[inline(always)]
74    pub fn dac_vol_l(&self) -> DAC_VOL_L_R {
75        DAC_VOL_L_R::new(((self.bits >> 8) & 0xff) as u8)
76    }
77    #[doc = "Bit 16 - DAC Volume Control Selection Enable"]
78    #[inline(always)]
79    pub fn dac_vol_sel(&self) -> DAC_VOL_SEL_R {
80        DAC_VOL_SEL_R::new(((self.bits >> 16) & 1) != 0)
81    }
82}
83impl W {
84    #[doc = "Bits 0:7 - DAC right channel volum\n\n(-119.25 dB to 71.25 dB, 0.75 dB/Step)\n\n0x00: Mute\n\n0x01: -119.25 dB\n\n...\n\n0x9F = -0.75 dB\n\n0xA0 = 0 dB\n\n0xA1 = 0.75 dB\n\n...\n\n0xFF = 71.25 dBe"]
85    #[inline(always)]
86    #[must_use]
87    pub fn dac_vol_r(&mut self) -> DAC_VOL_R_W<DAC_VOL_CTRL_SPEC> {
88        DAC_VOL_R_W::new(self, 0)
89    }
90    #[doc = "Bits 8:15 - DAC left channel volum\n\n(-119.25 dB to 71.25 dB, 0.75 dB/Step)\n\n0x00: Mute\n\n0x01: -119.25 dB\n\n...\n\n0x9F = -0.75 dB\n\n0xA0 = 0 dB\n\n0xA1 = 0.75 dB\n\n...\n\n0xFF = 71.25 dBe"]
91    #[inline(always)]
92    #[must_use]
93    pub fn dac_vol_l(&mut self) -> DAC_VOL_L_W<DAC_VOL_CTRL_SPEC> {
94        DAC_VOL_L_W::new(self, 8)
95    }
96    #[doc = "Bit 16 - DAC Volume Control Selection Enable"]
97    #[inline(always)]
98    #[must_use]
99    pub fn dac_vol_sel(&mut self) -> DAC_VOL_SEL_W<DAC_VOL_CTRL_SPEC> {
100        DAC_VOL_SEL_W::new(self, 16)
101    }
102    #[doc = r" Writes raw bits to the register."]
103    #[doc = r""]
104    #[doc = r" # Safety"]
105    #[doc = r""]
106    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
107    #[inline(always)]
108    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
109        self.bits = bits;
110        self
111    }
112}
113#[doc = "DAC Volume Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dac_vol_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dac_vol_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
114pub struct DAC_VOL_CTRL_SPEC;
115impl crate::RegisterSpec for DAC_VOL_CTRL_SPEC {
116    type Ux = u32;
117}
118#[doc = "`read()` method returns [`dac_vol_ctrl::R`](R) reader structure"]
119impl crate::Readable for DAC_VOL_CTRL_SPEC {}
120#[doc = "`write(|w| ..)` method takes [`dac_vol_ctrl::W`](W) writer structure"]
121impl crate::Writable for DAC_VOL_CTRL_SPEC {
122    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
123    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
124}
125#[doc = "`reset()` method sets dac_vol_ctrl to value 0"]
126impl crate::Resettable for DAC_VOL_CTRL_SPEC {
127    const RESET_VALUE: Self::Ux = 0;
128}
d1_pac/audio_codec/dac_vol_ctrl.rs

d1_pac/audio_codec/
dac_vol_ctrl.rs
