d1_pac/audio_codec/
ac_dac_drc_ctrl.rs

1#[doc = "Register `ac_dac_drc_ctrl` reader"]
2pub type R = crate::R<AC_DAC_DRC_CTRL_SPEC>;
3#[doc = "Register `ac_dac_drc_ctrl` writer"]
4pub type W = crate::W<AC_DAC_DRC_CTRL_SPEC>;
5#[doc = "Field `dac_drc_et_en` reader - DRC ET enable"]
6pub type DAC_DRC_ET_EN_R = crate::BitReader<DAC_DRC_ET_EN_A>;
7#[doc = "DRC ET enable\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum DAC_DRC_ET_EN_A {
10    #[doc = "0: Disabled"]
11    DISABLED = 0,
12    #[doc = "1: Enabled\n\nWhen the bit is disabled, Ke and OPE parameter is unused."]
13    ENABLED = 1,
14}
15impl From<DAC_DRC_ET_EN_A> for bool {
16    #[inline(always)]
17    fn from(variant: DAC_DRC_ET_EN_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl DAC_DRC_ET_EN_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> DAC_DRC_ET_EN_A {
25        match self.bits {
26            false => DAC_DRC_ET_EN_A::DISABLED,
27            true => DAC_DRC_ET_EN_A::ENABLED,
28        }
29    }
30    #[doc = "Disabled"]
31    #[inline(always)]
32    pub fn is_disabled(&self) -> bool {
33        *self == DAC_DRC_ET_EN_A::DISABLED
34    }
35    #[doc = "Enabled\n\nWhen the bit is disabled, Ke and OPE parameter is unused."]
36    #[inline(always)]
37    pub fn is_enabled(&self) -> bool {
38        *self == DAC_DRC_ET_EN_A::ENABLED
39    }
40}
41#[doc = "Field `dac_drc_et_en` writer - DRC ET enable"]
42pub type DAC_DRC_ET_EN_W<'a, REG> = crate::BitWriter<'a, REG, DAC_DRC_ET_EN_A>;
43impl<'a, REG> DAC_DRC_ET_EN_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "Disabled"]
48    #[inline(always)]
49    pub fn disabled(self) -> &'a mut crate::W<REG> {
50        self.variant(DAC_DRC_ET_EN_A::DISABLED)
51    }
52    #[doc = "Enabled\n\nWhen the bit is disabled, Ke and OPE parameter is unused."]
53    #[inline(always)]
54    pub fn enabled(self) -> &'a mut crate::W<REG> {
55        self.variant(DAC_DRC_ET_EN_A::ENABLED)
56    }
57}
58#[doc = "Field `dac_drc_lt_en` reader - DRC LT enable"]
59pub type DAC_DRC_LT_EN_R = crate::BitReader<DAC_DRC_LT_EN_A>;
60#[doc = "DRC LT enable\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum DAC_DRC_LT_EN_A {
63    #[doc = "0: Disabled"]
64    DISABLED = 0,
65    #[doc = "1: Enabled\n\nWhen the bit is disabled, Kl and OPL parameter is unused."]
66    ENABLED = 1,
67}
68impl From<DAC_DRC_LT_EN_A> for bool {
69    #[inline(always)]
70    fn from(variant: DAC_DRC_LT_EN_A) -> Self {
71        variant as u8 != 0
72    }
73}
74impl DAC_DRC_LT_EN_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> DAC_DRC_LT_EN_A {
78        match self.bits {
79            false => DAC_DRC_LT_EN_A::DISABLED,
80            true => DAC_DRC_LT_EN_A::ENABLED,
81        }
82    }
83    #[doc = "Disabled"]
84    #[inline(always)]
85    pub fn is_disabled(&self) -> bool {
86        *self == DAC_DRC_LT_EN_A::DISABLED
87    }
88    #[doc = "Enabled\n\nWhen the bit is disabled, Kl and OPL parameter is unused."]
89    #[inline(always)]
90    pub fn is_enabled(&self) -> bool {
91        *self == DAC_DRC_LT_EN_A::ENABLED
92    }
93}
94#[doc = "Field `dac_drc_lt_en` writer - DRC LT enable"]
95pub type DAC_DRC_LT_EN_W<'a, REG> = crate::BitWriter<'a, REG, DAC_DRC_LT_EN_A>;
96impl<'a, REG> DAC_DRC_LT_EN_W<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "Disabled"]
101    #[inline(always)]
102    pub fn disabled(self) -> &'a mut crate::W<REG> {
103        self.variant(DAC_DRC_LT_EN_A::DISABLED)
104    }
105    #[doc = "Enabled\n\nWhen the bit is disabled, Kl and OPL parameter is unused."]
106    #[inline(always)]
107    pub fn enabled(self) -> &'a mut crate::W<REG> {
108        self.variant(DAC_DRC_LT_EN_A::ENABLED)
109    }
110}
111#[doc = "Field `dac_drc_delay_func_en` reader - Delay function enable"]
112pub type DAC_DRC_DELAY_FUNC_EN_R = crate::BitReader<DAC_DRC_DELAY_FUNC_EN_A>;
113#[doc = "Delay function enable\n\nValue on reset: 0"]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115pub enum DAC_DRC_DELAY_FUNC_EN_A {
116    #[doc = "0: Disabled"]
117    DISABLED = 0,
118    #[doc = "1: Enabled\n\nWhen the bit is disabled, the signal delay time is unused."]
119    ENABLED = 1,
120}
121impl From<DAC_DRC_DELAY_FUNC_EN_A> for bool {
122    #[inline(always)]
123    fn from(variant: DAC_DRC_DELAY_FUNC_EN_A) -> Self {
124        variant as u8 != 0
125    }
126}
127impl DAC_DRC_DELAY_FUNC_EN_R {
128    #[doc = "Get enumerated values variant"]
129    #[inline(always)]
130    pub const fn variant(&self) -> DAC_DRC_DELAY_FUNC_EN_A {
131        match self.bits {
132            false => DAC_DRC_DELAY_FUNC_EN_A::DISABLED,
133            true => DAC_DRC_DELAY_FUNC_EN_A::ENABLED,
134        }
135    }
136    #[doc = "Disabled"]
137    #[inline(always)]
138    pub fn is_disabled(&self) -> bool {
139        *self == DAC_DRC_DELAY_FUNC_EN_A::DISABLED
140    }
141    #[doc = "Enabled\n\nWhen the bit is disabled, the signal delay time is unused."]
142    #[inline(always)]
143    pub fn is_enabled(&self) -> bool {
144        *self == DAC_DRC_DELAY_FUNC_EN_A::ENABLED
145    }
146}
147#[doc = "Field `dac_drc_delay_func_en` writer - Delay function enable"]
148pub type DAC_DRC_DELAY_FUNC_EN_W<'a, REG> = crate::BitWriter<'a, REG, DAC_DRC_DELAY_FUNC_EN_A>;
149impl<'a, REG> DAC_DRC_DELAY_FUNC_EN_W<'a, REG>
150where
151    REG: crate::Writable + crate::RegisterSpec,
152{
153    #[doc = "Disabled"]
154    #[inline(always)]
155    pub fn disabled(self) -> &'a mut crate::W<REG> {
156        self.variant(DAC_DRC_DELAY_FUNC_EN_A::DISABLED)
157    }
158    #[doc = "Enabled\n\nWhen the bit is disabled, the signal delay time is unused."]
159    #[inline(always)]
160    pub fn enabled(self) -> &'a mut crate::W<REG> {
161        self.variant(DAC_DRC_DELAY_FUNC_EN_A::ENABLED)
162    }
163}
164#[doc = "Field `dac_drc_signal_func_sel` reader - Signal function select\n\nWhen the signal function selects the Peak filter, the RMS parameter is unused. (AC_DRC_LRMSHAT, AC_DRC_LRMSLAT, AC_DRC_LRMSHAT, AC_DRC_LRMSLAT)\n\nWhen the signal function selects the RMS filter, the Peak filter parameter is unused. (AC_DRC_LPFHAT, AC_DRC_LPFLAT, AC_DRC_RPFHAT, AC_DRC_RPFLAT, AC_DRC_LPFHRT, AC_DRC_LPFLRT, AC_DRC_RPFHRT, and AC_DRC_RPFLRT)"]
165pub type DAC_DRC_SIGNAL_FUNC_SEL_R = crate::BitReader<DAC_DRC_SIGNAL_FUNC_SEL_A>;
166#[doc = "Signal function select\n\nWhen the signal function selects the Peak filter, the RMS parameter is unused. (AC_DRC_LRMSHAT, AC_DRC_LRMSLAT, AC_DRC_LRMSHAT, AC_DRC_LRMSLAT)\n\nWhen the signal function selects the RMS filter, the Peak filter parameter is unused. (AC_DRC_LPFHAT, AC_DRC_LPFLAT, AC_DRC_RPFHAT, AC_DRC_RPFLAT, AC_DRC_LPFHRT, AC_DRC_LPFLRT, AC_DRC_RPFHRT, and AC_DRC_RPFLRT)\n\nValue on reset: 0"]
167#[derive(Clone, Copy, Debug, PartialEq, Eq)]
168pub enum DAC_DRC_SIGNAL_FUNC_SEL_A {
169    #[doc = "0: RMS filter"]
170    RMS = 0,
171    #[doc = "1: Peak filter"]
172    P_EAK = 1,
173}
174impl From<DAC_DRC_SIGNAL_FUNC_SEL_A> for bool {
175    #[inline(always)]
176    fn from(variant: DAC_DRC_SIGNAL_FUNC_SEL_A) -> Self {
177        variant as u8 != 0
178    }
179}
180impl DAC_DRC_SIGNAL_FUNC_SEL_R {
181    #[doc = "Get enumerated values variant"]
182    #[inline(always)]
183    pub const fn variant(&self) -> DAC_DRC_SIGNAL_FUNC_SEL_A {
184        match self.bits {
185            false => DAC_DRC_SIGNAL_FUNC_SEL_A::RMS,
186            true => DAC_DRC_SIGNAL_FUNC_SEL_A::P_EAK,
187        }
188    }
189    #[doc = "RMS filter"]
190    #[inline(always)]
191    pub fn is_rms(&self) -> bool {
192        *self == DAC_DRC_SIGNAL_FUNC_SEL_A::RMS
193    }
194    #[doc = "Peak filter"]
195    #[inline(always)]
196    pub fn is_p_eak(&self) -> bool {
197        *self == DAC_DRC_SIGNAL_FUNC_SEL_A::P_EAK
198    }
199}
200#[doc = "Field `dac_drc_signal_func_sel` writer - Signal function select\n\nWhen the signal function selects the Peak filter, the RMS parameter is unused. (AC_DRC_LRMSHAT, AC_DRC_LRMSLAT, AC_DRC_LRMSHAT, AC_DRC_LRMSLAT)\n\nWhen the signal function selects the RMS filter, the Peak filter parameter is unused. (AC_DRC_LPFHAT, AC_DRC_LPFLAT, AC_DRC_RPFHAT, AC_DRC_RPFLAT, AC_DRC_LPFHRT, AC_DRC_LPFLRT, AC_DRC_RPFHRT, and AC_DRC_RPFLRT)"]
201pub type DAC_DRC_SIGNAL_FUNC_SEL_W<'a, REG> = crate::BitWriter<'a, REG, DAC_DRC_SIGNAL_FUNC_SEL_A>;
202impl<'a, REG> DAC_DRC_SIGNAL_FUNC_SEL_W<'a, REG>
203where
204    REG: crate::Writable + crate::RegisterSpec,
205{
206    #[doc = "RMS filter"]
207    #[inline(always)]
208    pub fn rms(self) -> &'a mut crate::W<REG> {
209        self.variant(DAC_DRC_SIGNAL_FUNC_SEL_A::RMS)
210    }
211    #[doc = "Peak filter"]
212    #[inline(always)]
213    pub fn p_eak(self) -> &'a mut crate::W<REG> {
214        self.variant(DAC_DRC_SIGNAL_FUNC_SEL_A::P_EAK)
215    }
216}
217#[doc = "Field `dac_drc_detect_noise_en` reader - Control the DRC to detect noise when ET is enabled."]
218pub type DAC_DRC_DETECT_NOISE_EN_R = crate::BitReader<DAC_DRC_DETECT_NOISE_EN_A>;
219#[doc = "Control the DRC to detect noise when ET is enabled.\n\nValue on reset: 0"]
220#[derive(Clone, Copy, Debug, PartialEq, Eq)]
221pub enum DAC_DRC_DETECT_NOISE_EN_A {
222    #[doc = "0: Disabled"]
223    DISABLED = 0,
224    #[doc = "1: Enabled"]
225    ENABLED = 1,
226}
227impl From<DAC_DRC_DETECT_NOISE_EN_A> for bool {
228    #[inline(always)]
229    fn from(variant: DAC_DRC_DETECT_NOISE_EN_A) -> Self {
230        variant as u8 != 0
231    }
232}
233impl DAC_DRC_DETECT_NOISE_EN_R {
234    #[doc = "Get enumerated values variant"]
235    #[inline(always)]
236    pub const fn variant(&self) -> DAC_DRC_DETECT_NOISE_EN_A {
237        match self.bits {
238            false => DAC_DRC_DETECT_NOISE_EN_A::DISABLED,
239            true => DAC_DRC_DETECT_NOISE_EN_A::ENABLED,
240        }
241    }
242    #[doc = "Disabled"]
243    #[inline(always)]
244    pub fn is_disabled(&self) -> bool {
245        *self == DAC_DRC_DETECT_NOISE_EN_A::DISABLED
246    }
247    #[doc = "Enabled"]
248    #[inline(always)]
249    pub fn is_enabled(&self) -> bool {
250        *self == DAC_DRC_DETECT_NOISE_EN_A::ENABLED
251    }
252}
253#[doc = "Field `dac_drc_detect_noise_en` writer - Control the DRC to detect noise when ET is enabled."]
254pub type DAC_DRC_DETECT_NOISE_EN_W<'a, REG> = crate::BitWriter<'a, REG, DAC_DRC_DETECT_NOISE_EN_A>;
255impl<'a, REG> DAC_DRC_DETECT_NOISE_EN_W<'a, REG>
256where
257    REG: crate::Writable + crate::RegisterSpec,
258{
259    #[doc = "Disabled"]
260    #[inline(always)]
261    pub fn disabled(self) -> &'a mut crate::W<REG> {
262        self.variant(DAC_DRC_DETECT_NOISE_EN_A::DISABLED)
263    }
264    #[doc = "Enabled"]
265    #[inline(always)]
266    pub fn enabled(self) -> &'a mut crate::W<REG> {
267        self.variant(DAC_DRC_DETECT_NOISE_EN_A::ENABLED)
268    }
269}
270#[doc = "Field `dac_drc_gain_min_limit_en` reader - DRC gain min limit enable When this function is enabled, it will overwrite the noise detect function."]
271pub type DAC_DRC_GAIN_MIN_LIMIT_EN_R = crate::BitReader<DAC_DRC_GAIN_MIN_LIMIT_EN_A>;
272#[doc = "DRC gain min limit enable When this function is enabled, it will overwrite the noise detect function.\n\nValue on reset: 0"]
273#[derive(Clone, Copy, Debug, PartialEq, Eq)]
274pub enum DAC_DRC_GAIN_MIN_LIMIT_EN_A {
275    #[doc = "0: Disabled"]
276    DISABLED = 0,
277    #[doc = "1: Enabled"]
278    ENABLED = 1,
279}
280impl From<DAC_DRC_GAIN_MIN_LIMIT_EN_A> for bool {
281    #[inline(always)]
282    fn from(variant: DAC_DRC_GAIN_MIN_LIMIT_EN_A) -> Self {
283        variant as u8 != 0
284    }
285}
286impl DAC_DRC_GAIN_MIN_LIMIT_EN_R {
287    #[doc = "Get enumerated values variant"]
288    #[inline(always)]
289    pub const fn variant(&self) -> DAC_DRC_GAIN_MIN_LIMIT_EN_A {
290        match self.bits {
291            false => DAC_DRC_GAIN_MIN_LIMIT_EN_A::DISABLED,
292            true => DAC_DRC_GAIN_MIN_LIMIT_EN_A::ENABLED,
293        }
294    }
295    #[doc = "Disabled"]
296    #[inline(always)]
297    pub fn is_disabled(&self) -> bool {
298        *self == DAC_DRC_GAIN_MIN_LIMIT_EN_A::DISABLED
299    }
300    #[doc = "Enabled"]
301    #[inline(always)]
302    pub fn is_enabled(&self) -> bool {
303        *self == DAC_DRC_GAIN_MIN_LIMIT_EN_A::ENABLED
304    }
305}
306#[doc = "Field `dac_drc_gain_min_limit_en` writer - DRC gain min limit enable When this function is enabled, it will overwrite the noise detect function."]
307pub type DAC_DRC_GAIN_MIN_LIMIT_EN_W<'a, REG> =
308    crate::BitWriter<'a, REG, DAC_DRC_GAIN_MIN_LIMIT_EN_A>;
309impl<'a, REG> DAC_DRC_GAIN_MIN_LIMIT_EN_W<'a, REG>
310where
311    REG: crate::Writable + crate::RegisterSpec,
312{
313    #[doc = "Disabled"]
314    #[inline(always)]
315    pub fn disabled(self) -> &'a mut crate::W<REG> {
316        self.variant(DAC_DRC_GAIN_MIN_LIMIT_EN_A::DISABLED)
317    }
318    #[doc = "Enabled"]
319    #[inline(always)]
320    pub fn enabled(self) -> &'a mut crate::W<REG> {
321        self.variant(DAC_DRC_GAIN_MIN_LIMIT_EN_A::ENABLED)
322    }
323}
324#[doc = "Field `dac_drc_gain_max_limit_en` reader - DRC gain max limit enable"]
325pub type DAC_DRC_GAIN_MAX_LIMIT_EN_R = crate::BitReader<DAC_DRC_GAIN_MAX_LIMIT_EN_A>;
326#[doc = "DRC gain max limit enable\n\nValue on reset: 0"]
327#[derive(Clone, Copy, Debug, PartialEq, Eq)]
328pub enum DAC_DRC_GAIN_MAX_LIMIT_EN_A {
329    #[doc = "0: Disabled"]
330    DISABLED = 0,
331    #[doc = "1: Enabled"]
332    ENABLED = 1,
333}
334impl From<DAC_DRC_GAIN_MAX_LIMIT_EN_A> for bool {
335    #[inline(always)]
336    fn from(variant: DAC_DRC_GAIN_MAX_LIMIT_EN_A) -> Self {
337        variant as u8 != 0
338    }
339}
340impl DAC_DRC_GAIN_MAX_LIMIT_EN_R {
341    #[doc = "Get enumerated values variant"]
342    #[inline(always)]
343    pub const fn variant(&self) -> DAC_DRC_GAIN_MAX_LIMIT_EN_A {
344        match self.bits {
345            false => DAC_DRC_GAIN_MAX_LIMIT_EN_A::DISABLED,
346            true => DAC_DRC_GAIN_MAX_LIMIT_EN_A::ENABLED,
347        }
348    }
349    #[doc = "Disabled"]
350    #[inline(always)]
351    pub fn is_disabled(&self) -> bool {
352        *self == DAC_DRC_GAIN_MAX_LIMIT_EN_A::DISABLED
353    }
354    #[doc = "Enabled"]
355    #[inline(always)]
356    pub fn is_enabled(&self) -> bool {
357        *self == DAC_DRC_GAIN_MAX_LIMIT_EN_A::ENABLED
358    }
359}
360#[doc = "Field `dac_drc_gain_max_limit_en` writer - DRC gain max limit enable"]
361pub type DAC_DRC_GAIN_MAX_LIMIT_EN_W<'a, REG> =
362    crate::BitWriter<'a, REG, DAC_DRC_GAIN_MAX_LIMIT_EN_A>;
363impl<'a, REG> DAC_DRC_GAIN_MAX_LIMIT_EN_W<'a, REG>
364where
365    REG: crate::Writable + crate::RegisterSpec,
366{
367    #[doc = "Disabled"]
368    #[inline(always)]
369    pub fn disabled(self) -> &'a mut crate::W<REG> {
370        self.variant(DAC_DRC_GAIN_MAX_LIMIT_EN_A::DISABLED)
371    }
372    #[doc = "Enabled"]
373    #[inline(always)]
374    pub fn enabled(self) -> &'a mut crate::W<REG> {
375        self.variant(DAC_DRC_GAIN_MAX_LIMIT_EN_A::ENABLED)
376    }
377}
378#[doc = "Field `dac_drc_delay_buf_en` reader - The delay buffer use or not when the DRC is disabled and the DRC buffer data output completely."]
379pub type DAC_DRC_DELAY_BUF_EN_R = crate::BitReader<DAC_DRC_DELAY_BUF_EN_A>;
380#[doc = "The delay buffer use or not when the DRC is disabled and the DRC buffer data output completely.\n\nValue on reset: 1"]
381#[derive(Clone, Copy, Debug, PartialEq, Eq)]
382pub enum DAC_DRC_DELAY_BUF_EN_A {
383    #[doc = "0: Do not use the buffer."]
384    D_O_NOT_USE_THE_BUFFER = 0,
385    #[doc = "1: Use the buffer."]
386    U_SE_THE_BUFFER = 1,
387}
388impl From<DAC_DRC_DELAY_BUF_EN_A> for bool {
389    #[inline(always)]
390    fn from(variant: DAC_DRC_DELAY_BUF_EN_A) -> Self {
391        variant as u8 != 0
392    }
393}
394impl DAC_DRC_DELAY_BUF_EN_R {
395    #[doc = "Get enumerated values variant"]
396    #[inline(always)]
397    pub const fn variant(&self) -> DAC_DRC_DELAY_BUF_EN_A {
398        match self.bits {
399            false => DAC_DRC_DELAY_BUF_EN_A::D_O_NOT_USE_THE_BUFFER,
400            true => DAC_DRC_DELAY_BUF_EN_A::U_SE_THE_BUFFER,
401        }
402    }
403    #[doc = "Do not use the buffer."]
404    #[inline(always)]
405    pub fn is_d_o_not_use_the_buffer(&self) -> bool {
406        *self == DAC_DRC_DELAY_BUF_EN_A::D_O_NOT_USE_THE_BUFFER
407    }
408    #[doc = "Use the buffer."]
409    #[inline(always)]
410    pub fn is_u_se_the_buffer(&self) -> bool {
411        *self == DAC_DRC_DELAY_BUF_EN_A::U_SE_THE_BUFFER
412    }
413}
414#[doc = "Field `dac_drc_delay_buf_en` writer - The delay buffer use or not when the DRC is disabled and the DRC buffer data output completely."]
415pub type DAC_DRC_DELAY_BUF_EN_W<'a, REG> = crate::BitWriter<'a, REG, DAC_DRC_DELAY_BUF_EN_A>;
416impl<'a, REG> DAC_DRC_DELAY_BUF_EN_W<'a, REG>
417where
418    REG: crate::Writable + crate::RegisterSpec,
419{
420    #[doc = "Do not use the buffer."]
421    #[inline(always)]
422    pub fn d_o_not_use_the_buffer(self) -> &'a mut crate::W<REG> {
423        self.variant(DAC_DRC_DELAY_BUF_EN_A::D_O_NOT_USE_THE_BUFFER)
424    }
425    #[doc = "Use the buffer."]
426    #[inline(always)]
427    pub fn u_se_the_buffer(self) -> &'a mut crate::W<REG> {
428        self.variant(DAC_DRC_DELAY_BUF_EN_A::U_SE_THE_BUFFER)
429    }
430}
431#[doc = "Field `signal_delay_time_setting` reader - Signal delay time setting\n\nDelay time = 8*(n + 1) fs, n less than 30\n\nWhen the delay function is disabled, the signal delay time is unused."]
432pub type SIGNAL_DELAY_TIME_SETTING_R = crate::FieldReader;
433#[doc = "Field `signal_delay_time_setting` writer - Signal delay time setting\n\nDelay time = 8*(n + 1) fs, n less than 30\n\nWhen the delay function is disabled, the signal delay time is unused."]
434pub type SIGNAL_DELAY_TIME_SETTING_W<'a, REG> = crate::FieldWriter<'a, REG, 6>;
435#[doc = "Field `drc_dealy_buffer_data_output_state` reader - DRC delay buffer data output state when The DRC delay function is enabled and the DRC function is disabled. After disabling the DRC function and this bit goes to 0, write the DRC delay function bit to 0."]
436pub type DRC_DEALY_BUFFER_DATA_OUTPUT_STATE_R =
437    crate::BitReader<DRC_DEALY_BUFFER_DATA_OUTPUT_STATE_A>;
438#[doc = "DRC delay buffer data output state when The DRC delay function is enabled and the DRC function is disabled. After disabling the DRC function and this bit goes to 0, write the DRC delay function bit to 0.\n\nValue on reset: 0"]
439#[derive(Clone, Copy, Debug, PartialEq, Eq)]
440pub enum DRC_DEALY_BUFFER_DATA_OUTPUT_STATE_A {
441    #[doc = "0: Not completed"]
442    NOT_COMPLETED = 0,
443    #[doc = "1: Completed"]
444    COMPLETED = 1,
445}
446impl From<DRC_DEALY_BUFFER_DATA_OUTPUT_STATE_A> for bool {
447    #[inline(always)]
448    fn from(variant: DRC_DEALY_BUFFER_DATA_OUTPUT_STATE_A) -> Self {
449        variant as u8 != 0
450    }
451}
452impl DRC_DEALY_BUFFER_DATA_OUTPUT_STATE_R {
453    #[doc = "Get enumerated values variant"]
454    #[inline(always)]
455    pub const fn variant(&self) -> DRC_DEALY_BUFFER_DATA_OUTPUT_STATE_A {
456        match self.bits {
457            false => DRC_DEALY_BUFFER_DATA_OUTPUT_STATE_A::NOT_COMPLETED,
458            true => DRC_DEALY_BUFFER_DATA_OUTPUT_STATE_A::COMPLETED,
459        }
460    }
461    #[doc = "Not completed"]
462    #[inline(always)]
463    pub fn is_not_completed(&self) -> bool {
464        *self == DRC_DEALY_BUFFER_DATA_OUTPUT_STATE_A::NOT_COMPLETED
465    }
466    #[doc = "Completed"]
467    #[inline(always)]
468    pub fn is_completed(&self) -> bool {
469        *self == DRC_DEALY_BUFFER_DATA_OUTPUT_STATE_A::COMPLETED
470    }
471}
472impl R {
473    #[doc = "Bit 0 - DRC ET enable"]
474    #[inline(always)]
475    pub fn dac_drc_et_en(&self) -> DAC_DRC_ET_EN_R {
476        DAC_DRC_ET_EN_R::new((self.bits & 1) != 0)
477    }
478    #[doc = "Bit 1 - DRC LT enable"]
479    #[inline(always)]
480    pub fn dac_drc_lt_en(&self) -> DAC_DRC_LT_EN_R {
481        DAC_DRC_LT_EN_R::new(((self.bits >> 1) & 1) != 0)
482    }
483    #[doc = "Bit 2 - Delay function enable"]
484    #[inline(always)]
485    pub fn dac_drc_delay_func_en(&self) -> DAC_DRC_DELAY_FUNC_EN_R {
486        DAC_DRC_DELAY_FUNC_EN_R::new(((self.bits >> 2) & 1) != 0)
487    }
488    #[doc = "Bit 3 - Signal function select\n\nWhen the signal function selects the Peak filter, the RMS parameter is unused. (AC_DRC_LRMSHAT, AC_DRC_LRMSLAT, AC_DRC_LRMSHAT, AC_DRC_LRMSLAT)\n\nWhen the signal function selects the RMS filter, the Peak filter parameter is unused. (AC_DRC_LPFHAT, AC_DRC_LPFLAT, AC_DRC_RPFHAT, AC_DRC_RPFLAT, AC_DRC_LPFHRT, AC_DRC_LPFLRT, AC_DRC_RPFHRT, and AC_DRC_RPFLRT)"]
489    #[inline(always)]
490    pub fn dac_drc_signal_func_sel(&self) -> DAC_DRC_SIGNAL_FUNC_SEL_R {
491        DAC_DRC_SIGNAL_FUNC_SEL_R::new(((self.bits >> 3) & 1) != 0)
492    }
493    #[doc = "Bit 4 - Control the DRC to detect noise when ET is enabled."]
494    #[inline(always)]
495    pub fn dac_drc_detect_noise_en(&self) -> DAC_DRC_DETECT_NOISE_EN_R {
496        DAC_DRC_DETECT_NOISE_EN_R::new(((self.bits >> 4) & 1) != 0)
497    }
498    #[doc = "Bit 5 - DRC gain min limit enable When this function is enabled, it will overwrite the noise detect function."]
499    #[inline(always)]
500    pub fn dac_drc_gain_min_limit_en(&self) -> DAC_DRC_GAIN_MIN_LIMIT_EN_R {
501        DAC_DRC_GAIN_MIN_LIMIT_EN_R::new(((self.bits >> 5) & 1) != 0)
502    }
503    #[doc = "Bit 6 - DRC gain max limit enable"]
504    #[inline(always)]
505    pub fn dac_drc_gain_max_limit_en(&self) -> DAC_DRC_GAIN_MAX_LIMIT_EN_R {
506        DAC_DRC_GAIN_MAX_LIMIT_EN_R::new(((self.bits >> 6) & 1) != 0)
507    }
508    #[doc = "Bit 7 - The delay buffer use or not when the DRC is disabled and the DRC buffer data output completely."]
509    #[inline(always)]
510    pub fn dac_drc_delay_buf_en(&self) -> DAC_DRC_DELAY_BUF_EN_R {
511        DAC_DRC_DELAY_BUF_EN_R::new(((self.bits >> 7) & 1) != 0)
512    }
513    #[doc = "Bits 8:13 - Signal delay time setting\n\nDelay time = 8*(n + 1) fs, n less than 30\n\nWhen the delay function is disabled, the signal delay time is unused."]
514    #[inline(always)]
515    pub fn signal_delay_time_setting(&self) -> SIGNAL_DELAY_TIME_SETTING_R {
516        SIGNAL_DELAY_TIME_SETTING_R::new(((self.bits >> 8) & 0x3f) as u8)
517    }
518    #[doc = "Bit 15 - DRC delay buffer data output state when The DRC delay function is enabled and the DRC function is disabled. After disabling the DRC function and this bit goes to 0, write the DRC delay function bit to 0."]
519    #[inline(always)]
520    pub fn drc_dealy_buffer_data_output_state(&self) -> DRC_DEALY_BUFFER_DATA_OUTPUT_STATE_R {
521        DRC_DEALY_BUFFER_DATA_OUTPUT_STATE_R::new(((self.bits >> 15) & 1) != 0)
522    }
523}
524impl W {
525    #[doc = "Bit 0 - DRC ET enable"]
526    #[inline(always)]
527    #[must_use]
528    pub fn dac_drc_et_en(&mut self) -> DAC_DRC_ET_EN_W<AC_DAC_DRC_CTRL_SPEC> {
529        DAC_DRC_ET_EN_W::new(self, 0)
530    }
531    #[doc = "Bit 1 - DRC LT enable"]
532    #[inline(always)]
533    #[must_use]
534    pub fn dac_drc_lt_en(&mut self) -> DAC_DRC_LT_EN_W<AC_DAC_DRC_CTRL_SPEC> {
535        DAC_DRC_LT_EN_W::new(self, 1)
536    }
537    #[doc = "Bit 2 - Delay function enable"]
538    #[inline(always)]
539    #[must_use]
540    pub fn dac_drc_delay_func_en(&mut self) -> DAC_DRC_DELAY_FUNC_EN_W<AC_DAC_DRC_CTRL_SPEC> {
541        DAC_DRC_DELAY_FUNC_EN_W::new(self, 2)
542    }
543    #[doc = "Bit 3 - Signal function select\n\nWhen the signal function selects the Peak filter, the RMS parameter is unused. (AC_DRC_LRMSHAT, AC_DRC_LRMSLAT, AC_DRC_LRMSHAT, AC_DRC_LRMSLAT)\n\nWhen the signal function selects the RMS filter, the Peak filter parameter is unused. (AC_DRC_LPFHAT, AC_DRC_LPFLAT, AC_DRC_RPFHAT, AC_DRC_RPFLAT, AC_DRC_LPFHRT, AC_DRC_LPFLRT, AC_DRC_RPFHRT, and AC_DRC_RPFLRT)"]
544    #[inline(always)]
545    #[must_use]
546    pub fn dac_drc_signal_func_sel(&mut self) -> DAC_DRC_SIGNAL_FUNC_SEL_W<AC_DAC_DRC_CTRL_SPEC> {
547        DAC_DRC_SIGNAL_FUNC_SEL_W::new(self, 3)
548    }
549    #[doc = "Bit 4 - Control the DRC to detect noise when ET is enabled."]
550    #[inline(always)]
551    #[must_use]
552    pub fn dac_drc_detect_noise_en(&mut self) -> DAC_DRC_DETECT_NOISE_EN_W<AC_DAC_DRC_CTRL_SPEC> {
553        DAC_DRC_DETECT_NOISE_EN_W::new(self, 4)
554    }
555    #[doc = "Bit 5 - DRC gain min limit enable When this function is enabled, it will overwrite the noise detect function."]
556    #[inline(always)]
557    #[must_use]
558    pub fn dac_drc_gain_min_limit_en(
559        &mut self,
560    ) -> DAC_DRC_GAIN_MIN_LIMIT_EN_W<AC_DAC_DRC_CTRL_SPEC> {
561        DAC_DRC_GAIN_MIN_LIMIT_EN_W::new(self, 5)
562    }
563    #[doc = "Bit 6 - DRC gain max limit enable"]
564    #[inline(always)]
565    #[must_use]
566    pub fn dac_drc_gain_max_limit_en(
567        &mut self,
568    ) -> DAC_DRC_GAIN_MAX_LIMIT_EN_W<AC_DAC_DRC_CTRL_SPEC> {
569        DAC_DRC_GAIN_MAX_LIMIT_EN_W::new(self, 6)
570    }
571    #[doc = "Bit 7 - The delay buffer use or not when the DRC is disabled and the DRC buffer data output completely."]
572    #[inline(always)]
573    #[must_use]
574    pub fn dac_drc_delay_buf_en(&mut self) -> DAC_DRC_DELAY_BUF_EN_W<AC_DAC_DRC_CTRL_SPEC> {
575        DAC_DRC_DELAY_BUF_EN_W::new(self, 7)
576    }
577    #[doc = "Bits 8:13 - Signal delay time setting\n\nDelay time = 8*(n + 1) fs, n less than 30\n\nWhen the delay function is disabled, the signal delay time is unused."]
578    #[inline(always)]
579    #[must_use]
580    pub fn signal_delay_time_setting(
581        &mut self,
582    ) -> SIGNAL_DELAY_TIME_SETTING_W<AC_DAC_DRC_CTRL_SPEC> {
583        SIGNAL_DELAY_TIME_SETTING_W::new(self, 8)
584    }
585    #[doc = r" Writes raw bits to the register."]
586    #[doc = r""]
587    #[doc = r" # Safety"]
588    #[doc = r""]
589    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
590    #[inline(always)]
591    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
592        self.bits = bits;
593        self
594    }
595}
596#[doc = "DAC DRC Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ac_dac_drc_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ac_dac_drc_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
597pub struct AC_DAC_DRC_CTRL_SPEC;
598impl crate::RegisterSpec for AC_DAC_DRC_CTRL_SPEC {
599    type Ux = u32;
600}
601#[doc = "`read()` method returns [`ac_dac_drc_ctrl::R`](R) reader structure"]
602impl crate::Readable for AC_DAC_DRC_CTRL_SPEC {}
603#[doc = "`write(|w| ..)` method takes [`ac_dac_drc_ctrl::W`](W) writer structure"]
604impl crate::Writable for AC_DAC_DRC_CTRL_SPEC {
605    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
606    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
607}
608#[doc = "`reset()` method sets ac_dac_drc_ctrl to value 0x80"]
609impl crate::Resettable for AC_DAC_DRC_CTRL_SPEC {
610    const RESET_VALUE: Self::Ux = 0x80;
611}
d1_pac/audio_codec/ac_dac_drc_ctrl.rs

d1_pac/audio_codec/
ac_dac_drc_ctrl.rs
