d1_pac/audio_codec/
ac_adc_drc_lopl.rs

1#[doc = "Register `ac_adc_drc_lopl` reader"]
2pub type R = crate::R<AC_ADC_DRC_LOPL_SPEC>;
3#[doc = "Register `ac_adc_drc_lopl` writer"]
4pub type W = crate::W<AC_ADC_DRC_LOPL_SPEC>;
5#[doc = "Field `adc_drc_lopl` reader - The output of the limiter which is determined by equation OPT/6.0206. The format is 8.24. (The default value is -25 dB)"]
6pub type ADC_DRC_LOPL_R = crate::FieldReader<u16>;
7#[doc = "Field `adc_drc_lopl` writer - The output of the limiter which is determined by equation OPT/6.0206. The format is 8.24. (The default value is -25 dB)"]
8pub type ADC_DRC_LOPL_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
9impl R {
10    #[doc = "Bits 0:15 - The output of the limiter which is determined by equation OPT/6.0206. The format is 8.24. (The default value is -25 dB)"]
11    #[inline(always)]
12    pub fn adc_drc_lopl(&self) -> ADC_DRC_LOPL_R {
13        ADC_DRC_LOPL_R::new((self.bits & 0xffff) as u16)
14    }
15}
16impl W {
17    #[doc = "Bits 0:15 - The output of the limiter which is determined by equation OPT/6.0206. The format is 8.24. (The default value is -25 dB)"]
18    #[inline(always)]
19    #[must_use]
20    pub fn adc_drc_lopl(&mut self) -> ADC_DRC_LOPL_W<AC_ADC_DRC_LOPL_SPEC> {
21        ADC_DRC_LOPL_W::new(self, 0)
22    }
23    #[doc = r" Writes raw bits to the register."]
24    #[doc = r""]
25    #[doc = r" # Safety"]
26    #[doc = r""]
27    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
28    #[inline(always)]
29    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
30        self.bits = bits;
31        self
32    }
33}
34#[doc = "ADC DRC Limiter Low Output at Limiter Threshold\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ac_adc_drc_lopl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ac_adc_drc_lopl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
35pub struct AC_ADC_DRC_LOPL_SPEC;
36impl crate::RegisterSpec for AC_ADC_DRC_LOPL_SPEC {
37    type Ux = u32;
38}
39#[doc = "`read()` method returns [`ac_adc_drc_lopl::R`](R) reader structure"]
40impl crate::Readable for AC_ADC_DRC_LOPL_SPEC {}
41#[doc = "`write(|w| ..)` method takes [`ac_adc_drc_lopl::W`](W) writer structure"]
42impl crate::Writable for AC_ADC_DRC_LOPL_SPEC {
43    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
44    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
45}
46#[doc = "`reset()` method sets ac_adc_drc_lopl to value 0xfba7"]
47impl crate::Resettable for AC_ADC_DRC_LOPL_SPEC {
48    const RESET_VALUE: Self::Ux = 0xfba7;
49}
d1_pac/audio_codec/ac_adc_drc_lopl.rs

d1_pac/audio_codec/
ac_adc_drc_lopl.rs
