d1_pac/smhc/
smhc_funs.rs

1#[doc = "Register `smhc_funs` reader"]
2pub type R = crate::R<SMHC_FUNS_SPEC>;
3#[doc = "Register `smhc_funs` writer"]
4pub type W = crate::W<SMHC_FUNS_SPEC>;
5#[doc = "Field `host_send_mimc_irqresq` reader - Host Send MMC IRQ Response"]
6pub type HOST_SEND_MIMC_IRQRESQ_R = crate::BitReader<HOST_SEND_MIMC_IRQRESQ_A>;
7#[doc = "Host Send MMC IRQ Response\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum HOST_SEND_MIMC_IRQRESQ_A {
10    #[doc = "0: `0`"]
11    IGNORED = 0,
12    #[doc = "1: Send auto IRQ response"]
13    SEND = 1,
14}
15impl From<HOST_SEND_MIMC_IRQRESQ_A> for bool {
16    #[inline(always)]
17    fn from(variant: HOST_SEND_MIMC_IRQRESQ_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl HOST_SEND_MIMC_IRQRESQ_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> HOST_SEND_MIMC_IRQRESQ_A {
25        match self.bits {
26            false => HOST_SEND_MIMC_IRQRESQ_A::IGNORED,
27            true => HOST_SEND_MIMC_IRQRESQ_A::SEND,
28        }
29    }
30    #[doc = "`0`"]
31    #[inline(always)]
32    pub fn is_ignored(&self) -> bool {
33        *self == HOST_SEND_MIMC_IRQRESQ_A::IGNORED
34    }
35    #[doc = "Send auto IRQ response"]
36    #[inline(always)]
37    pub fn is_send(&self) -> bool {
38        *self == HOST_SEND_MIMC_IRQRESQ_A::SEND
39    }
40}
41#[doc = "Field `host_send_mimc_irqresq` writer - Host Send MMC IRQ Response"]
42pub type HOST_SEND_MIMC_IRQRESQ_W<'a, REG> = crate::BitWriter<'a, REG, HOST_SEND_MIMC_IRQRESQ_A>;
43impl<'a, REG> HOST_SEND_MIMC_IRQRESQ_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "`0`"]
48    #[inline(always)]
49    pub fn ignored(self) -> &'a mut crate::W<REG> {
50        self.variant(HOST_SEND_MIMC_IRQRESQ_A::IGNORED)
51    }
52    #[doc = "Send auto IRQ response"]
53    #[inline(always)]
54    pub fn send(self) -> &'a mut crate::W<REG> {
55        self.variant(HOST_SEND_MIMC_IRQRESQ_A::SEND)
56    }
57}
58#[doc = "Field `read_wait` reader - Read Wait"]
59pub type READ_WAIT_R = crate::BitReader<READ_WAIT_A>;
60#[doc = "Read Wait\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum READ_WAIT_A {
63    #[doc = "0: Clear SDIO read wait"]
64    CLEAR = 0,
65    #[doc = "1: Assert SDIO read wait"]
66    ASSERT = 1,
67}
68impl From<READ_WAIT_A> for bool {
69    #[inline(always)]
70    fn from(variant: READ_WAIT_A) -> Self {
71        variant as u8 != 0
72    }
73}
74impl READ_WAIT_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> READ_WAIT_A {
78        match self.bits {
79            false => READ_WAIT_A::CLEAR,
80            true => READ_WAIT_A::ASSERT,
81        }
82    }
83    #[doc = "Clear SDIO read wait"]
84    #[inline(always)]
85    pub fn is_clear(&self) -> bool {
86        *self == READ_WAIT_A::CLEAR
87    }
88    #[doc = "Assert SDIO read wait"]
89    #[inline(always)]
90    pub fn is_assert(&self) -> bool {
91        *self == READ_WAIT_A::ASSERT
92    }
93}
94#[doc = "Field `read_wait` writer - Read Wait"]
95pub type READ_WAIT_W<'a, REG> = crate::BitWriter<'a, REG, READ_WAIT_A>;
96impl<'a, REG> READ_WAIT_W<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "Clear SDIO read wait"]
101    #[inline(always)]
102    pub fn clear(self) -> &'a mut crate::W<REG> {
103        self.variant(READ_WAIT_A::CLEAR)
104    }
105    #[doc = "Assert SDIO read wait"]
106    #[inline(always)]
107    pub fn assert(self) -> &'a mut crate::W<REG> {
108        self.variant(READ_WAIT_A::ASSERT)
109    }
110}
111#[doc = "Field `abt_rdata` reader - Abort Read Data"]
112pub type ABT_RDATA_R = crate::BitReader<ABT_RDATA_A>;
113#[doc = "Abort Read Data\n\nValue on reset: 0"]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115pub enum ABT_RDATA_A {
116    #[doc = "0: `0`"]
117    IGNORED = 0,
118    #[doc = "1: `1`"]
119    ABORT = 1,
120}
121impl From<ABT_RDATA_A> for bool {
122    #[inline(always)]
123    fn from(variant: ABT_RDATA_A) -> Self {
124        variant as u8 != 0
125    }
126}
127impl ABT_RDATA_R {
128    #[doc = "Get enumerated values variant"]
129    #[inline(always)]
130    pub const fn variant(&self) -> ABT_RDATA_A {
131        match self.bits {
132            false => ABT_RDATA_A::IGNORED,
133            true => ABT_RDATA_A::ABORT,
134        }
135    }
136    #[doc = "`0`"]
137    #[inline(always)]
138    pub fn is_ignored(&self) -> bool {
139        *self == ABT_RDATA_A::IGNORED
140    }
141    #[doc = "`1`"]
142    #[inline(always)]
143    pub fn is_abort(&self) -> bool {
144        *self == ABT_RDATA_A::ABORT
145    }
146}
147#[doc = "Field `abt_rdata` writer - Abort Read Data"]
148pub type ABT_RDATA_W<'a, REG> = crate::BitWriter<'a, REG, ABT_RDATA_A>;
149impl<'a, REG> ABT_RDATA_W<'a, REG>
150where
151    REG: crate::Writable + crate::RegisterSpec,
152{
153    #[doc = "`0`"]
154    #[inline(always)]
155    pub fn ignored(self) -> &'a mut crate::W<REG> {
156        self.variant(ABT_RDATA_A::IGNORED)
157    }
158    #[doc = "`1`"]
159    #[inline(always)]
160    pub fn abort(self) -> &'a mut crate::W<REG> {
161        self.variant(ABT_RDATA_A::ABORT)
162    }
163}
164impl R {
165    #[doc = "Bit 0 - Host Send MMC IRQ Response"]
166    #[inline(always)]
167    pub fn host_send_mimc_irqresq(&self) -> HOST_SEND_MIMC_IRQRESQ_R {
168        HOST_SEND_MIMC_IRQRESQ_R::new((self.bits & 1) != 0)
169    }
170    #[doc = "Bit 1 - Read Wait"]
171    #[inline(always)]
172    pub fn read_wait(&self) -> READ_WAIT_R {
173        READ_WAIT_R::new(((self.bits >> 1) & 1) != 0)
174    }
175    #[doc = "Bit 2 - Abort Read Data"]
176    #[inline(always)]
177    pub fn abt_rdata(&self) -> ABT_RDATA_R {
178        ABT_RDATA_R::new(((self.bits >> 2) & 1) != 0)
179    }
180}
181impl W {
182    #[doc = "Bit 0 - Host Send MMC IRQ Response"]
183    #[inline(always)]
184    #[must_use]
185    pub fn host_send_mimc_irqresq(&mut self) -> HOST_SEND_MIMC_IRQRESQ_W<SMHC_FUNS_SPEC> {
186        HOST_SEND_MIMC_IRQRESQ_W::new(self, 0)
187    }
188    #[doc = "Bit 1 - Read Wait"]
189    #[inline(always)]
190    #[must_use]
191    pub fn read_wait(&mut self) -> READ_WAIT_W<SMHC_FUNS_SPEC> {
192        READ_WAIT_W::new(self, 1)
193    }
194    #[doc = "Bit 2 - Abort Read Data"]
195    #[inline(always)]
196    #[must_use]
197    pub fn abt_rdata(&mut self) -> ABT_RDATA_W<SMHC_FUNS_SPEC> {
198        ABT_RDATA_W::new(self, 2)
199    }
200    #[doc = r" Writes raw bits to the register."]
201    #[doc = r""]
202    #[doc = r" # Safety"]
203    #[doc = r""]
204    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
205    #[inline(always)]
206    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
207        self.bits = bits;
208        self
209    }
210}
211#[doc = "FIFO Function Select Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`smhc_funs::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`smhc_funs::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
212pub struct SMHC_FUNS_SPEC;
213impl crate::RegisterSpec for SMHC_FUNS_SPEC {
214    type Ux = u32;
215}
216#[doc = "`read()` method returns [`smhc_funs::R`](R) reader structure"]
217impl crate::Readable for SMHC_FUNS_SPEC {}
218#[doc = "`write(|w| ..)` method takes [`smhc_funs::W`](W) writer structure"]
219impl crate::Writable for SMHC_FUNS_SPEC {
220    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
221    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
222}
223#[doc = "`reset()` method sets smhc_funs to value 0"]
224impl crate::Resettable for SMHC_FUNS_SPEC {
225    const RESET_VALUE: Self::Ux = 0;
226}
d1_pac/smhc/smhc_funs.rs

d1_pac/smhc/
smhc_funs.rs
