d1_pac/tcon_lcd0/
lcd_basic1.rs

1#[doc = "Register `lcd_basic1` reader"]
2pub type R = crate::R<LCD_BASIC1_SPEC>;
3#[doc = "Register `lcd_basic1` writer"]
4pub type W = crate::W<LCD_BASIC1_SPEC>;
5#[doc = "Field `hbp` reader - Horizontal back porch (in dclk)\n\nThbp = (HBP +1) * Tdclk"]
6pub type HBP_R = crate::FieldReader<u16>;
7#[doc = "Field `hbp` writer - Horizontal back porch (in dclk)\n\nThbp = (HBP +1) * Tdclk"]
8pub type HBP_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>;
9#[doc = "Field `ht` reader - Thcycle = (HT+1) * Tdclk\n\nComputation:\n\n1) parallel: HT = X + BLANK\n\nLimitation:\n\n1) parallel: HT >= (HBP +1) + (X+1) +2\n\n2) serial 1: HT >= (HBP +1) + (X+1) *3+2\n\n3) serial 2: HT >= (HBP +1) + (X+1) *3/2+2"]
10pub type HT_R = crate::FieldReader<u16>;
11#[doc = "Field `ht` writer - Thcycle = (HT+1) * Tdclk\n\nComputation:\n\n1) parallel: HT = X + BLANK\n\nLimitation:\n\n1) parallel: HT >= (HBP +1) + (X+1) +2\n\n2) serial 1: HT >= (HBP +1) + (X+1) *3+2\n\n3) serial 2: HT >= (HBP +1) + (X+1) *3/2+2"]
12pub type HT_W<'a, REG> = crate::FieldWriter<'a, REG, 13, u16>;
13impl R {
14    #[doc = "Bits 0:11 - Horizontal back porch (in dclk)\n\nThbp = (HBP +1) * Tdclk"]
15    #[inline(always)]
16    pub fn hbp(&self) -> HBP_R {
17        HBP_R::new((self.bits & 0x0fff) as u16)
18    }
19    #[doc = "Bits 16:28 - Thcycle = (HT+1) * Tdclk\n\nComputation:\n\n1) parallel: HT = X + BLANK\n\nLimitation:\n\n1) parallel: HT >= (HBP +1) + (X+1) +2\n\n2) serial 1: HT >= (HBP +1) + (X+1) *3+2\n\n3) serial 2: HT >= (HBP +1) + (X+1) *3/2+2"]
20    #[inline(always)]
21    pub fn ht(&self) -> HT_R {
22        HT_R::new(((self.bits >> 16) & 0x1fff) as u16)
23    }
24}
25impl W {
26    #[doc = "Bits 0:11 - Horizontal back porch (in dclk)\n\nThbp = (HBP +1) * Tdclk"]
27    #[inline(always)]
28    #[must_use]
29    pub fn hbp(&mut self) -> HBP_W<LCD_BASIC1_SPEC> {
30        HBP_W::new(self, 0)
31    }
32    #[doc = "Bits 16:28 - Thcycle = (HT+1) * Tdclk\n\nComputation:\n\n1) parallel: HT = X + BLANK\n\nLimitation:\n\n1) parallel: HT >= (HBP +1) + (X+1) +2\n\n2) serial 1: HT >= (HBP +1) + (X+1) *3+2\n\n3) serial 2: HT >= (HBP +1) + (X+1) *3/2+2"]
33    #[inline(always)]
34    #[must_use]
35    pub fn ht(&mut self) -> HT_W<LCD_BASIC1_SPEC> {
36        HT_W::new(self, 16)
37    }
38    #[doc = r" Writes raw bits to the register."]
39    #[doc = r""]
40    #[doc = r" # Safety"]
41    #[doc = r""]
42    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
43    #[inline(always)]
44    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
45        self.bits = bits;
46        self
47    }
48}
49#[doc = "LCD Basic Timing Register1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lcd_basic1::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lcd_basic1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
50pub struct LCD_BASIC1_SPEC;
51impl crate::RegisterSpec for LCD_BASIC1_SPEC {
52    type Ux = u32;
53}
54#[doc = "`read()` method returns [`lcd_basic1::R`](R) reader structure"]
55impl crate::Readable for LCD_BASIC1_SPEC {}
56#[doc = "`write(|w| ..)` method takes [`lcd_basic1::W`](W) writer structure"]
57impl crate::Writable for LCD_BASIC1_SPEC {
58    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
59    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
60}
61#[doc = "`reset()` method sets lcd_basic1 to value 0"]
62impl crate::Resettable for LCD_BASIC1_SPEC {
63    const RESET_VALUE: Self::Ux = 0;
64}
d1_pac/tcon_lcd0/lcd_basic1.rs

d1_pac/tcon_lcd0/
lcd_basic1.rs
