d1_pac/sys_cfg/
emac_ephy_clk0.rs

1#[doc = "Register `emac_ephy_clk0` reader"]
2pub type R = crate::R<EMAC_EPHY_CLK0_SPEC>;
3#[doc = "Register `emac_ephy_clk0` writer"]
4pub type W = crate::W<EMAC_EPHY_CLK0_SPEC>;
5#[doc = "Field `etcs` reader - "]
6pub type ETCS_R = crate::FieldReader<ETCS_A>;
7#[doc = "\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9#[repr(u8)]
10pub enum ETCS_A {
11    #[doc = "0: `0`"]
12    MII = 0,
13    #[doc = "1: `1`"]
14    EXTERNAL_GMII_RGMII = 1,
15    #[doc = "2: `10`"]
16    INTERNAL_GMII_RGMII = 2,
17}
18impl From<ETCS_A> for u8 {
19    #[inline(always)]
20    fn from(variant: ETCS_A) -> Self {
21        variant as _
22    }
23}
24impl crate::FieldSpec for ETCS_A {
25    type Ux = u8;
26}
27impl ETCS_R {
28    #[doc = "Get enumerated values variant"]
29    #[inline(always)]
30    pub const fn variant(&self) -> Option<ETCS_A> {
31        match self.bits {
32            0 => Some(ETCS_A::MII),
33            1 => Some(ETCS_A::EXTERNAL_GMII_RGMII),
34            2 => Some(ETCS_A::INTERNAL_GMII_RGMII),
35            _ => None,
36        }
37    }
38    #[doc = "`0`"]
39    #[inline(always)]
40    pub fn is_mii(&self) -> bool {
41        *self == ETCS_A::MII
42    }
43    #[doc = "`1`"]
44    #[inline(always)]
45    pub fn is_external_gmii_rgmii(&self) -> bool {
46        *self == ETCS_A::EXTERNAL_GMII_RGMII
47    }
48    #[doc = "`10`"]
49    #[inline(always)]
50    pub fn is_internal_gmii_rgmii(&self) -> bool {
51        *self == ETCS_A::INTERNAL_GMII_RGMII
52    }
53}
54#[doc = "Field `etcs` writer - "]
55pub type ETCS_W<'a, REG> = crate::FieldWriter<'a, REG, 2, ETCS_A>;
56impl<'a, REG> ETCS_W<'a, REG>
57where
58    REG: crate::Writable + crate::RegisterSpec,
59    REG::Ux: From<u8>,
60{
61    #[doc = "`0`"]
62    #[inline(always)]
63    pub fn mii(self) -> &'a mut crate::W<REG> {
64        self.variant(ETCS_A::MII)
65    }
66    #[doc = "`1`"]
67    #[inline(always)]
68    pub fn external_gmii_rgmii(self) -> &'a mut crate::W<REG> {
69        self.variant(ETCS_A::EXTERNAL_GMII_RGMII)
70    }
71    #[doc = "`10`"]
72    #[inline(always)]
73    pub fn internal_gmii_rgmii(self) -> &'a mut crate::W<REG> {
74        self.variant(ETCS_A::INTERNAL_GMII_RGMII)
75    }
76}
77#[doc = "Field `epit` reader - "]
78pub type EPIT_R = crate::BitReader<EPIT_A>;
79#[doc = "\n\nValue on reset: 0"]
80#[derive(Clone, Copy, Debug, PartialEq, Eq)]
81pub enum EPIT_A {
82    #[doc = "0: `0`"]
83    MII = 0,
84    #[doc = "1: `1`"]
85    RGMII = 1,
86}
87impl From<EPIT_A> for bool {
88    #[inline(always)]
89    fn from(variant: EPIT_A) -> Self {
90        variant as u8 != 0
91    }
92}
93impl EPIT_R {
94    #[doc = "Get enumerated values variant"]
95    #[inline(always)]
96    pub const fn variant(&self) -> EPIT_A {
97        match self.bits {
98            false => EPIT_A::MII,
99            true => EPIT_A::RGMII,
100        }
101    }
102    #[doc = "`0`"]
103    #[inline(always)]
104    pub fn is_mii(&self) -> bool {
105        *self == EPIT_A::MII
106    }
107    #[doc = "`1`"]
108    #[inline(always)]
109    pub fn is_rgmii(&self) -> bool {
110        *self == EPIT_A::RGMII
111    }
112}
113#[doc = "Field `epit` writer - "]
114pub type EPIT_W<'a, REG> = crate::BitWriter<'a, REG, EPIT_A>;
115impl<'a, REG> EPIT_W<'a, REG>
116where
117    REG: crate::Writable + crate::RegisterSpec,
118{
119    #[doc = "`0`"]
120    #[inline(always)]
121    pub fn mii(self) -> &'a mut crate::W<REG> {
122        self.variant(EPIT_A::MII)
123    }
124    #[doc = "`1`"]
125    #[inline(always)]
126    pub fn rgmii(self) -> &'a mut crate::W<REG> {
127        self.variant(EPIT_A::RGMII)
128    }
129}
130#[doc = "Field `etxie` reader - "]
131pub type ETXIE_R = crate::BitReader<ETXIE_A>;
132#[doc = "\n\nValue on reset: 0"]
133#[derive(Clone, Copy, Debug, PartialEq, Eq)]
134pub enum ETXIE_A {
135    #[doc = "0: `0`"]
136    DISABLE = 0,
137    #[doc = "1: `1`"]
138    ENABLE = 1,
139}
140impl From<ETXIE_A> for bool {
141    #[inline(always)]
142    fn from(variant: ETXIE_A) -> Self {
143        variant as u8 != 0
144    }
145}
146impl ETXIE_R {
147    #[doc = "Get enumerated values variant"]
148    #[inline(always)]
149    pub const fn variant(&self) -> ETXIE_A {
150        match self.bits {
151            false => ETXIE_A::DISABLE,
152            true => ETXIE_A::ENABLE,
153        }
154    }
155    #[doc = "`0`"]
156    #[inline(always)]
157    pub fn is_disable(&self) -> bool {
158        *self == ETXIE_A::DISABLE
159    }
160    #[doc = "`1`"]
161    #[inline(always)]
162    pub fn is_enable(&self) -> bool {
163        *self == ETXIE_A::ENABLE
164    }
165}
166#[doc = "Field `etxie` writer - "]
167pub type ETXIE_W<'a, REG> = crate::BitWriter<'a, REG, ETXIE_A>;
168impl<'a, REG> ETXIE_W<'a, REG>
169where
170    REG: crate::Writable + crate::RegisterSpec,
171{
172    #[doc = "`0`"]
173    #[inline(always)]
174    pub fn disable(self) -> &'a mut crate::W<REG> {
175        self.variant(ETXIE_A::DISABLE)
176    }
177    #[doc = "`1`"]
178    #[inline(always)]
179    pub fn enable(self) -> &'a mut crate::W<REG> {
180        self.variant(ETXIE_A::ENABLE)
181    }
182}
183#[doc = "Field `erxie` reader - "]
184pub type ERXIE_R = crate::BitReader<ERXIE_A>;
185#[doc = "\n\nValue on reset: 0"]
186#[derive(Clone, Copy, Debug, PartialEq, Eq)]
187pub enum ERXIE_A {
188    #[doc = "0: `0`"]
189    DISABLE = 0,
190    #[doc = "1: `1`"]
191    ENABLE = 1,
192}
193impl From<ERXIE_A> for bool {
194    #[inline(always)]
195    fn from(variant: ERXIE_A) -> Self {
196        variant as u8 != 0
197    }
198}
199impl ERXIE_R {
200    #[doc = "Get enumerated values variant"]
201    #[inline(always)]
202    pub const fn variant(&self) -> ERXIE_A {
203        match self.bits {
204            false => ERXIE_A::DISABLE,
205            true => ERXIE_A::ENABLE,
206        }
207    }
208    #[doc = "`0`"]
209    #[inline(always)]
210    pub fn is_disable(&self) -> bool {
211        *self == ERXIE_A::DISABLE
212    }
213    #[doc = "`1`"]
214    #[inline(always)]
215    pub fn is_enable(&self) -> bool {
216        *self == ERXIE_A::ENABLE
217    }
218}
219#[doc = "Field `erxie` writer - "]
220pub type ERXIE_W<'a, REG> = crate::BitWriter<'a, REG, ERXIE_A>;
221impl<'a, REG> ERXIE_W<'a, REG>
222where
223    REG: crate::Writable + crate::RegisterSpec,
224{
225    #[doc = "`0`"]
226    #[inline(always)]
227    pub fn disable(self) -> &'a mut crate::W<REG> {
228        self.variant(ERXIE_A::DISABLE)
229    }
230    #[doc = "`1`"]
231    #[inline(always)]
232    pub fn enable(self) -> &'a mut crate::W<REG> {
233        self.variant(ERXIE_A::ENABLE)
234    }
235}
236#[doc = "Field `erxdc` reader - "]
237pub type ERXDC_R = crate::FieldReader;
238#[doc = "Field `erxdc` writer - "]
239pub type ERXDC_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
240#[doc = "Field `etxdc` reader - "]
241pub type ETXDC_R = crate::FieldReader;
242#[doc = "Field `etxdc` writer - "]
243pub type ETXDC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
244#[doc = "Field `rmii_en` reader - "]
245pub type RMII_EN_R = crate::BitReader<RMII_EN_A>;
246#[doc = "\n\nValue on reset: 0"]
247#[derive(Clone, Copy, Debug, PartialEq, Eq)]
248pub enum RMII_EN_A {
249    #[doc = "0: `0`"]
250    DISABLE = 0,
251    #[doc = "1: `1`"]
252    ENABLE = 1,
253}
254impl From<RMII_EN_A> for bool {
255    #[inline(always)]
256    fn from(variant: RMII_EN_A) -> Self {
257        variant as u8 != 0
258    }
259}
260impl RMII_EN_R {
261    #[doc = "Get enumerated values variant"]
262    #[inline(always)]
263    pub const fn variant(&self) -> RMII_EN_A {
264        match self.bits {
265            false => RMII_EN_A::DISABLE,
266            true => RMII_EN_A::ENABLE,
267        }
268    }
269    #[doc = "`0`"]
270    #[inline(always)]
271    pub fn is_disable(&self) -> bool {
272        *self == RMII_EN_A::DISABLE
273    }
274    #[doc = "`1`"]
275    #[inline(always)]
276    pub fn is_enable(&self) -> bool {
277        *self == RMII_EN_A::ENABLE
278    }
279}
280#[doc = "Field `rmii_en` writer - "]
281pub type RMII_EN_W<'a, REG> = crate::BitWriter<'a, REG, RMII_EN_A>;
282impl<'a, REG> RMII_EN_W<'a, REG>
283where
284    REG: crate::Writable + crate::RegisterSpec,
285{
286    #[doc = "`0`"]
287    #[inline(always)]
288    pub fn disable(self) -> &'a mut crate::W<REG> {
289        self.variant(RMII_EN_A::DISABLE)
290    }
291    #[doc = "`1`"]
292    #[inline(always)]
293    pub fn enable(self) -> &'a mut crate::W<REG> {
294        self.variant(RMII_EN_A::ENABLE)
295    }
296}
297#[doc = "Field `phy_select` reader - "]
298pub type PHY_SELECT_R = crate::BitReader<PHY_SELECT_A>;
299#[doc = "\n\nValue on reset: 0"]
300#[derive(Clone, Copy, Debug, PartialEq, Eq)]
301pub enum PHY_SELECT_A {
302    #[doc = "0: `0`"]
303    EXTERNAL = 0,
304    #[doc = "1: `1`"]
305    INTERNAL = 1,
306}
307impl From<PHY_SELECT_A> for bool {
308    #[inline(always)]
309    fn from(variant: PHY_SELECT_A) -> Self {
310        variant as u8 != 0
311    }
312}
313impl PHY_SELECT_R {
314    #[doc = "Get enumerated values variant"]
315    #[inline(always)]
316    pub const fn variant(&self) -> PHY_SELECT_A {
317        match self.bits {
318            false => PHY_SELECT_A::EXTERNAL,
319            true => PHY_SELECT_A::INTERNAL,
320        }
321    }
322    #[doc = "`0`"]
323    #[inline(always)]
324    pub fn is_external(&self) -> bool {
325        *self == PHY_SELECT_A::EXTERNAL
326    }
327    #[doc = "`1`"]
328    #[inline(always)]
329    pub fn is_internal(&self) -> bool {
330        *self == PHY_SELECT_A::INTERNAL
331    }
332}
333#[doc = "Field `phy_select` writer - "]
334pub type PHY_SELECT_W<'a, REG> = crate::BitWriter<'a, REG, PHY_SELECT_A>;
335impl<'a, REG> PHY_SELECT_W<'a, REG>
336where
337    REG: crate::Writable + crate::RegisterSpec,
338{
339    #[doc = "`0`"]
340    #[inline(always)]
341    pub fn external(self) -> &'a mut crate::W<REG> {
342        self.variant(PHY_SELECT_A::EXTERNAL)
343    }
344    #[doc = "`1`"]
345    #[inline(always)]
346    pub fn internal(self) -> &'a mut crate::W<REG> {
347        self.variant(PHY_SELECT_A::INTERNAL)
348    }
349}
350#[doc = "Field `shutdown` reader - "]
351pub type SHUTDOWN_R = crate::BitReader<SHUTDOWN_A>;
352#[doc = "\n\nValue on reset: 0"]
353#[derive(Clone, Copy, Debug, PartialEq, Eq)]
354pub enum SHUTDOWN_A {
355    #[doc = "0: `0`"]
356    POWER_UP = 0,
357    #[doc = "1: `1`"]
358    SHUT_DOWN = 1,
359}
360impl From<SHUTDOWN_A> for bool {
361    #[inline(always)]
362    fn from(variant: SHUTDOWN_A) -> Self {
363        variant as u8 != 0
364    }
365}
366impl SHUTDOWN_R {
367    #[doc = "Get enumerated values variant"]
368    #[inline(always)]
369    pub const fn variant(&self) -> SHUTDOWN_A {
370        match self.bits {
371            false => SHUTDOWN_A::POWER_UP,
372            true => SHUTDOWN_A::SHUT_DOWN,
373        }
374    }
375    #[doc = "`0`"]
376    #[inline(always)]
377    pub fn is_power_up(&self) -> bool {
378        *self == SHUTDOWN_A::POWER_UP
379    }
380    #[doc = "`1`"]
381    #[inline(always)]
382    pub fn is_shut_down(&self) -> bool {
383        *self == SHUTDOWN_A::SHUT_DOWN
384    }
385}
386#[doc = "Field `shutdown` writer - "]
387pub type SHUTDOWN_W<'a, REG> = crate::BitWriter<'a, REG, SHUTDOWN_A>;
388impl<'a, REG> SHUTDOWN_W<'a, REG>
389where
390    REG: crate::Writable + crate::RegisterSpec,
391{
392    #[doc = "`0`"]
393    #[inline(always)]
394    pub fn power_up(self) -> &'a mut crate::W<REG> {
395        self.variant(SHUTDOWN_A::POWER_UP)
396    }
397    #[doc = "`1`"]
398    #[inline(always)]
399    pub fn shut_down(self) -> &'a mut crate::W<REG> {
400        self.variant(SHUTDOWN_A::SHUT_DOWN)
401    }
402}
403#[doc = "Field `led_pol` reader - "]
404pub type LED_POL_R = crate::BitReader<LED_POL_A>;
405#[doc = "\n\nValue on reset: 0"]
406#[derive(Clone, Copy, Debug, PartialEq, Eq)]
407pub enum LED_POL_A {
408    #[doc = "0: `0`"]
409    HIGH = 0,
410    #[doc = "1: `1`"]
411    LOW = 1,
412}
413impl From<LED_POL_A> for bool {
414    #[inline(always)]
415    fn from(variant: LED_POL_A) -> Self {
416        variant as u8 != 0
417    }
418}
419impl LED_POL_R {
420    #[doc = "Get enumerated values variant"]
421    #[inline(always)]
422    pub const fn variant(&self) -> LED_POL_A {
423        match self.bits {
424            false => LED_POL_A::HIGH,
425            true => LED_POL_A::LOW,
426        }
427    }
428    #[doc = "`0`"]
429    #[inline(always)]
430    pub fn is_high(&self) -> bool {
431        *self == LED_POL_A::HIGH
432    }
433    #[doc = "`1`"]
434    #[inline(always)]
435    pub fn is_low(&self) -> bool {
436        *self == LED_POL_A::LOW
437    }
438}
439#[doc = "Field `led_pol` writer - "]
440pub type LED_POL_W<'a, REG> = crate::BitWriter<'a, REG, LED_POL_A>;
441impl<'a, REG> LED_POL_W<'a, REG>
442where
443    REG: crate::Writable + crate::RegisterSpec,
444{
445    #[doc = "`0`"]
446    #[inline(always)]
447    pub fn high(self) -> &'a mut crate::W<REG> {
448        self.variant(LED_POL_A::HIGH)
449    }
450    #[doc = "`1`"]
451    #[inline(always)]
452    pub fn low(self) -> &'a mut crate::W<REG> {
453        self.variant(LED_POL_A::LOW)
454    }
455}
456#[doc = "Field `clk_sel` reader - "]
457pub type CLK_SEL_R = crate::BitReader<CLK_SEL_A>;
458#[doc = "\n\nValue on reset: 0"]
459#[derive(Clone, Copy, Debug, PartialEq, Eq)]
460pub enum CLK_SEL_A {
461    #[doc = "0: `0`"]
462    F25M = 0,
463    #[doc = "1: `1`"]
464    F24M = 1,
465}
466impl From<CLK_SEL_A> for bool {
467    #[inline(always)]
468    fn from(variant: CLK_SEL_A) -> Self {
469        variant as u8 != 0
470    }
471}
472impl CLK_SEL_R {
473    #[doc = "Get enumerated values variant"]
474    #[inline(always)]
475    pub const fn variant(&self) -> CLK_SEL_A {
476        match self.bits {
477            false => CLK_SEL_A::F25M,
478            true => CLK_SEL_A::F24M,
479        }
480    }
481    #[doc = "`0`"]
482    #[inline(always)]
483    pub fn is_f25m(&self) -> bool {
484        *self == CLK_SEL_A::F25M
485    }
486    #[doc = "`1`"]
487    #[inline(always)]
488    pub fn is_f24m(&self) -> bool {
489        *self == CLK_SEL_A::F24M
490    }
491}
492#[doc = "Field `clk_sel` writer - "]
493pub type CLK_SEL_W<'a, REG> = crate::BitWriter<'a, REG, CLK_SEL_A>;
494impl<'a, REG> CLK_SEL_W<'a, REG>
495where
496    REG: crate::Writable + crate::RegisterSpec,
497{
498    #[doc = "`0`"]
499    #[inline(always)]
500    pub fn f25m(self) -> &'a mut crate::W<REG> {
501        self.variant(CLK_SEL_A::F25M)
502    }
503    #[doc = "`1`"]
504    #[inline(always)]
505    pub fn f24m(self) -> &'a mut crate::W<REG> {
506        self.variant(CLK_SEL_A::F24M)
507    }
508}
509#[doc = "Field `phy_addr` reader - "]
510pub type PHY_ADDR_R = crate::FieldReader;
511#[doc = "Field `phy_addr` writer - "]
512pub type PHY_ADDR_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
513#[doc = "Field `ephy_mode` reader - "]
514pub type EPHY_MODE_R = crate::FieldReader<EPHY_MODE_A>;
515#[doc = "\n\nValue on reset: 0"]
516#[derive(Clone, Copy, Debug, PartialEq, Eq)]
517#[repr(u8)]
518pub enum EPHY_MODE_A {
519    #[doc = "0: `0`"]
520    NORMAL = 0,
521    #[doc = "1: `1`"]
522    SIMULATION = 1,
523    #[doc = "2: `10`"]
524    AFE_TEST = 2,
525}
526impl From<EPHY_MODE_A> for u8 {
527    #[inline(always)]
528    fn from(variant: EPHY_MODE_A) -> Self {
529        variant as _
530    }
531}
532impl crate::FieldSpec for EPHY_MODE_A {
533    type Ux = u8;
534}
535impl EPHY_MODE_R {
536    #[doc = "Get enumerated values variant"]
537    #[inline(always)]
538    pub const fn variant(&self) -> Option<EPHY_MODE_A> {
539        match self.bits {
540            0 => Some(EPHY_MODE_A::NORMAL),
541            1 => Some(EPHY_MODE_A::SIMULATION),
542            2 => Some(EPHY_MODE_A::AFE_TEST),
543            _ => None,
544        }
545    }
546    #[doc = "`0`"]
547    #[inline(always)]
548    pub fn is_normal(&self) -> bool {
549        *self == EPHY_MODE_A::NORMAL
550    }
551    #[doc = "`1`"]
552    #[inline(always)]
553    pub fn is_simulation(&self) -> bool {
554        *self == EPHY_MODE_A::SIMULATION
555    }
556    #[doc = "`10`"]
557    #[inline(always)]
558    pub fn is_afe_test(&self) -> bool {
559        *self == EPHY_MODE_A::AFE_TEST
560    }
561}
562#[doc = "Field `ephy_mode` writer - "]
563pub type EPHY_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2, EPHY_MODE_A>;
564impl<'a, REG> EPHY_MODE_W<'a, REG>
565where
566    REG: crate::Writable + crate::RegisterSpec,
567    REG::Ux: From<u8>,
568{
569    #[doc = "`0`"]
570    #[inline(always)]
571    pub fn normal(self) -> &'a mut crate::W<REG> {
572        self.variant(EPHY_MODE_A::NORMAL)
573    }
574    #[doc = "`1`"]
575    #[inline(always)]
576    pub fn simulation(self) -> &'a mut crate::W<REG> {
577        self.variant(EPHY_MODE_A::SIMULATION)
578    }
579    #[doc = "`10`"]
580    #[inline(always)]
581    pub fn afe_test(self) -> &'a mut crate::W<REG> {
582        self.variant(EPHY_MODE_A::AFE_TEST)
583    }
584}
585#[doc = "Field `xmii_sel` reader - "]
586pub type XMII_SEL_R = crate::BitReader<XMII_SEL_A>;
587#[doc = "\n\nValue on reset: 0"]
588#[derive(Clone, Copy, Debug, PartialEq, Eq)]
589pub enum XMII_SEL_A {
590    #[doc = "0: `0`"]
591    INTERNAL = 0,
592    #[doc = "1: `1`"]
593    EXTERNAL = 1,
594}
595impl From<XMII_SEL_A> for bool {
596    #[inline(always)]
597    fn from(variant: XMII_SEL_A) -> Self {
598        variant as u8 != 0
599    }
600}
601impl XMII_SEL_R {
602    #[doc = "Get enumerated values variant"]
603    #[inline(always)]
604    pub const fn variant(&self) -> XMII_SEL_A {
605        match self.bits {
606            false => XMII_SEL_A::INTERNAL,
607            true => XMII_SEL_A::EXTERNAL,
608        }
609    }
610    #[doc = "`0`"]
611    #[inline(always)]
612    pub fn is_internal(&self) -> bool {
613        *self == XMII_SEL_A::INTERNAL
614    }
615    #[doc = "`1`"]
616    #[inline(always)]
617    pub fn is_external(&self) -> bool {
618        *self == XMII_SEL_A::EXTERNAL
619    }
620}
621#[doc = "Field `xmii_sel` writer - "]
622pub type XMII_SEL_W<'a, REG> = crate::BitWriter<'a, REG, XMII_SEL_A>;
623impl<'a, REG> XMII_SEL_W<'a, REG>
624where
625    REG: crate::Writable + crate::RegisterSpec,
626{
627    #[doc = "`0`"]
628    #[inline(always)]
629    pub fn internal(self) -> &'a mut crate::W<REG> {
630        self.variant(XMII_SEL_A::INTERNAL)
631    }
632    #[doc = "`1`"]
633    #[inline(always)]
634    pub fn external(self) -> &'a mut crate::W<REG> {
635        self.variant(XMII_SEL_A::EXTERNAL)
636    }
637}
638#[doc = "Field `bps_efuse` reader - "]
639pub type BPS_EFUSE_R = crate::FieldReader;
640#[doc = "Field `bps_efuse` writer - "]
641pub type BPS_EFUSE_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
642impl R {
643    #[doc = "Bits 0:1"]
644    #[inline(always)]
645    pub fn etcs(&self) -> ETCS_R {
646        ETCS_R::new((self.bits & 3) as u8)
647    }
648    #[doc = "Bit 2"]
649    #[inline(always)]
650    pub fn epit(&self) -> EPIT_R {
651        EPIT_R::new(((self.bits >> 2) & 1) != 0)
652    }
653    #[doc = "Bit 3"]
654    #[inline(always)]
655    pub fn etxie(&self) -> ETXIE_R {
656        ETXIE_R::new(((self.bits >> 3) & 1) != 0)
657    }
658    #[doc = "Bit 4"]
659    #[inline(always)]
660    pub fn erxie(&self) -> ERXIE_R {
661        ERXIE_R::new(((self.bits >> 4) & 1) != 0)
662    }
663    #[doc = "Bits 5:9"]
664    #[inline(always)]
665    pub fn erxdc(&self) -> ERXDC_R {
666        ERXDC_R::new(((self.bits >> 5) & 0x1f) as u8)
667    }
668    #[doc = "Bits 10:12"]
669    #[inline(always)]
670    pub fn etxdc(&self) -> ETXDC_R {
671        ETXDC_R::new(((self.bits >> 10) & 7) as u8)
672    }
673    #[doc = "Bit 13"]
674    #[inline(always)]
675    pub fn rmii_en(&self) -> RMII_EN_R {
676        RMII_EN_R::new(((self.bits >> 13) & 1) != 0)
677    }
678    #[doc = "Bit 15"]
679    #[inline(always)]
680    pub fn phy_select(&self) -> PHY_SELECT_R {
681        PHY_SELECT_R::new(((self.bits >> 15) & 1) != 0)
682    }
683    #[doc = "Bit 16"]
684    #[inline(always)]
685    pub fn shutdown(&self) -> SHUTDOWN_R {
686        SHUTDOWN_R::new(((self.bits >> 16) & 1) != 0)
687    }
688    #[doc = "Bit 17"]
689    #[inline(always)]
690    pub fn led_pol(&self) -> LED_POL_R {
691        LED_POL_R::new(((self.bits >> 17) & 1) != 0)
692    }
693    #[doc = "Bit 18"]
694    #[inline(always)]
695    pub fn clk_sel(&self) -> CLK_SEL_R {
696        CLK_SEL_R::new(((self.bits >> 18) & 1) != 0)
697    }
698    #[doc = "Bits 20:24"]
699    #[inline(always)]
700    pub fn phy_addr(&self) -> PHY_ADDR_R {
701        PHY_ADDR_R::new(((self.bits >> 20) & 0x1f) as u8)
702    }
703    #[doc = "Bits 25:26"]
704    #[inline(always)]
705    pub fn ephy_mode(&self) -> EPHY_MODE_R {
706        EPHY_MODE_R::new(((self.bits >> 25) & 3) as u8)
707    }
708    #[doc = "Bit 27"]
709    #[inline(always)]
710    pub fn xmii_sel(&self) -> XMII_SEL_R {
711        XMII_SEL_R::new(((self.bits >> 27) & 1) != 0)
712    }
713    #[doc = "Bits 28:31"]
714    #[inline(always)]
715    pub fn bps_efuse(&self) -> BPS_EFUSE_R {
716        BPS_EFUSE_R::new(((self.bits >> 28) & 0x0f) as u8)
717    }
718}
719impl W {
720    #[doc = "Bits 0:1"]
721    #[inline(always)]
722    #[must_use]
723    pub fn etcs(&mut self) -> ETCS_W<EMAC_EPHY_CLK0_SPEC> {
724        ETCS_W::new(self, 0)
725    }
726    #[doc = "Bit 2"]
727    #[inline(always)]
728    #[must_use]
729    pub fn epit(&mut self) -> EPIT_W<EMAC_EPHY_CLK0_SPEC> {
730        EPIT_W::new(self, 2)
731    }
732    #[doc = "Bit 3"]
733    #[inline(always)]
734    #[must_use]
735    pub fn etxie(&mut self) -> ETXIE_W<EMAC_EPHY_CLK0_SPEC> {
736        ETXIE_W::new(self, 3)
737    }
738    #[doc = "Bit 4"]
739    #[inline(always)]
740    #[must_use]
741    pub fn erxie(&mut self) -> ERXIE_W<EMAC_EPHY_CLK0_SPEC> {
742        ERXIE_W::new(self, 4)
743    }
744    #[doc = "Bits 5:9"]
745    #[inline(always)]
746    #[must_use]
747    pub fn erxdc(&mut self) -> ERXDC_W<EMAC_EPHY_CLK0_SPEC> {
748        ERXDC_W::new(self, 5)
749    }
750    #[doc = "Bits 10:12"]
751    #[inline(always)]
752    #[must_use]
753    pub fn etxdc(&mut self) -> ETXDC_W<EMAC_EPHY_CLK0_SPEC> {
754        ETXDC_W::new(self, 10)
755    }
756    #[doc = "Bit 13"]
757    #[inline(always)]
758    #[must_use]
759    pub fn rmii_en(&mut self) -> RMII_EN_W<EMAC_EPHY_CLK0_SPEC> {
760        RMII_EN_W::new(self, 13)
761    }
762    #[doc = "Bit 15"]
763    #[inline(always)]
764    #[must_use]
765    pub fn phy_select(&mut self) -> PHY_SELECT_W<EMAC_EPHY_CLK0_SPEC> {
766        PHY_SELECT_W::new(self, 15)
767    }
768    #[doc = "Bit 16"]
769    #[inline(always)]
770    #[must_use]
771    pub fn shutdown(&mut self) -> SHUTDOWN_W<EMAC_EPHY_CLK0_SPEC> {
772        SHUTDOWN_W::new(self, 16)
773    }
774    #[doc = "Bit 17"]
775    #[inline(always)]
776    #[must_use]
777    pub fn led_pol(&mut self) -> LED_POL_W<EMAC_EPHY_CLK0_SPEC> {
778        LED_POL_W::new(self, 17)
779    }
780    #[doc = "Bit 18"]
781    #[inline(always)]
782    #[must_use]
783    pub fn clk_sel(&mut self) -> CLK_SEL_W<EMAC_EPHY_CLK0_SPEC> {
784        CLK_SEL_W::new(self, 18)
785    }
786    #[doc = "Bits 20:24"]
787    #[inline(always)]
788    #[must_use]
789    pub fn phy_addr(&mut self) -> PHY_ADDR_W<EMAC_EPHY_CLK0_SPEC> {
790        PHY_ADDR_W::new(self, 20)
791    }
792    #[doc = "Bits 25:26"]
793    #[inline(always)]
794    #[must_use]
795    pub fn ephy_mode(&mut self) -> EPHY_MODE_W<EMAC_EPHY_CLK0_SPEC> {
796        EPHY_MODE_W::new(self, 25)
797    }
798    #[doc = "Bit 27"]
799    #[inline(always)]
800    #[must_use]
801    pub fn xmii_sel(&mut self) -> XMII_SEL_W<EMAC_EPHY_CLK0_SPEC> {
802        XMII_SEL_W::new(self, 27)
803    }
804    #[doc = "Bits 28:31"]
805    #[inline(always)]
806    #[must_use]
807    pub fn bps_efuse(&mut self) -> BPS_EFUSE_W<EMAC_EPHY_CLK0_SPEC> {
808        BPS_EFUSE_W::new(self, 28)
809    }
810    #[doc = r" Writes raw bits to the register."]
811    #[doc = r""]
812    #[doc = r" # Safety"]
813    #[doc = r""]
814    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
815    #[inline(always)]
816    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
817        self.bits = bits;
818        self
819    }
820}
821#[doc = "EMAC-EPHY Clock Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`emac_ephy_clk0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`emac_ephy_clk0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
822pub struct EMAC_EPHY_CLK0_SPEC;
823impl crate::RegisterSpec for EMAC_EPHY_CLK0_SPEC {
824    type Ux = u32;
825}
826#[doc = "`read()` method returns [`emac_ephy_clk0::R`](R) reader structure"]
827impl crate::Readable for EMAC_EPHY_CLK0_SPEC {}
828#[doc = "`write(|w| ..)` method takes [`emac_ephy_clk0::W`](W) writer structure"]
829impl crate::Writable for EMAC_EPHY_CLK0_SPEC {
830    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
831    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
832}
833#[doc = "`reset()` method sets emac_ephy_clk0 to value 0"]
834impl crate::Resettable for EMAC_EPHY_CLK0_SPEC {
835    const RESET_VALUE: Self::Ux = 0;
836}
d1_pac/sys_cfg/emac_ephy_clk0.rs

d1_pac/sys_cfg/
emac_ephy_clk0.rs
