1#[doc = "Register `dbi_ctl_0` reader"]
2pub type R = crate::R<DBI_CTL_0_SPEC>;
3#[doc = "Register `dbi_ctl_0` writer"]
4pub type W = crate::W<DBI_CTL_0_SPEC>;
5#[doc = "Field `vi_src_type` reader - Video Source Type"]
6pub type VI_SRC_TYPE_R = crate::BitReader<VI_SRC_TYPE_A>;
7#[doc = "Video Source Type\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum VI_SRC_TYPE_A {
10 #[doc = "0: `0`"]
11 RGB32 = 0,
12 #[doc = "1: `1`"]
13 RGB16 = 1,
14}
15impl From<VI_SRC_TYPE_A> for bool {
16 #[inline(always)]
17 fn from(variant: VI_SRC_TYPE_A) -> Self {
18 variant as u8 != 0
19 }
20}
21impl VI_SRC_TYPE_R {
22 #[doc = "Get enumerated values variant"]
23 #[inline(always)]
24 pub const fn variant(&self) -> VI_SRC_TYPE_A {
25 match self.bits {
26 false => VI_SRC_TYPE_A::RGB32,
27 true => VI_SRC_TYPE_A::RGB16,
28 }
29 }
30 #[doc = "`0`"]
31 #[inline(always)]
32 pub fn is_rgb32(&self) -> bool {
33 *self == VI_SRC_TYPE_A::RGB32
34 }
35 #[doc = "`1`"]
36 #[inline(always)]
37 pub fn is_rgb16(&self) -> bool {
38 *self == VI_SRC_TYPE_A::RGB16
39 }
40}
41#[doc = "Field `vi_src_type` writer - Video Source Type"]
42pub type VI_SRC_TYPE_W<'a, REG> = crate::BitWriter<'a, REG, VI_SRC_TYPE_A>;
43impl<'a, REG> VI_SRC_TYPE_W<'a, REG>
44where
45 REG: crate::Writable + crate::RegisterSpec,
46{
47 #[doc = "`0`"]
48 #[inline(always)]
49 pub fn rgb32(self) -> &'a mut crate::W<REG> {
50 self.variant(VI_SRC_TYPE_A::RGB32)
51 }
52 #[doc = "`1`"]
53 #[inline(always)]
54 pub fn rgb16(self) -> &'a mut crate::W<REG> {
55 self.variant(VI_SRC_TYPE_A::RGB16)
56 }
57}
58#[doc = "Field `element_a_pos` reader - Element A Position"]
59pub type ELEMENT_A_POS_R = crate::BitReader<ELEMENT_A_POS_A>;
60#[doc = "Element A Position\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum ELEMENT_A_POS_A {
63 #[doc = "0: `0`"]
64 _31_24 = 0,
65 #[doc = "1: `1`"]
66 _7_0 = 1,
67}
68impl From<ELEMENT_A_POS_A> for bool {
69 #[inline(always)]
70 fn from(variant: ELEMENT_A_POS_A) -> Self {
71 variant as u8 != 0
72 }
73}
74impl ELEMENT_A_POS_R {
75 #[doc = "Get enumerated values variant"]
76 #[inline(always)]
77 pub const fn variant(&self) -> ELEMENT_A_POS_A {
78 match self.bits {
79 false => ELEMENT_A_POS_A::_31_24,
80 true => ELEMENT_A_POS_A::_7_0,
81 }
82 }
83 #[doc = "`0`"]
84 #[inline(always)]
85 pub fn is_31_24(&self) -> bool {
86 *self == ELEMENT_A_POS_A::_31_24
87 }
88 #[doc = "`1`"]
89 #[inline(always)]
90 pub fn is_7_0(&self) -> bool {
91 *self == ELEMENT_A_POS_A::_7_0
92 }
93}
94#[doc = "Field `element_a_pos` writer - Element A Position"]
95pub type ELEMENT_A_POS_W<'a, REG> = crate::BitWriter<'a, REG, ELEMENT_A_POS_A>;
96impl<'a, REG> ELEMENT_A_POS_W<'a, REG>
97where
98 REG: crate::Writable + crate::RegisterSpec,
99{
100 #[doc = "`0`"]
101 #[inline(always)]
102 pub fn _31_24(self) -> &'a mut crate::W<REG> {
103 self.variant(ELEMENT_A_POS_A::_31_24)
104 }
105 #[doc = "`1`"]
106 #[inline(always)]
107 pub fn _7_0(self) -> &'a mut crate::W<REG> {
108 self.variant(ELEMENT_A_POS_A::_7_0)
109 }
110}
111#[doc = "Field `rgb_bo` reader - RGB Bit Order"]
112pub type RGB_BO_R = crate::BitReader<RGB_BO_A>;
113#[doc = "RGB Bit Order\n\nValue on reset: 0"]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115pub enum RGB_BO_A {
116 #[doc = "0: `0`"]
117 DATA = 0,
118 #[doc = "1: `1`"]
119 SWAP = 1,
120}
121impl From<RGB_BO_A> for bool {
122 #[inline(always)]
123 fn from(variant: RGB_BO_A) -> Self {
124 variant as u8 != 0
125 }
126}
127impl RGB_BO_R {
128 #[doc = "Get enumerated values variant"]
129 #[inline(always)]
130 pub const fn variant(&self) -> RGB_BO_A {
131 match self.bits {
132 false => RGB_BO_A::DATA,
133 true => RGB_BO_A::SWAP,
134 }
135 }
136 #[doc = "`0`"]
137 #[inline(always)]
138 pub fn is_data(&self) -> bool {
139 *self == RGB_BO_A::DATA
140 }
141 #[doc = "`1`"]
142 #[inline(always)]
143 pub fn is_swap(&self) -> bool {
144 *self == RGB_BO_A::SWAP
145 }
146}
147#[doc = "Field `rgb_bo` writer - RGB Bit Order"]
148pub type RGB_BO_W<'a, REG> = crate::BitWriter<'a, REG, RGB_BO_A>;
149impl<'a, REG> RGB_BO_W<'a, REG>
150where
151 REG: crate::Writable + crate::RegisterSpec,
152{
153 #[doc = "`0`"]
154 #[inline(always)]
155 pub fn data(self) -> &'a mut crate::W<REG> {
156 self.variant(RGB_BO_A::DATA)
157 }
158 #[doc = "`1`"]
159 #[inline(always)]
160 pub fn swap(self) -> &'a mut crate::W<REG> {
161 self.variant(RGB_BO_A::SWAP)
162 }
163}
164#[doc = "Field `dum_val` reader - Dummy Cycle Value"]
165pub type DUM_VAL_R = crate::BitReader;
166#[doc = "Field `dum_val` writer - Dummy Cycle Value"]
167pub type DUM_VAL_W<'a, REG> = crate::BitWriter<'a, REG>;
168#[doc = "Field `rgb_src_fmt` reader - RGB Source Format"]
169pub type RGB_SRC_FMT_R = crate::FieldReader<RGB_SRC_FMT_A>;
170#[doc = "RGB Source Format\n\nValue on reset: 0"]
171#[derive(Clone, Copy, Debug, PartialEq, Eq)]
172#[repr(u8)]
173pub enum RGB_SRC_FMT_A {
174 #[doc = "0: `0`"]
175 RGB = 0,
176 #[doc = "1: `1`"]
177 RBG = 1,
178 #[doc = "2: `10`"]
179 GRB = 2,
180 #[doc = "3: `11`"]
181 GBR = 3,
182 #[doc = "4: `100`"]
183 BRG = 4,
184 #[doc = "5: `101`"]
185 BGR = 5,
186 #[doc = "6: `110`"]
187 GRBG_0 = 6,
188 #[doc = "7: `111`"]
189 GBRG_0 = 7,
190 #[doc = "8: `1000`"]
191 GRBG_1 = 8,
192 #[doc = "9: `1001`"]
193 GBRG_1 = 9,
194}
195impl From<RGB_SRC_FMT_A> for u8 {
196 #[inline(always)]
197 fn from(variant: RGB_SRC_FMT_A) -> Self {
198 variant as _
199 }
200}
201impl crate::FieldSpec for RGB_SRC_FMT_A {
202 type Ux = u8;
203}
204impl RGB_SRC_FMT_R {
205 #[doc = "Get enumerated values variant"]
206 #[inline(always)]
207 pub const fn variant(&self) -> Option<RGB_SRC_FMT_A> {
208 match self.bits {
209 0 => Some(RGB_SRC_FMT_A::RGB),
210 1 => Some(RGB_SRC_FMT_A::RBG),
211 2 => Some(RGB_SRC_FMT_A::GRB),
212 3 => Some(RGB_SRC_FMT_A::GBR),
213 4 => Some(RGB_SRC_FMT_A::BRG),
214 5 => Some(RGB_SRC_FMT_A::BGR),
215 6 => Some(RGB_SRC_FMT_A::GRBG_0),
216 7 => Some(RGB_SRC_FMT_A::GBRG_0),
217 8 => Some(RGB_SRC_FMT_A::GRBG_1),
218 9 => Some(RGB_SRC_FMT_A::GBRG_1),
219 _ => None,
220 }
221 }
222 #[doc = "`0`"]
223 #[inline(always)]
224 pub fn is_rgb(&self) -> bool {
225 *self == RGB_SRC_FMT_A::RGB
226 }
227 #[doc = "`1`"]
228 #[inline(always)]
229 pub fn is_rbg(&self) -> bool {
230 *self == RGB_SRC_FMT_A::RBG
231 }
232 #[doc = "`10`"]
233 #[inline(always)]
234 pub fn is_grb(&self) -> bool {
235 *self == RGB_SRC_FMT_A::GRB
236 }
237 #[doc = "`11`"]
238 #[inline(always)]
239 pub fn is_gbr(&self) -> bool {
240 *self == RGB_SRC_FMT_A::GBR
241 }
242 #[doc = "`100`"]
243 #[inline(always)]
244 pub fn is_brg(&self) -> bool {
245 *self == RGB_SRC_FMT_A::BRG
246 }
247 #[doc = "`101`"]
248 #[inline(always)]
249 pub fn is_bgr(&self) -> bool {
250 *self == RGB_SRC_FMT_A::BGR
251 }
252 #[doc = "`110`"]
253 #[inline(always)]
254 pub fn is_grbg_0(&self) -> bool {
255 *self == RGB_SRC_FMT_A::GRBG_0
256 }
257 #[doc = "`111`"]
258 #[inline(always)]
259 pub fn is_gbrg_0(&self) -> bool {
260 *self == RGB_SRC_FMT_A::GBRG_0
261 }
262 #[doc = "`1000`"]
263 #[inline(always)]
264 pub fn is_grbg_1(&self) -> bool {
265 *self == RGB_SRC_FMT_A::GRBG_1
266 }
267 #[doc = "`1001`"]
268 #[inline(always)]
269 pub fn is_gbrg_1(&self) -> bool {
270 *self == RGB_SRC_FMT_A::GBRG_1
271 }
272}
273#[doc = "Field `rgb_src_fmt` writer - RGB Source Format"]
274pub type RGB_SRC_FMT_W<'a, REG> = crate::FieldWriter<'a, REG, 4, RGB_SRC_FMT_A>;
275impl<'a, REG> RGB_SRC_FMT_W<'a, REG>
276where
277 REG: crate::Writable + crate::RegisterSpec,
278 REG::Ux: From<u8>,
279{
280 #[doc = "`0`"]
281 #[inline(always)]
282 pub fn rgb(self) -> &'a mut crate::W<REG> {
283 self.variant(RGB_SRC_FMT_A::RGB)
284 }
285 #[doc = "`1`"]
286 #[inline(always)]
287 pub fn rbg(self) -> &'a mut crate::W<REG> {
288 self.variant(RGB_SRC_FMT_A::RBG)
289 }
290 #[doc = "`10`"]
291 #[inline(always)]
292 pub fn grb(self) -> &'a mut crate::W<REG> {
293 self.variant(RGB_SRC_FMT_A::GRB)
294 }
295 #[doc = "`11`"]
296 #[inline(always)]
297 pub fn gbr(self) -> &'a mut crate::W<REG> {
298 self.variant(RGB_SRC_FMT_A::GBR)
299 }
300 #[doc = "`100`"]
301 #[inline(always)]
302 pub fn brg(self) -> &'a mut crate::W<REG> {
303 self.variant(RGB_SRC_FMT_A::BRG)
304 }
305 #[doc = "`101`"]
306 #[inline(always)]
307 pub fn bgr(self) -> &'a mut crate::W<REG> {
308 self.variant(RGB_SRC_FMT_A::BGR)
309 }
310 #[doc = "`110`"]
311 #[inline(always)]
312 pub fn grbg_0(self) -> &'a mut crate::W<REG> {
313 self.variant(RGB_SRC_FMT_A::GRBG_0)
314 }
315 #[doc = "`111`"]
316 #[inline(always)]
317 pub fn gbrg_0(self) -> &'a mut crate::W<REG> {
318 self.variant(RGB_SRC_FMT_A::GBRG_0)
319 }
320 #[doc = "`1000`"]
321 #[inline(always)]
322 pub fn grbg_1(self) -> &'a mut crate::W<REG> {
323 self.variant(RGB_SRC_FMT_A::GRBG_1)
324 }
325 #[doc = "`1001`"]
326 #[inline(always)]
327 pub fn gbrg_1(self) -> &'a mut crate::W<REG> {
328 self.variant(RGB_SRC_FMT_A::GBRG_1)
329 }
330}
331#[doc = "Field `dbi_interface` reader - "]
332pub type DBI_INTERFACE_R = crate::FieldReader<DBI_INTERFACE_A>;
333#[doc = "\n\nValue on reset: 0"]
334#[derive(Clone, Copy, Debug, PartialEq, Eq)]
335#[repr(u8)]
336pub enum DBI_INTERFACE_A {
337 #[doc = "0: 3 Line Interface I"]
338 L3I1 = 0,
339 #[doc = "1: 3 Line Interface II"]
340 L3I2 = 1,
341 #[doc = "2: 4 Line Interface I"]
342 L4I1 = 2,
343 #[doc = "3: 4 Line Interface II"]
344 L4I2 = 3,
345 #[doc = "4: 2 Data Lane Interface"]
346 D2LI = 4,
347}
348impl From<DBI_INTERFACE_A> for u8 {
349 #[inline(always)]
350 fn from(variant: DBI_INTERFACE_A) -> Self {
351 variant as _
352 }
353}
354impl crate::FieldSpec for DBI_INTERFACE_A {
355 type Ux = u8;
356}
357impl DBI_INTERFACE_R {
358 #[doc = "Get enumerated values variant"]
359 #[inline(always)]
360 pub const fn variant(&self) -> Option<DBI_INTERFACE_A> {
361 match self.bits {
362 0 => Some(DBI_INTERFACE_A::L3I1),
363 1 => Some(DBI_INTERFACE_A::L3I2),
364 2 => Some(DBI_INTERFACE_A::L4I1),
365 3 => Some(DBI_INTERFACE_A::L4I2),
366 4 => Some(DBI_INTERFACE_A::D2LI),
367 _ => None,
368 }
369 }
370 #[doc = "3 Line Interface I"]
371 #[inline(always)]
372 pub fn is_l3i1(&self) -> bool {
373 *self == DBI_INTERFACE_A::L3I1
374 }
375 #[doc = "3 Line Interface II"]
376 #[inline(always)]
377 pub fn is_l3i2(&self) -> bool {
378 *self == DBI_INTERFACE_A::L3I2
379 }
380 #[doc = "4 Line Interface I"]
381 #[inline(always)]
382 pub fn is_l4i1(&self) -> bool {
383 *self == DBI_INTERFACE_A::L4I1
384 }
385 #[doc = "4 Line Interface II"]
386 #[inline(always)]
387 pub fn is_l4i2(&self) -> bool {
388 *self == DBI_INTERFACE_A::L4I2
389 }
390 #[doc = "2 Data Lane Interface"]
391 #[inline(always)]
392 pub fn is_d2li(&self) -> bool {
393 *self == DBI_INTERFACE_A::D2LI
394 }
395}
396#[doc = "Field `dbi_interface` writer - "]
397pub type DBI_INTERFACE_W<'a, REG> = crate::FieldWriter<'a, REG, 3, DBI_INTERFACE_A>;
398impl<'a, REG> DBI_INTERFACE_W<'a, REG>
399where
400 REG: crate::Writable + crate::RegisterSpec,
401 REG::Ux: From<u8>,
402{
403 #[doc = "3 Line Interface I"]
404 #[inline(always)]
405 pub fn l3i1(self) -> &'a mut crate::W<REG> {
406 self.variant(DBI_INTERFACE_A::L3I1)
407 }
408 #[doc = "3 Line Interface II"]
409 #[inline(always)]
410 pub fn l3i2(self) -> &'a mut crate::W<REG> {
411 self.variant(DBI_INTERFACE_A::L3I2)
412 }
413 #[doc = "4 Line Interface I"]
414 #[inline(always)]
415 pub fn l4i1(self) -> &'a mut crate::W<REG> {
416 self.variant(DBI_INTERFACE_A::L4I1)
417 }
418 #[doc = "4 Line Interface II"]
419 #[inline(always)]
420 pub fn l4i2(self) -> &'a mut crate::W<REG> {
421 self.variant(DBI_INTERFACE_A::L4I2)
422 }
423 #[doc = "2 Data Lane Interface"]
424 #[inline(always)]
425 pub fn d2li(self) -> &'a mut crate::W<REG> {
426 self.variant(DBI_INTERFACE_A::D2LI)
427 }
428}
429#[doc = "Field `dat_fmt` reader - Output Data Format"]
430pub type DAT_FMT_R = crate::FieldReader<DAT_FMT_A>;
431#[doc = "Output Data Format\n\nValue on reset: 0"]
432#[derive(Clone, Copy, Debug, PartialEq, Eq)]
433#[repr(u8)]
434pub enum DAT_FMT_A {
435 #[doc = "0: `0`"]
436 RGB111 = 0,
437 #[doc = "1: `1`"]
438 RGB444 = 1,
439 #[doc = "2: `10`"]
440 RGB565 = 2,
441 #[doc = "3: `11`"]
442 RGB666 = 3,
443 #[doc = "4: `100`"]
444 RGB888 = 4,
445}
446impl From<DAT_FMT_A> for u8 {
447 #[inline(always)]
448 fn from(variant: DAT_FMT_A) -> Self {
449 variant as _
450 }
451}
452impl crate::FieldSpec for DAT_FMT_A {
453 type Ux = u8;
454}
455impl DAT_FMT_R {
456 #[doc = "Get enumerated values variant"]
457 #[inline(always)]
458 pub const fn variant(&self) -> Option<DAT_FMT_A> {
459 match self.bits {
460 0 => Some(DAT_FMT_A::RGB111),
461 1 => Some(DAT_FMT_A::RGB444),
462 2 => Some(DAT_FMT_A::RGB565),
463 3 => Some(DAT_FMT_A::RGB666),
464 4 => Some(DAT_FMT_A::RGB888),
465 _ => None,
466 }
467 }
468 #[doc = "`0`"]
469 #[inline(always)]
470 pub fn is_rgb111(&self) -> bool {
471 *self == DAT_FMT_A::RGB111
472 }
473 #[doc = "`1`"]
474 #[inline(always)]
475 pub fn is_rgb444(&self) -> bool {
476 *self == DAT_FMT_A::RGB444
477 }
478 #[doc = "`10`"]
479 #[inline(always)]
480 pub fn is_rgb565(&self) -> bool {
481 *self == DAT_FMT_A::RGB565
482 }
483 #[doc = "`11`"]
484 #[inline(always)]
485 pub fn is_rgb666(&self) -> bool {
486 *self == DAT_FMT_A::RGB666
487 }
488 #[doc = "`100`"]
489 #[inline(always)]
490 pub fn is_rgb888(&self) -> bool {
491 *self == DAT_FMT_A::RGB888
492 }
493}
494#[doc = "Field `dat_fmt` writer - Output Data Format"]
495pub type DAT_FMT_W<'a, REG> = crate::FieldWriter<'a, REG, 3, DAT_FMT_A>;
496impl<'a, REG> DAT_FMT_W<'a, REG>
497where
498 REG: crate::Writable + crate::RegisterSpec,
499 REG::Ux: From<u8>,
500{
501 #[doc = "`0`"]
502 #[inline(always)]
503 pub fn rgb111(self) -> &'a mut crate::W<REG> {
504 self.variant(DAT_FMT_A::RGB111)
505 }
506 #[doc = "`1`"]
507 #[inline(always)]
508 pub fn rgb444(self) -> &'a mut crate::W<REG> {
509 self.variant(DAT_FMT_A::RGB444)
510 }
511 #[doc = "`10`"]
512 #[inline(always)]
513 pub fn rgb565(self) -> &'a mut crate::W<REG> {
514 self.variant(DAT_FMT_A::RGB565)
515 }
516 #[doc = "`11`"]
517 #[inline(always)]
518 pub fn rgb666(self) -> &'a mut crate::W<REG> {
519 self.variant(DAT_FMT_A::RGB666)
520 }
521 #[doc = "`100`"]
522 #[inline(always)]
523 pub fn rgb888(self) -> &'a mut crate::W<REG> {
524 self.variant(DAT_FMT_A::RGB888)
525 }
526}
527#[doc = "Field `tran_mod` reader - Transmit Mode"]
528pub type TRAN_MOD_R = crate::BitReader<TRAN_MOD_A>;
529#[doc = "Transmit Mode\n\nValue on reset: 0"]
530#[derive(Clone, Copy, Debug, PartialEq, Eq)]
531pub enum TRAN_MOD_A {
532 #[doc = "0: `0`"]
533 COMMAND_PARAMETER = 0,
534 #[doc = "1: `1`"]
535 VIDEO = 1,
536}
537impl From<TRAN_MOD_A> for bool {
538 #[inline(always)]
539 fn from(variant: TRAN_MOD_A) -> Self {
540 variant as u8 != 0
541 }
542}
543impl TRAN_MOD_R {
544 #[doc = "Get enumerated values variant"]
545 #[inline(always)]
546 pub const fn variant(&self) -> TRAN_MOD_A {
547 match self.bits {
548 false => TRAN_MOD_A::COMMAND_PARAMETER,
549 true => TRAN_MOD_A::VIDEO,
550 }
551 }
552 #[doc = "`0`"]
553 #[inline(always)]
554 pub fn is_command_parameter(&self) -> bool {
555 *self == TRAN_MOD_A::COMMAND_PARAMETER
556 }
557 #[doc = "`1`"]
558 #[inline(always)]
559 pub fn is_video(&self) -> bool {
560 *self == TRAN_MOD_A::VIDEO
561 }
562}
563#[doc = "Field `tran_mod` writer - Transmit Mode"]
564pub type TRAN_MOD_W<'a, REG> = crate::BitWriter<'a, REG, TRAN_MOD_A>;
565impl<'a, REG> TRAN_MOD_W<'a, REG>
566where
567 REG: crate::Writable + crate::RegisterSpec,
568{
569 #[doc = "`0`"]
570 #[inline(always)]
571 pub fn command_parameter(self) -> &'a mut crate::W<REG> {
572 self.variant(TRAN_MOD_A::COMMAND_PARAMETER)
573 }
574 #[doc = "`1`"]
575 #[inline(always)]
576 pub fn video(self) -> &'a mut crate::W<REG> {
577 self.variant(TRAN_MOD_A::VIDEO)
578 }
579}
580#[doc = "Field `rgb_seq` reader - Output RGB Sequence"]
581pub type RGB_SEQ_R = crate::FieldReader<RGB_SEQ_A>;
582#[doc = "Output RGB Sequence\n\nValue on reset: 0"]
583#[derive(Clone, Copy, Debug, PartialEq, Eq)]
584#[repr(u8)]
585pub enum RGB_SEQ_A {
586 #[doc = "0: `0`"]
587 RGB = 0,
588 #[doc = "1: `1`"]
589 RBG = 1,
590 #[doc = "2: `10`"]
591 GRB = 2,
592 #[doc = "3: `11`"]
593 GBR = 3,
594 #[doc = "4: `100`"]
595 BRG = 4,
596 #[doc = "5: `101`"]
597 BGR = 5,
598}
599impl From<RGB_SEQ_A> for u8 {
600 #[inline(always)]
601 fn from(variant: RGB_SEQ_A) -> Self {
602 variant as _
603 }
604}
605impl crate::FieldSpec for RGB_SEQ_A {
606 type Ux = u8;
607}
608impl RGB_SEQ_R {
609 #[doc = "Get enumerated values variant"]
610 #[inline(always)]
611 pub const fn variant(&self) -> Option<RGB_SEQ_A> {
612 match self.bits {
613 0 => Some(RGB_SEQ_A::RGB),
614 1 => Some(RGB_SEQ_A::RBG),
615 2 => Some(RGB_SEQ_A::GRB),
616 3 => Some(RGB_SEQ_A::GBR),
617 4 => Some(RGB_SEQ_A::BRG),
618 5 => Some(RGB_SEQ_A::BGR),
619 _ => None,
620 }
621 }
622 #[doc = "`0`"]
623 #[inline(always)]
624 pub fn is_rgb(&self) -> bool {
625 *self == RGB_SEQ_A::RGB
626 }
627 #[doc = "`1`"]
628 #[inline(always)]
629 pub fn is_rbg(&self) -> bool {
630 *self == RGB_SEQ_A::RBG
631 }
632 #[doc = "`10`"]
633 #[inline(always)]
634 pub fn is_grb(&self) -> bool {
635 *self == RGB_SEQ_A::GRB
636 }
637 #[doc = "`11`"]
638 #[inline(always)]
639 pub fn is_gbr(&self) -> bool {
640 *self == RGB_SEQ_A::GBR
641 }
642 #[doc = "`100`"]
643 #[inline(always)]
644 pub fn is_brg(&self) -> bool {
645 *self == RGB_SEQ_A::BRG
646 }
647 #[doc = "`101`"]
648 #[inline(always)]
649 pub fn is_bgr(&self) -> bool {
650 *self == RGB_SEQ_A::BGR
651 }
652}
653#[doc = "Field `rgb_seq` writer - Output RGB Sequence"]
654pub type RGB_SEQ_W<'a, REG> = crate::FieldWriter<'a, REG, 3, RGB_SEQ_A>;
655impl<'a, REG> RGB_SEQ_W<'a, REG>
656where
657 REG: crate::Writable + crate::RegisterSpec,
658 REG::Ux: From<u8>,
659{
660 #[doc = "`0`"]
661 #[inline(always)]
662 pub fn rgb(self) -> &'a mut crate::W<REG> {
663 self.variant(RGB_SEQ_A::RGB)
664 }
665 #[doc = "`1`"]
666 #[inline(always)]
667 pub fn rbg(self) -> &'a mut crate::W<REG> {
668 self.variant(RGB_SEQ_A::RBG)
669 }
670 #[doc = "`10`"]
671 #[inline(always)]
672 pub fn grb(self) -> &'a mut crate::W<REG> {
673 self.variant(RGB_SEQ_A::GRB)
674 }
675 #[doc = "`11`"]
676 #[inline(always)]
677 pub fn gbr(self) -> &'a mut crate::W<REG> {
678 self.variant(RGB_SEQ_A::GBR)
679 }
680 #[doc = "`100`"]
681 #[inline(always)]
682 pub fn brg(self) -> &'a mut crate::W<REG> {
683 self.variant(RGB_SEQ_A::BRG)
684 }
685 #[doc = "`101`"]
686 #[inline(always)]
687 pub fn bgr(self) -> &'a mut crate::W<REG> {
688 self.variant(RGB_SEQ_A::BGR)
689 }
690}
691#[doc = "Field `dat_seq` reader - Output Data Sequence"]
692pub type DAT_SEQ_R = crate::BitReader<DAT_SEQ_A>;
693#[doc = "Output Data Sequence\n\nValue on reset: 0"]
694#[derive(Clone, Copy, Debug, PartialEq, Eq)]
695pub enum DAT_SEQ_A {
696 #[doc = "0: `0`"]
697 MSB = 0,
698 #[doc = "1: `1`"]
699 LSB = 1,
700}
701impl From<DAT_SEQ_A> for bool {
702 #[inline(always)]
703 fn from(variant: DAT_SEQ_A) -> Self {
704 variant as u8 != 0
705 }
706}
707impl DAT_SEQ_R {
708 #[doc = "Get enumerated values variant"]
709 #[inline(always)]
710 pub const fn variant(&self) -> DAT_SEQ_A {
711 match self.bits {
712 false => DAT_SEQ_A::MSB,
713 true => DAT_SEQ_A::LSB,
714 }
715 }
716 #[doc = "`0`"]
717 #[inline(always)]
718 pub fn is_msb(&self) -> bool {
719 *self == DAT_SEQ_A::MSB
720 }
721 #[doc = "`1`"]
722 #[inline(always)]
723 pub fn is_lsb(&self) -> bool {
724 *self == DAT_SEQ_A::LSB
725 }
726}
727#[doc = "Field `dat_seq` writer - Output Data Sequence"]
728pub type DAT_SEQ_W<'a, REG> = crate::BitWriter<'a, REG, DAT_SEQ_A>;
729impl<'a, REG> DAT_SEQ_W<'a, REG>
730where
731 REG: crate::Writable + crate::RegisterSpec,
732{
733 #[doc = "`0`"]
734 #[inline(always)]
735 pub fn msb(self) -> &'a mut crate::W<REG> {
736 self.variant(DAT_SEQ_A::MSB)
737 }
738 #[doc = "`1`"]
739 #[inline(always)]
740 pub fn lsb(self) -> &'a mut crate::W<REG> {
741 self.variant(DAT_SEQ_A::LSB)
742 }
743}
744#[doc = "Field `wcdc` reader - Write Command Dummy Cycles"]
745pub type WCDC_R = crate::FieldReader<u16>;
746#[doc = "Field `wcdc` writer - Write Command Dummy Cycles"]
747pub type WCDC_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>;
748#[doc = "Field `cmdt` reader - Command Type"]
749pub type CMDT_R = crate::BitReader<CMDT_A>;
750#[doc = "Command Type\n\nValue on reset: 0"]
751#[derive(Clone, Copy, Debug, PartialEq, Eq)]
752pub enum CMDT_A {
753 #[doc = "0: `0`"]
754 WRITE = 0,
755 #[doc = "1: `1`"]
756 READ = 1,
757}
758impl From<CMDT_A> for bool {
759 #[inline(always)]
760 fn from(variant: CMDT_A) -> Self {
761 variant as u8 != 0
762 }
763}
764impl CMDT_R {
765 #[doc = "Get enumerated values variant"]
766 #[inline(always)]
767 pub const fn variant(&self) -> CMDT_A {
768 match self.bits {
769 false => CMDT_A::WRITE,
770 true => CMDT_A::READ,
771 }
772 }
773 #[doc = "`0`"]
774 #[inline(always)]
775 pub fn is_write(&self) -> bool {
776 *self == CMDT_A::WRITE
777 }
778 #[doc = "`1`"]
779 #[inline(always)]
780 pub fn is_read(&self) -> bool {
781 *self == CMDT_A::READ
782 }
783}
784#[doc = "Field `cmdt` writer - Command Type"]
785pub type CMDT_W<'a, REG> = crate::BitWriter<'a, REG, CMDT_A>;
786impl<'a, REG> CMDT_W<'a, REG>
787where
788 REG: crate::Writable + crate::RegisterSpec,
789{
790 #[doc = "`0`"]
791 #[inline(always)]
792 pub fn write(self) -> &'a mut crate::W<REG> {
793 self.variant(CMDT_A::WRITE)
794 }
795 #[doc = "`1`"]
796 #[inline(always)]
797 pub fn read(self) -> &'a mut crate::W<REG> {
798 self.variant(CMDT_A::READ)
799 }
800}
801impl R {
802 #[doc = "Bit 0 - Video Source Type"]
803 #[inline(always)]
804 pub fn vi_src_type(&self) -> VI_SRC_TYPE_R {
805 VI_SRC_TYPE_R::new((self.bits & 1) != 0)
806 }
807 #[doc = "Bit 1 - Element A Position"]
808 #[inline(always)]
809 pub fn element_a_pos(&self) -> ELEMENT_A_POS_R {
810 ELEMENT_A_POS_R::new(((self.bits >> 1) & 1) != 0)
811 }
812 #[doc = "Bit 2 - RGB Bit Order"]
813 #[inline(always)]
814 pub fn rgb_bo(&self) -> RGB_BO_R {
815 RGB_BO_R::new(((self.bits >> 2) & 1) != 0)
816 }
817 #[doc = "Bit 3 - Dummy Cycle Value"]
818 #[inline(always)]
819 pub fn dum_val(&self) -> DUM_VAL_R {
820 DUM_VAL_R::new(((self.bits >> 3) & 1) != 0)
821 }
822 #[doc = "Bits 4:7 - RGB Source Format"]
823 #[inline(always)]
824 pub fn rgb_src_fmt(&self) -> RGB_SRC_FMT_R {
825 RGB_SRC_FMT_R::new(((self.bits >> 4) & 0x0f) as u8)
826 }
827 #[doc = "Bits 8:10"]
828 #[inline(always)]
829 pub fn dbi_interface(&self) -> DBI_INTERFACE_R {
830 DBI_INTERFACE_R::new(((self.bits >> 8) & 7) as u8)
831 }
832 #[doc = "Bits 12:14 - Output Data Format"]
833 #[inline(always)]
834 pub fn dat_fmt(&self) -> DAT_FMT_R {
835 DAT_FMT_R::new(((self.bits >> 12) & 7) as u8)
836 }
837 #[doc = "Bit 15 - Transmit Mode"]
838 #[inline(always)]
839 pub fn tran_mod(&self) -> TRAN_MOD_R {
840 TRAN_MOD_R::new(((self.bits >> 15) & 1) != 0)
841 }
842 #[doc = "Bits 16:18 - Output RGB Sequence"]
843 #[inline(always)]
844 pub fn rgb_seq(&self) -> RGB_SEQ_R {
845 RGB_SEQ_R::new(((self.bits >> 16) & 7) as u8)
846 }
847 #[doc = "Bit 19 - Output Data Sequence"]
848 #[inline(always)]
849 pub fn dat_seq(&self) -> DAT_SEQ_R {
850 DAT_SEQ_R::new(((self.bits >> 19) & 1) != 0)
851 }
852 #[doc = "Bits 20:30 - Write Command Dummy Cycles"]
853 #[inline(always)]
854 pub fn wcdc(&self) -> WCDC_R {
855 WCDC_R::new(((self.bits >> 20) & 0x07ff) as u16)
856 }
857 #[doc = "Bit 31 - Command Type"]
858 #[inline(always)]
859 pub fn cmdt(&self) -> CMDT_R {
860 CMDT_R::new(((self.bits >> 31) & 1) != 0)
861 }
862}
863impl W {
864 #[doc = "Bit 0 - Video Source Type"]
865 #[inline(always)]
866 #[must_use]
867 pub fn vi_src_type(&mut self) -> VI_SRC_TYPE_W<DBI_CTL_0_SPEC> {
868 VI_SRC_TYPE_W::new(self, 0)
869 }
870 #[doc = "Bit 1 - Element A Position"]
871 #[inline(always)]
872 #[must_use]
873 pub fn element_a_pos(&mut self) -> ELEMENT_A_POS_W<DBI_CTL_0_SPEC> {
874 ELEMENT_A_POS_W::new(self, 1)
875 }
876 #[doc = "Bit 2 - RGB Bit Order"]
877 #[inline(always)]
878 #[must_use]
879 pub fn rgb_bo(&mut self) -> RGB_BO_W<DBI_CTL_0_SPEC> {
880 RGB_BO_W::new(self, 2)
881 }
882 #[doc = "Bit 3 - Dummy Cycle Value"]
883 #[inline(always)]
884 #[must_use]
885 pub fn dum_val(&mut self) -> DUM_VAL_W<DBI_CTL_0_SPEC> {
886 DUM_VAL_W::new(self, 3)
887 }
888 #[doc = "Bits 4:7 - RGB Source Format"]
889 #[inline(always)]
890 #[must_use]
891 pub fn rgb_src_fmt(&mut self) -> RGB_SRC_FMT_W<DBI_CTL_0_SPEC> {
892 RGB_SRC_FMT_W::new(self, 4)
893 }
894 #[doc = "Bits 8:10"]
895 #[inline(always)]
896 #[must_use]
897 pub fn dbi_interface(&mut self) -> DBI_INTERFACE_W<DBI_CTL_0_SPEC> {
898 DBI_INTERFACE_W::new(self, 8)
899 }
900 #[doc = "Bits 12:14 - Output Data Format"]
901 #[inline(always)]
902 #[must_use]
903 pub fn dat_fmt(&mut self) -> DAT_FMT_W<DBI_CTL_0_SPEC> {
904 DAT_FMT_W::new(self, 12)
905 }
906 #[doc = "Bit 15 - Transmit Mode"]
907 #[inline(always)]
908 #[must_use]
909 pub fn tran_mod(&mut self) -> TRAN_MOD_W<DBI_CTL_0_SPEC> {
910 TRAN_MOD_W::new(self, 15)
911 }
912 #[doc = "Bits 16:18 - Output RGB Sequence"]
913 #[inline(always)]
914 #[must_use]
915 pub fn rgb_seq(&mut self) -> RGB_SEQ_W<DBI_CTL_0_SPEC> {
916 RGB_SEQ_W::new(self, 16)
917 }
918 #[doc = "Bit 19 - Output Data Sequence"]
919 #[inline(always)]
920 #[must_use]
921 pub fn dat_seq(&mut self) -> DAT_SEQ_W<DBI_CTL_0_SPEC> {
922 DAT_SEQ_W::new(self, 19)
923 }
924 #[doc = "Bits 20:30 - Write Command Dummy Cycles"]
925 #[inline(always)]
926 #[must_use]
927 pub fn wcdc(&mut self) -> WCDC_W<DBI_CTL_0_SPEC> {
928 WCDC_W::new(self, 20)
929 }
930 #[doc = "Bit 31 - Command Type"]
931 #[inline(always)]
932 #[must_use]
933 pub fn cmdt(&mut self) -> CMDT_W<DBI_CTL_0_SPEC> {
934 CMDT_W::new(self, 31)
935 }
936 #[doc = r" Writes raw bits to the register."]
937 #[doc = r""]
938 #[doc = r" # Safety"]
939 #[doc = r""]
940 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
941 #[inline(always)]
942 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
943 self.bits = bits;
944 self
945 }
946}
947#[doc = "DBI Control Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dbi_ctl_0::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dbi_ctl_0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
948pub struct DBI_CTL_0_SPEC;
949impl crate::RegisterSpec for DBI_CTL_0_SPEC {
950 type Ux = u32;
951}
952#[doc = "`read()` method returns [`dbi_ctl_0::R`](R) reader structure"]
953impl crate::Readable for DBI_CTL_0_SPEC {}
954#[doc = "`write(|w| ..)` method takes [`dbi_ctl_0::W`](W) writer structure"]
955impl crate::Writable for DBI_CTL_0_SPEC {
956 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
957 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
958}
959#[doc = "`reset()` method sets dbi_ctl_0 to value 0"]
960impl crate::Resettable for DBI_CTL_0_SPEC {
961 const RESET_VALUE: Self::Ux = 0;
962}