d1_pac/smhc/
smhc_cmd.rs

1#[doc = "Register `smhc_cmd` reader"]
2pub type R = crate::R<SMHC_CMD_SPEC>;
3#[doc = "Register `smhc_cmd` writer"]
4pub type W = crate::W<SMHC_CMD_SPEC>;
5#[doc = "Field `cmd_idx` reader - CMD Index"]
6pub type CMD_IDX_R = crate::FieldReader;
7#[doc = "Field `cmd_idx` writer - CMD Index"]
8pub type CMD_IDX_W<'a, REG> = crate::FieldWriter<'a, REG, 6>;
9#[doc = "Field `resp_rcv` reader - Response Receive"]
10pub type RESP_RCV_R = crate::BitReader<RESP_RCV_A>;
11#[doc = "Response Receive\n\nValue on reset: 0"]
12#[derive(Clone, Copy, Debug, PartialEq, Eq)]
13pub enum RESP_RCV_A {
14    #[doc = "0: Command without response"]
15    WITHOUT = 0,
16    #[doc = "1: Command with response"]
17    WITH = 1,
18}
19impl From<RESP_RCV_A> for bool {
20    #[inline(always)]
21    fn from(variant: RESP_RCV_A) -> Self {
22        variant as u8 != 0
23    }
24}
25impl RESP_RCV_R {
26    #[doc = "Get enumerated values variant"]
27    #[inline(always)]
28    pub const fn variant(&self) -> RESP_RCV_A {
29        match self.bits {
30            false => RESP_RCV_A::WITHOUT,
31            true => RESP_RCV_A::WITH,
32        }
33    }
34    #[doc = "Command without response"]
35    #[inline(always)]
36    pub fn is_without(&self) -> bool {
37        *self == RESP_RCV_A::WITHOUT
38    }
39    #[doc = "Command with response"]
40    #[inline(always)]
41    pub fn is_with(&self) -> bool {
42        *self == RESP_RCV_A::WITH
43    }
44}
45#[doc = "Field `resp_rcv` writer - Response Receive"]
46pub type RESP_RCV_W<'a, REG> = crate::BitWriter<'a, REG, RESP_RCV_A>;
47impl<'a, REG> RESP_RCV_W<'a, REG>
48where
49    REG: crate::Writable + crate::RegisterSpec,
50{
51    #[doc = "Command without response"]
52    #[inline(always)]
53    pub fn without(self) -> &'a mut crate::W<REG> {
54        self.variant(RESP_RCV_A::WITHOUT)
55    }
56    #[doc = "Command with response"]
57    #[inline(always)]
58    pub fn with(self) -> &'a mut crate::W<REG> {
59        self.variant(RESP_RCV_A::WITH)
60    }
61}
62#[doc = "Field `long_resp` reader - Response Type"]
63pub type LONG_RESP_R = crate::BitReader<LONG_RESP_A>;
64#[doc = "Response Type\n\nValue on reset: 0"]
65#[derive(Clone, Copy, Debug, PartialEq, Eq)]
66pub enum LONG_RESP_A {
67    #[doc = "0: Short Response (48 bits)"]
68    SHORT = 0,
69    #[doc = "1: Long Response (136 bits)"]
70    LONG = 1,
71}
72impl From<LONG_RESP_A> for bool {
73    #[inline(always)]
74    fn from(variant: LONG_RESP_A) -> Self {
75        variant as u8 != 0
76    }
77}
78impl LONG_RESP_R {
79    #[doc = "Get enumerated values variant"]
80    #[inline(always)]
81    pub const fn variant(&self) -> LONG_RESP_A {
82        match self.bits {
83            false => LONG_RESP_A::SHORT,
84            true => LONG_RESP_A::LONG,
85        }
86    }
87    #[doc = "Short Response (48 bits)"]
88    #[inline(always)]
89    pub fn is_short(&self) -> bool {
90        *self == LONG_RESP_A::SHORT
91    }
92    #[doc = "Long Response (136 bits)"]
93    #[inline(always)]
94    pub fn is_long(&self) -> bool {
95        *self == LONG_RESP_A::LONG
96    }
97}
98#[doc = "Field `long_resp` writer - Response Type"]
99pub type LONG_RESP_W<'a, REG> = crate::BitWriter<'a, REG, LONG_RESP_A>;
100impl<'a, REG> LONG_RESP_W<'a, REG>
101where
102    REG: crate::Writable + crate::RegisterSpec,
103{
104    #[doc = "Short Response (48 bits)"]
105    #[inline(always)]
106    pub fn short(self) -> &'a mut crate::W<REG> {
107        self.variant(LONG_RESP_A::SHORT)
108    }
109    #[doc = "Long Response (136 bits)"]
110    #[inline(always)]
111    pub fn long(self) -> &'a mut crate::W<REG> {
112        self.variant(LONG_RESP_A::LONG)
113    }
114}
115#[doc = "Field `chk_resp_crc` reader - Check Response CRC"]
116pub type CHK_RESP_CRC_R = crate::BitReader<CHK_RESP_CRC_A>;
117#[doc = "Check Response CRC\n\nValue on reset: 0"]
118#[derive(Clone, Copy, Debug, PartialEq, Eq)]
119pub enum CHK_RESP_CRC_A {
120    #[doc = "0: Do not check response CRC"]
121    NOT_CHECK = 0,
122    #[doc = "1: Check response CRC"]
123    CHECK = 1,
124}
125impl From<CHK_RESP_CRC_A> for bool {
126    #[inline(always)]
127    fn from(variant: CHK_RESP_CRC_A) -> Self {
128        variant as u8 != 0
129    }
130}
131impl CHK_RESP_CRC_R {
132    #[doc = "Get enumerated values variant"]
133    #[inline(always)]
134    pub const fn variant(&self) -> CHK_RESP_CRC_A {
135        match self.bits {
136            false => CHK_RESP_CRC_A::NOT_CHECK,
137            true => CHK_RESP_CRC_A::CHECK,
138        }
139    }
140    #[doc = "Do not check response CRC"]
141    #[inline(always)]
142    pub fn is_not_check(&self) -> bool {
143        *self == CHK_RESP_CRC_A::NOT_CHECK
144    }
145    #[doc = "Check response CRC"]
146    #[inline(always)]
147    pub fn is_check(&self) -> bool {
148        *self == CHK_RESP_CRC_A::CHECK
149    }
150}
151#[doc = "Field `chk_resp_crc` writer - Check Response CRC"]
152pub type CHK_RESP_CRC_W<'a, REG> = crate::BitWriter<'a, REG, CHK_RESP_CRC_A>;
153impl<'a, REG> CHK_RESP_CRC_W<'a, REG>
154where
155    REG: crate::Writable + crate::RegisterSpec,
156{
157    #[doc = "Do not check response CRC"]
158    #[inline(always)]
159    pub fn not_check(self) -> &'a mut crate::W<REG> {
160        self.variant(CHK_RESP_CRC_A::NOT_CHECK)
161    }
162    #[doc = "Check response CRC"]
163    #[inline(always)]
164    pub fn check(self) -> &'a mut crate::W<REG> {
165        self.variant(CHK_RESP_CRC_A::CHECK)
166    }
167}
168#[doc = "Field `data_trans` reader - Data Transfer"]
169pub type DATA_TRANS_R = crate::BitReader<DATA_TRANS_A>;
170#[doc = "Data Transfer\n\nValue on reset: 0"]
171#[derive(Clone, Copy, Debug, PartialEq, Eq)]
172pub enum DATA_TRANS_A {
173    #[doc = "0: Without data transfer"]
174    WITHOUT = 0,
175    #[doc = "1: With data transfer"]
176    WITH = 1,
177}
178impl From<DATA_TRANS_A> for bool {
179    #[inline(always)]
180    fn from(variant: DATA_TRANS_A) -> Self {
181        variant as u8 != 0
182    }
183}
184impl DATA_TRANS_R {
185    #[doc = "Get enumerated values variant"]
186    #[inline(always)]
187    pub const fn variant(&self) -> DATA_TRANS_A {
188        match self.bits {
189            false => DATA_TRANS_A::WITHOUT,
190            true => DATA_TRANS_A::WITH,
191        }
192    }
193    #[doc = "Without data transfer"]
194    #[inline(always)]
195    pub fn is_without(&self) -> bool {
196        *self == DATA_TRANS_A::WITHOUT
197    }
198    #[doc = "With data transfer"]
199    #[inline(always)]
200    pub fn is_with(&self) -> bool {
201        *self == DATA_TRANS_A::WITH
202    }
203}
204#[doc = "Field `data_trans` writer - Data Transfer"]
205pub type DATA_TRANS_W<'a, REG> = crate::BitWriter<'a, REG, DATA_TRANS_A>;
206impl<'a, REG> DATA_TRANS_W<'a, REG>
207where
208    REG: crate::Writable + crate::RegisterSpec,
209{
210    #[doc = "Without data transfer"]
211    #[inline(always)]
212    pub fn without(self) -> &'a mut crate::W<REG> {
213        self.variant(DATA_TRANS_A::WITHOUT)
214    }
215    #[doc = "With data transfer"]
216    #[inline(always)]
217    pub fn with(self) -> &'a mut crate::W<REG> {
218        self.variant(DATA_TRANS_A::WITH)
219    }
220}
221#[doc = "Field `trans_dir` reader - Transfer Direction"]
222pub type TRANS_DIR_R = crate::BitReader<TRANS_DIR_A>;
223#[doc = "Transfer Direction\n\nValue on reset: 0"]
224#[derive(Clone, Copy, Debug, PartialEq, Eq)]
225pub enum TRANS_DIR_A {
226    #[doc = "0: Read operation"]
227    READ = 0,
228    #[doc = "1: Write operation"]
229    WRITE = 1,
230}
231impl From<TRANS_DIR_A> for bool {
232    #[inline(always)]
233    fn from(variant: TRANS_DIR_A) -> Self {
234        variant as u8 != 0
235    }
236}
237impl TRANS_DIR_R {
238    #[doc = "Get enumerated values variant"]
239    #[inline(always)]
240    pub const fn variant(&self) -> TRANS_DIR_A {
241        match self.bits {
242            false => TRANS_DIR_A::READ,
243            true => TRANS_DIR_A::WRITE,
244        }
245    }
246    #[doc = "Read operation"]
247    #[inline(always)]
248    pub fn is_read(&self) -> bool {
249        *self == TRANS_DIR_A::READ
250    }
251    #[doc = "Write operation"]
252    #[inline(always)]
253    pub fn is_write(&self) -> bool {
254        *self == TRANS_DIR_A::WRITE
255    }
256}
257#[doc = "Field `trans_dir` writer - Transfer Direction"]
258pub type TRANS_DIR_W<'a, REG> = crate::BitWriter<'a, REG, TRANS_DIR_A>;
259impl<'a, REG> TRANS_DIR_W<'a, REG>
260where
261    REG: crate::Writable + crate::RegisterSpec,
262{
263    #[doc = "Read operation"]
264    #[inline(always)]
265    pub fn read(self) -> &'a mut crate::W<REG> {
266        self.variant(TRANS_DIR_A::READ)
267    }
268    #[doc = "Write operation"]
269    #[inline(always)]
270    pub fn write(self) -> &'a mut crate::W<REG> {
271        self.variant(TRANS_DIR_A::WRITE)
272    }
273}
274#[doc = "Field `trans_mode` reader - Transfer Mode"]
275pub type TRANS_MODE_R = crate::BitReader<TRANS_MODE_A>;
276#[doc = "Transfer Mode\n\nValue on reset: 0"]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278pub enum TRANS_MODE_A {
279    #[doc = "0: Block data transfer command"]
280    BLOCK = 0,
281    #[doc = "1: Stream data transfer commmand"]
282    STREAM = 1,
283}
284impl From<TRANS_MODE_A> for bool {
285    #[inline(always)]
286    fn from(variant: TRANS_MODE_A) -> Self {
287        variant as u8 != 0
288    }
289}
290impl TRANS_MODE_R {
291    #[doc = "Get enumerated values variant"]
292    #[inline(always)]
293    pub const fn variant(&self) -> TRANS_MODE_A {
294        match self.bits {
295            false => TRANS_MODE_A::BLOCK,
296            true => TRANS_MODE_A::STREAM,
297        }
298    }
299    #[doc = "Block data transfer command"]
300    #[inline(always)]
301    pub fn is_block(&self) -> bool {
302        *self == TRANS_MODE_A::BLOCK
303    }
304    #[doc = "Stream data transfer commmand"]
305    #[inline(always)]
306    pub fn is_stream(&self) -> bool {
307        *self == TRANS_MODE_A::STREAM
308    }
309}
310#[doc = "Field `trans_mode` writer - Transfer Mode"]
311pub type TRANS_MODE_W<'a, REG> = crate::BitWriter<'a, REG, TRANS_MODE_A>;
312impl<'a, REG> TRANS_MODE_W<'a, REG>
313where
314    REG: crate::Writable + crate::RegisterSpec,
315{
316    #[doc = "Block data transfer command"]
317    #[inline(always)]
318    pub fn block(self) -> &'a mut crate::W<REG> {
319        self.variant(TRANS_MODE_A::BLOCK)
320    }
321    #[doc = "Stream data transfer commmand"]
322    #[inline(always)]
323    pub fn stream(self) -> &'a mut crate::W<REG> {
324        self.variant(TRANS_MODE_A::STREAM)
325    }
326}
327#[doc = "Field `stop_cmd_flag` reader - Send Stop CMD Automatically (CMD12)"]
328pub type STOP_CMD_FLAG_R = crate::BitReader<STOP_CMD_FLAG_A>;
329#[doc = "Send Stop CMD Automatically (CMD12)\n\nValue on reset: 0"]
330#[derive(Clone, Copy, Debug, PartialEq, Eq)]
331pub enum STOP_CMD_FLAG_A {
332    #[doc = "0: Do not send stop command at the end of the data transfer"]
333    NO_STOP = 0,
334    #[doc = "1: Send stop command automatically at the end of the data transfer"]
335    AUTO_STOP = 1,
336}
337impl From<STOP_CMD_FLAG_A> for bool {
338    #[inline(always)]
339    fn from(variant: STOP_CMD_FLAG_A) -> Self {
340        variant as u8 != 0
341    }
342}
343impl STOP_CMD_FLAG_R {
344    #[doc = "Get enumerated values variant"]
345    #[inline(always)]
346    pub const fn variant(&self) -> STOP_CMD_FLAG_A {
347        match self.bits {
348            false => STOP_CMD_FLAG_A::NO_STOP,
349            true => STOP_CMD_FLAG_A::AUTO_STOP,
350        }
351    }
352    #[doc = "Do not send stop command at the end of the data transfer"]
353    #[inline(always)]
354    pub fn is_no_stop(&self) -> bool {
355        *self == STOP_CMD_FLAG_A::NO_STOP
356    }
357    #[doc = "Send stop command automatically at the end of the data transfer"]
358    #[inline(always)]
359    pub fn is_auto_stop(&self) -> bool {
360        *self == STOP_CMD_FLAG_A::AUTO_STOP
361    }
362}
363#[doc = "Field `stop_cmd_flag` writer - Send Stop CMD Automatically (CMD12)"]
364pub type STOP_CMD_FLAG_W<'a, REG> = crate::BitWriter<'a, REG, STOP_CMD_FLAG_A>;
365impl<'a, REG> STOP_CMD_FLAG_W<'a, REG>
366where
367    REG: crate::Writable + crate::RegisterSpec,
368{
369    #[doc = "Do not send stop command at the end of the data transfer"]
370    #[inline(always)]
371    pub fn no_stop(self) -> &'a mut crate::W<REG> {
372        self.variant(STOP_CMD_FLAG_A::NO_STOP)
373    }
374    #[doc = "Send stop command automatically at the end of the data transfer"]
375    #[inline(always)]
376    pub fn auto_stop(self) -> &'a mut crate::W<REG> {
377        self.variant(STOP_CMD_FLAG_A::AUTO_STOP)
378    }
379}
380#[doc = "Field `wait_pre_over` reader - Wait for Data Transfer Over"]
381pub type WAIT_PRE_OVER_R = crate::BitReader<WAIT_PRE_OVER_A>;
382#[doc = "Wait for Data Transfer Over\n\nValue on reset: 0"]
383#[derive(Clone, Copy, Debug, PartialEq, Eq)]
384pub enum WAIT_PRE_OVER_A {
385    #[doc = "0: Send command at once, does not care about data transferring"]
386    AT_ONCE = 0,
387    #[doc = "1: Wait for data transfer completion before sending the current command"]
388    WAIT = 1,
389}
390impl From<WAIT_PRE_OVER_A> for bool {
391    #[inline(always)]
392    fn from(variant: WAIT_PRE_OVER_A) -> Self {
393        variant as u8 != 0
394    }
395}
396impl WAIT_PRE_OVER_R {
397    #[doc = "Get enumerated values variant"]
398    #[inline(always)]
399    pub const fn variant(&self) -> WAIT_PRE_OVER_A {
400        match self.bits {
401            false => WAIT_PRE_OVER_A::AT_ONCE,
402            true => WAIT_PRE_OVER_A::WAIT,
403        }
404    }
405    #[doc = "Send command at once, does not care about data transferring"]
406    #[inline(always)]
407    pub fn is_at_once(&self) -> bool {
408        *self == WAIT_PRE_OVER_A::AT_ONCE
409    }
410    #[doc = "Wait for data transfer completion before sending the current command"]
411    #[inline(always)]
412    pub fn is_wait(&self) -> bool {
413        *self == WAIT_PRE_OVER_A::WAIT
414    }
415}
416#[doc = "Field `wait_pre_over` writer - Wait for Data Transfer Over"]
417pub type WAIT_PRE_OVER_W<'a, REG> = crate::BitWriter<'a, REG, WAIT_PRE_OVER_A>;
418impl<'a, REG> WAIT_PRE_OVER_W<'a, REG>
419where
420    REG: crate::Writable + crate::RegisterSpec,
421{
422    #[doc = "Send command at once, does not care about data transferring"]
423    #[inline(always)]
424    pub fn at_once(self) -> &'a mut crate::W<REG> {
425        self.variant(WAIT_PRE_OVER_A::AT_ONCE)
426    }
427    #[doc = "Wait for data transfer completion before sending the current command"]
428    #[inline(always)]
429    pub fn wait(self) -> &'a mut crate::W<REG> {
430        self.variant(WAIT_PRE_OVER_A::WAIT)
431    }
432}
433#[doc = "Field `stop_abt_cmd` reader - Stop Abort Command"]
434pub type STOP_ABT_CMD_R = crate::BitReader<STOP_ABT_CMD_A>;
435#[doc = "Stop Abort Command\n\nValue on reset: 0"]
436#[derive(Clone, Copy, Debug, PartialEq, Eq)]
437pub enum STOP_ABT_CMD_A {
438    #[doc = "0: Normal command sending"]
439    NORMAL = 0,
440    #[doc = "1: Send Stop or Abort command to stop the current data transfer in progress"]
441    STOP = 1,
442}
443impl From<STOP_ABT_CMD_A> for bool {
444    #[inline(always)]
445    fn from(variant: STOP_ABT_CMD_A) -> Self {
446        variant as u8 != 0
447    }
448}
449impl STOP_ABT_CMD_R {
450    #[doc = "Get enumerated values variant"]
451    #[inline(always)]
452    pub const fn variant(&self) -> STOP_ABT_CMD_A {
453        match self.bits {
454            false => STOP_ABT_CMD_A::NORMAL,
455            true => STOP_ABT_CMD_A::STOP,
456        }
457    }
458    #[doc = "Normal command sending"]
459    #[inline(always)]
460    pub fn is_normal(&self) -> bool {
461        *self == STOP_ABT_CMD_A::NORMAL
462    }
463    #[doc = "Send Stop or Abort command to stop the current data transfer in progress"]
464    #[inline(always)]
465    pub fn is_stop(&self) -> bool {
466        *self == STOP_ABT_CMD_A::STOP
467    }
468}
469#[doc = "Field `stop_abt_cmd` writer - Stop Abort Command"]
470pub type STOP_ABT_CMD_W<'a, REG> = crate::BitWriter<'a, REG, STOP_ABT_CMD_A>;
471impl<'a, REG> STOP_ABT_CMD_W<'a, REG>
472where
473    REG: crate::Writable + crate::RegisterSpec,
474{
475    #[doc = "Normal command sending"]
476    #[inline(always)]
477    pub fn normal(self) -> &'a mut crate::W<REG> {
478        self.variant(STOP_ABT_CMD_A::NORMAL)
479    }
480    #[doc = "Send Stop or Abort command to stop the current data transfer in progress"]
481    #[inline(always)]
482    pub fn stop(self) -> &'a mut crate::W<REG> {
483        self.variant(STOP_ABT_CMD_A::STOP)
484    }
485}
486#[doc = "Field `send_init_seq` reader - Send Initialization"]
487pub type SEND_INIT_SEQ_R = crate::BitReader<SEND_INIT_SEQ_A>;
488#[doc = "Send Initialization\n\nValue on reset: 0"]
489#[derive(Clone, Copy, Debug, PartialEq, Eq)]
490pub enum SEND_INIT_SEQ_A {
491    #[doc = "0: Normal command sending"]
492    NORMAL = 0,
493    #[doc = "1: Send initialization sequence before sending this command"]
494    INIT_CMD = 1,
495}
496impl From<SEND_INIT_SEQ_A> for bool {
497    #[inline(always)]
498    fn from(variant: SEND_INIT_SEQ_A) -> Self {
499        variant as u8 != 0
500    }
501}
502impl SEND_INIT_SEQ_R {
503    #[doc = "Get enumerated values variant"]
504    #[inline(always)]
505    pub const fn variant(&self) -> SEND_INIT_SEQ_A {
506        match self.bits {
507            false => SEND_INIT_SEQ_A::NORMAL,
508            true => SEND_INIT_SEQ_A::INIT_CMD,
509        }
510    }
511    #[doc = "Normal command sending"]
512    #[inline(always)]
513    pub fn is_normal(&self) -> bool {
514        *self == SEND_INIT_SEQ_A::NORMAL
515    }
516    #[doc = "Send initialization sequence before sending this command"]
517    #[inline(always)]
518    pub fn is_init_cmd(&self) -> bool {
519        *self == SEND_INIT_SEQ_A::INIT_CMD
520    }
521}
522#[doc = "Field `send_init_seq` writer - Send Initialization"]
523pub type SEND_INIT_SEQ_W<'a, REG> = crate::BitWriter<'a, REG, SEND_INIT_SEQ_A>;
524impl<'a, REG> SEND_INIT_SEQ_W<'a, REG>
525where
526    REG: crate::Writable + crate::RegisterSpec,
527{
528    #[doc = "Normal command sending"]
529    #[inline(always)]
530    pub fn normal(self) -> &'a mut crate::W<REG> {
531        self.variant(SEND_INIT_SEQ_A::NORMAL)
532    }
533    #[doc = "Send initialization sequence before sending this command"]
534    #[inline(always)]
535    pub fn init_cmd(self) -> &'a mut crate::W<REG> {
536        self.variant(SEND_INIT_SEQ_A::INIT_CMD)
537    }
538}
539#[doc = "Field `prg_clk` reader - Change Clock"]
540pub type PRG_CLK_R = crate::BitReader<PRG_CLK_A>;
541#[doc = "Change Clock\n\nValue on reset: 0"]
542#[derive(Clone, Copy, Debug, PartialEq, Eq)]
543pub enum PRG_CLK_A {
544    #[doc = "0: Normal command"]
545    NORMAL = 0,
546    #[doc = "1: Change Card Clock"]
547    CHANGE = 1,
548}
549impl From<PRG_CLK_A> for bool {
550    #[inline(always)]
551    fn from(variant: PRG_CLK_A) -> Self {
552        variant as u8 != 0
553    }
554}
555impl PRG_CLK_R {
556    #[doc = "Get enumerated values variant"]
557    #[inline(always)]
558    pub const fn variant(&self) -> PRG_CLK_A {
559        match self.bits {
560            false => PRG_CLK_A::NORMAL,
561            true => PRG_CLK_A::CHANGE,
562        }
563    }
564    #[doc = "Normal command"]
565    #[inline(always)]
566    pub fn is_normal(&self) -> bool {
567        *self == PRG_CLK_A::NORMAL
568    }
569    #[doc = "Change Card Clock"]
570    #[inline(always)]
571    pub fn is_change(&self) -> bool {
572        *self == PRG_CLK_A::CHANGE
573    }
574}
575#[doc = "Field `prg_clk` writer - Change Clock"]
576pub type PRG_CLK_W<'a, REG> = crate::BitWriter<'a, REG, PRG_CLK_A>;
577impl<'a, REG> PRG_CLK_W<'a, REG>
578where
579    REG: crate::Writable + crate::RegisterSpec,
580{
581    #[doc = "Normal command"]
582    #[inline(always)]
583    pub fn normal(self) -> &'a mut crate::W<REG> {
584        self.variant(PRG_CLK_A::NORMAL)
585    }
586    #[doc = "Change Card Clock"]
587    #[inline(always)]
588    pub fn change(self) -> &'a mut crate::W<REG> {
589        self.variant(PRG_CLK_A::CHANGE)
590    }
591}
592#[doc = "Field `boot_mod` reader - Boot Mode"]
593pub type BOOT_MOD_R = crate::FieldReader<BOOT_MOD_A>;
594#[doc = "Boot Mode\n\nValue on reset: 0"]
595#[derive(Clone, Copy, Debug, PartialEq, Eq)]
596#[repr(u8)]
597pub enum BOOT_MOD_A {
598    #[doc = "0: Normal command"]
599    NORMAL = 0,
600    #[doc = "1: Mandatory Boot operation"]
601    MANDATORY_BOOT = 1,
602    #[doc = "2: Alternate Boot operation"]
603    ALTERNATE_BOOT = 2,
604}
605impl From<BOOT_MOD_A> for u8 {
606    #[inline(always)]
607    fn from(variant: BOOT_MOD_A) -> Self {
608        variant as _
609    }
610}
611impl crate::FieldSpec for BOOT_MOD_A {
612    type Ux = u8;
613}
614impl BOOT_MOD_R {
615    #[doc = "Get enumerated values variant"]
616    #[inline(always)]
617    pub const fn variant(&self) -> Option<BOOT_MOD_A> {
618        match self.bits {
619            0 => Some(BOOT_MOD_A::NORMAL),
620            1 => Some(BOOT_MOD_A::MANDATORY_BOOT),
621            2 => Some(BOOT_MOD_A::ALTERNATE_BOOT),
622            _ => None,
623        }
624    }
625    #[doc = "Normal command"]
626    #[inline(always)]
627    pub fn is_normal(&self) -> bool {
628        *self == BOOT_MOD_A::NORMAL
629    }
630    #[doc = "Mandatory Boot operation"]
631    #[inline(always)]
632    pub fn is_mandatory_boot(&self) -> bool {
633        *self == BOOT_MOD_A::MANDATORY_BOOT
634    }
635    #[doc = "Alternate Boot operation"]
636    #[inline(always)]
637    pub fn is_alternate_boot(&self) -> bool {
638        *self == BOOT_MOD_A::ALTERNATE_BOOT
639    }
640}
641#[doc = "Field `boot_mod` writer - Boot Mode"]
642pub type BOOT_MOD_W<'a, REG> = crate::FieldWriter<'a, REG, 2, BOOT_MOD_A>;
643impl<'a, REG> BOOT_MOD_W<'a, REG>
644where
645    REG: crate::Writable + crate::RegisterSpec,
646    REG::Ux: From<u8>,
647{
648    #[doc = "Normal command"]
649    #[inline(always)]
650    pub fn normal(self) -> &'a mut crate::W<REG> {
651        self.variant(BOOT_MOD_A::NORMAL)
652    }
653    #[doc = "Mandatory Boot operation"]
654    #[inline(always)]
655    pub fn mandatory_boot(self) -> &'a mut crate::W<REG> {
656        self.variant(BOOT_MOD_A::MANDATORY_BOOT)
657    }
658    #[doc = "Alternate Boot operation"]
659    #[inline(always)]
660    pub fn alternate_boot(self) -> &'a mut crate::W<REG> {
661        self.variant(BOOT_MOD_A::ALTERNATE_BOOT)
662    }
663}
664#[doc = "Field `exp_boot_ack` reader - Expect Boot Acknowledge"]
665pub type EXP_BOOT_ACK_R = crate::BitReader;
666#[doc = "Field `exp_boot_ack` writer - Expect Boot Acknowledge"]
667pub type EXP_BOOT_ACK_W<'a, REG> = crate::BitWriter<'a, REG>;
668#[doc = "Field `boot_abt` reader - Boot Abort"]
669pub type BOOT_ABT_R = crate::BitReader;
670#[doc = "Field `boot_abt` writer - Boot Abort"]
671pub type BOOT_ABT_W<'a, REG> = crate::BitWriter<'a, REG>;
672#[doc = "Field `vol_sw` reader - Voltage Switch"]
673pub type VOL_SW_R = crate::BitReader<VOL_SW_A>;
674#[doc = "Voltage Switch\n\nValue on reset: 0"]
675#[derive(Clone, Copy, Debug, PartialEq, Eq)]
676pub enum VOL_SW_A {
677    #[doc = "0: Normal command"]
678    NORMAL = 0,
679    #[doc = "1: Voltage switch command, set for CMD11 only"]
680    VOLTAGE_SWITCH = 1,
681}
682impl From<VOL_SW_A> for bool {
683    #[inline(always)]
684    fn from(variant: VOL_SW_A) -> Self {
685        variant as u8 != 0
686    }
687}
688impl VOL_SW_R {
689    #[doc = "Get enumerated values variant"]
690    #[inline(always)]
691    pub const fn variant(&self) -> VOL_SW_A {
692        match self.bits {
693            false => VOL_SW_A::NORMAL,
694            true => VOL_SW_A::VOLTAGE_SWITCH,
695        }
696    }
697    #[doc = "Normal command"]
698    #[inline(always)]
699    pub fn is_normal(&self) -> bool {
700        *self == VOL_SW_A::NORMAL
701    }
702    #[doc = "Voltage switch command, set for CMD11 only"]
703    #[inline(always)]
704    pub fn is_voltage_switch(&self) -> bool {
705        *self == VOL_SW_A::VOLTAGE_SWITCH
706    }
707}
708#[doc = "Field `vol_sw` writer - Voltage Switch"]
709pub type VOL_SW_W<'a, REG> = crate::BitWriter<'a, REG, VOL_SW_A>;
710impl<'a, REG> VOL_SW_W<'a, REG>
711where
712    REG: crate::Writable + crate::RegisterSpec,
713{
714    #[doc = "Normal command"]
715    #[inline(always)]
716    pub fn normal(self) -> &'a mut crate::W<REG> {
717        self.variant(VOL_SW_A::NORMAL)
718    }
719    #[doc = "Voltage switch command, set for CMD11 only"]
720    #[inline(always)]
721    pub fn voltage_switch(self) -> &'a mut crate::W<REG> {
722        self.variant(VOL_SW_A::VOLTAGE_SWITCH)
723    }
724}
725#[doc = "Field `cmd_load` reader - Start Command"]
726pub type CMD_LOAD_R = crate::BitReader;
727#[doc = "Field `cmd_load` writer - Start Command"]
728pub type CMD_LOAD_W<'a, REG> = crate::BitWriter<'a, REG>;
729impl R {
730    #[doc = "Bits 0:5 - CMD Index"]
731    #[inline(always)]
732    pub fn cmd_idx(&self) -> CMD_IDX_R {
733        CMD_IDX_R::new((self.bits & 0x3f) as u8)
734    }
735    #[doc = "Bit 6 - Response Receive"]
736    #[inline(always)]
737    pub fn resp_rcv(&self) -> RESP_RCV_R {
738        RESP_RCV_R::new(((self.bits >> 6) & 1) != 0)
739    }
740    #[doc = "Bit 7 - Response Type"]
741    #[inline(always)]
742    pub fn long_resp(&self) -> LONG_RESP_R {
743        LONG_RESP_R::new(((self.bits >> 7) & 1) != 0)
744    }
745    #[doc = "Bit 8 - Check Response CRC"]
746    #[inline(always)]
747    pub fn chk_resp_crc(&self) -> CHK_RESP_CRC_R {
748        CHK_RESP_CRC_R::new(((self.bits >> 8) & 1) != 0)
749    }
750    #[doc = "Bit 9 - Data Transfer"]
751    #[inline(always)]
752    pub fn data_trans(&self) -> DATA_TRANS_R {
753        DATA_TRANS_R::new(((self.bits >> 9) & 1) != 0)
754    }
755    #[doc = "Bit 10 - Transfer Direction"]
756    #[inline(always)]
757    pub fn trans_dir(&self) -> TRANS_DIR_R {
758        TRANS_DIR_R::new(((self.bits >> 10) & 1) != 0)
759    }
760    #[doc = "Bit 11 - Transfer Mode"]
761    #[inline(always)]
762    pub fn trans_mode(&self) -> TRANS_MODE_R {
763        TRANS_MODE_R::new(((self.bits >> 11) & 1) != 0)
764    }
765    #[doc = "Bit 12 - Send Stop CMD Automatically (CMD12)"]
766    #[inline(always)]
767    pub fn stop_cmd_flag(&self) -> STOP_CMD_FLAG_R {
768        STOP_CMD_FLAG_R::new(((self.bits >> 12) & 1) != 0)
769    }
770    #[doc = "Bit 13 - Wait for Data Transfer Over"]
771    #[inline(always)]
772    pub fn wait_pre_over(&self) -> WAIT_PRE_OVER_R {
773        WAIT_PRE_OVER_R::new(((self.bits >> 13) & 1) != 0)
774    }
775    #[doc = "Bit 14 - Stop Abort Command"]
776    #[inline(always)]
777    pub fn stop_abt_cmd(&self) -> STOP_ABT_CMD_R {
778        STOP_ABT_CMD_R::new(((self.bits >> 14) & 1) != 0)
779    }
780    #[doc = "Bit 15 - Send Initialization"]
781    #[inline(always)]
782    pub fn send_init_seq(&self) -> SEND_INIT_SEQ_R {
783        SEND_INIT_SEQ_R::new(((self.bits >> 15) & 1) != 0)
784    }
785    #[doc = "Bit 21 - Change Clock"]
786    #[inline(always)]
787    pub fn prg_clk(&self) -> PRG_CLK_R {
788        PRG_CLK_R::new(((self.bits >> 21) & 1) != 0)
789    }
790    #[doc = "Bits 24:25 - Boot Mode"]
791    #[inline(always)]
792    pub fn boot_mod(&self) -> BOOT_MOD_R {
793        BOOT_MOD_R::new(((self.bits >> 24) & 3) as u8)
794    }
795    #[doc = "Bit 26 - Expect Boot Acknowledge"]
796    #[inline(always)]
797    pub fn exp_boot_ack(&self) -> EXP_BOOT_ACK_R {
798        EXP_BOOT_ACK_R::new(((self.bits >> 26) & 1) != 0)
799    }
800    #[doc = "Bit 27 - Boot Abort"]
801    #[inline(always)]
802    pub fn boot_abt(&self) -> BOOT_ABT_R {
803        BOOT_ABT_R::new(((self.bits >> 27) & 1) != 0)
804    }
805    #[doc = "Bit 28 - Voltage Switch"]
806    #[inline(always)]
807    pub fn vol_sw(&self) -> VOL_SW_R {
808        VOL_SW_R::new(((self.bits >> 28) & 1) != 0)
809    }
810    #[doc = "Bit 31 - Start Command"]
811    #[inline(always)]
812    pub fn cmd_load(&self) -> CMD_LOAD_R {
813        CMD_LOAD_R::new(((self.bits >> 31) & 1) != 0)
814    }
815}
816impl W {
817    #[doc = "Bits 0:5 - CMD Index"]
818    #[inline(always)]
819    #[must_use]
820    pub fn cmd_idx(&mut self) -> CMD_IDX_W<SMHC_CMD_SPEC> {
821        CMD_IDX_W::new(self, 0)
822    }
823    #[doc = "Bit 6 - Response Receive"]
824    #[inline(always)]
825    #[must_use]
826    pub fn resp_rcv(&mut self) -> RESP_RCV_W<SMHC_CMD_SPEC> {
827        RESP_RCV_W::new(self, 6)
828    }
829    #[doc = "Bit 7 - Response Type"]
830    #[inline(always)]
831    #[must_use]
832    pub fn long_resp(&mut self) -> LONG_RESP_W<SMHC_CMD_SPEC> {
833        LONG_RESP_W::new(self, 7)
834    }
835    #[doc = "Bit 8 - Check Response CRC"]
836    #[inline(always)]
837    #[must_use]
838    pub fn chk_resp_crc(&mut self) -> CHK_RESP_CRC_W<SMHC_CMD_SPEC> {
839        CHK_RESP_CRC_W::new(self, 8)
840    }
841    #[doc = "Bit 9 - Data Transfer"]
842    #[inline(always)]
843    #[must_use]
844    pub fn data_trans(&mut self) -> DATA_TRANS_W<SMHC_CMD_SPEC> {
845        DATA_TRANS_W::new(self, 9)
846    }
847    #[doc = "Bit 10 - Transfer Direction"]
848    #[inline(always)]
849    #[must_use]
850    pub fn trans_dir(&mut self) -> TRANS_DIR_W<SMHC_CMD_SPEC> {
851        TRANS_DIR_W::new(self, 10)
852    }
853    #[doc = "Bit 11 - Transfer Mode"]
854    #[inline(always)]
855    #[must_use]
856    pub fn trans_mode(&mut self) -> TRANS_MODE_W<SMHC_CMD_SPEC> {
857        TRANS_MODE_W::new(self, 11)
858    }
859    #[doc = "Bit 12 - Send Stop CMD Automatically (CMD12)"]
860    #[inline(always)]
861    #[must_use]
862    pub fn stop_cmd_flag(&mut self) -> STOP_CMD_FLAG_W<SMHC_CMD_SPEC> {
863        STOP_CMD_FLAG_W::new(self, 12)
864    }
865    #[doc = "Bit 13 - Wait for Data Transfer Over"]
866    #[inline(always)]
867    #[must_use]
868    pub fn wait_pre_over(&mut self) -> WAIT_PRE_OVER_W<SMHC_CMD_SPEC> {
869        WAIT_PRE_OVER_W::new(self, 13)
870    }
871    #[doc = "Bit 14 - Stop Abort Command"]
872    #[inline(always)]
873    #[must_use]
874    pub fn stop_abt_cmd(&mut self) -> STOP_ABT_CMD_W<SMHC_CMD_SPEC> {
875        STOP_ABT_CMD_W::new(self, 14)
876    }
877    #[doc = "Bit 15 - Send Initialization"]
878    #[inline(always)]
879    #[must_use]
880    pub fn send_init_seq(&mut self) -> SEND_INIT_SEQ_W<SMHC_CMD_SPEC> {
881        SEND_INIT_SEQ_W::new(self, 15)
882    }
883    #[doc = "Bit 21 - Change Clock"]
884    #[inline(always)]
885    #[must_use]
886    pub fn prg_clk(&mut self) -> PRG_CLK_W<SMHC_CMD_SPEC> {
887        PRG_CLK_W::new(self, 21)
888    }
889    #[doc = "Bits 24:25 - Boot Mode"]
890    #[inline(always)]
891    #[must_use]
892    pub fn boot_mod(&mut self) -> BOOT_MOD_W<SMHC_CMD_SPEC> {
893        BOOT_MOD_W::new(self, 24)
894    }
895    #[doc = "Bit 26 - Expect Boot Acknowledge"]
896    #[inline(always)]
897    #[must_use]
898    pub fn exp_boot_ack(&mut self) -> EXP_BOOT_ACK_W<SMHC_CMD_SPEC> {
899        EXP_BOOT_ACK_W::new(self, 26)
900    }
901    #[doc = "Bit 27 - Boot Abort"]
902    #[inline(always)]
903    #[must_use]
904    pub fn boot_abt(&mut self) -> BOOT_ABT_W<SMHC_CMD_SPEC> {
905        BOOT_ABT_W::new(self, 27)
906    }
907    #[doc = "Bit 28 - Voltage Switch"]
908    #[inline(always)]
909    #[must_use]
910    pub fn vol_sw(&mut self) -> VOL_SW_W<SMHC_CMD_SPEC> {
911        VOL_SW_W::new(self, 28)
912    }
913    #[doc = "Bit 31 - Start Command"]
914    #[inline(always)]
915    #[must_use]
916    pub fn cmd_load(&mut self) -> CMD_LOAD_W<SMHC_CMD_SPEC> {
917        CMD_LOAD_W::new(self, 31)
918    }
919    #[doc = r" Writes raw bits to the register."]
920    #[doc = r""]
921    #[doc = r" # Safety"]
922    #[doc = r""]
923    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
924    #[inline(always)]
925    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
926        self.bits = bits;
927        self
928    }
929}
930#[doc = "Command Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`smhc_cmd::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`smhc_cmd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
931pub struct SMHC_CMD_SPEC;
932impl crate::RegisterSpec for SMHC_CMD_SPEC {
933    type Ux = u32;
934}
935#[doc = "`read()` method returns [`smhc_cmd::R`](R) reader structure"]
936impl crate::Readable for SMHC_CMD_SPEC {}
937#[doc = "`write(|w| ..)` method takes [`smhc_cmd::W`](W) writer structure"]
938impl crate::Writable for SMHC_CMD_SPEC {
939    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
940    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
941}
942#[doc = "`reset()` method sets smhc_cmd to value 0"]
943impl crate::Resettable for SMHC_CMD_SPEC {
944    const RESET_VALUE: Self::Ux = 0;
945}
d1_pac/smhc/smhc_cmd.rs

d1_pac/smhc/
smhc_cmd.rs
