d1_pac/
pwm.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    pier: PIER,
5    pisr: PISR,
6    _reserved2: [u8; 0x08],
7    cier: CIER,
8    cisr: CISR,
9    _reserved4: [u8; 0x08],
10    pccr01: PCCR01,
11    pccr23: PCCR23,
12    pccr45: PCCR45,
13    pccr67: PCCR67,
14    _reserved8: [u8; 0x10],
15    pcgr: PCGR,
16    _reserved9: [u8; 0x1c],
17    pdzcr01: PDZCR01,
18    pdzcr23: PDZCR23,
19    pdzcr45: PDZCR45,
20    pdzcr67: PDZCR67,
21    _reserved13: [u8; 0x10],
22    per: PER,
23    _reserved14: [u8; 0x0c],
24    pgr: [PGR; 4],
25    _reserved15: [u8; 0x20],
26    cer: CER,
27    _reserved16: [u8; 0x3c],
28    pcr: (),
29    _reserved17: [u8; 0x04],
30    ppr: (),
31    _reserved18: [u8; 0x04],
32    pcntr: (),
33    _reserved19: [u8; 0x04],
34    ppcntr: (),
35    _reserved20: [u8; 0x04],
36    ccr: (),
37    _reserved21: [u8; 0x04],
38    crlr: (),
39    _reserved22: [u8; 0x04],
40    cflr: (),
41}
42impl RegisterBlock {
43    #[doc = "0x00 - PWM IRQ Enable Register"]
44    #[inline(always)]
45    pub const fn pier(&self) -> &PIER {
46        &self.pier
47    }
48    #[doc = "0x04 - PWM IRQ Status Register"]
49    #[inline(always)]
50    pub const fn pisr(&self) -> &PISR {
51        &self.pisr
52    }
53    #[doc = "0x10 - Capture IRQ Enable Register"]
54    #[inline(always)]
55    pub const fn cier(&self) -> &CIER {
56        &self.cier
57    }
58    #[doc = "0x14 - Capture IRQ Status Register"]
59    #[inline(always)]
60    pub const fn cisr(&self) -> &CISR {
61        &self.cisr
62    }
63    #[doc = "0x20 - PWM01 Clock Configuration Register"]
64    #[inline(always)]
65    pub const fn pccr01(&self) -> &PCCR01 {
66        &self.pccr01
67    }
68    #[doc = "0x24 - PWM23 Clock Configuration Register"]
69    #[inline(always)]
70    pub const fn pccr23(&self) -> &PCCR23 {
71        &self.pccr23
72    }
73    #[doc = "0x28 - PWM45 Clock Configuration Register"]
74    #[inline(always)]
75    pub const fn pccr45(&self) -> &PCCR45 {
76        &self.pccr45
77    }
78    #[doc = "0x2c - PWM67 Clock Configuration Register"]
79    #[inline(always)]
80    pub const fn pccr67(&self) -> &PCCR67 {
81        &self.pccr67
82    }
83    #[doc = "0x40 - PWM Clock Gating Register"]
84    #[inline(always)]
85    pub const fn pcgr(&self) -> &PCGR {
86        &self.pcgr
87    }
88    #[doc = "0x60 - PWM01 Dead Zone Control Register"]
89    #[inline(always)]
90    pub const fn pdzcr01(&self) -> &PDZCR01 {
91        &self.pdzcr01
92    }
93    #[doc = "0x64 - PWM23 Dead Zone Control Register"]
94    #[inline(always)]
95    pub const fn pdzcr23(&self) -> &PDZCR23 {
96        &self.pdzcr23
97    }
98    #[doc = "0x68 - PWM45 Dead Zone Control Register"]
99    #[inline(always)]
100    pub const fn pdzcr45(&self) -> &PDZCR45 {
101        &self.pdzcr45
102    }
103    #[doc = "0x6c - PWM67 Dead Zone Control Register"]
104    #[inline(always)]
105    pub const fn pdzcr67(&self) -> &PDZCR67 {
106        &self.pdzcr67
107    }
108    #[doc = "0x80 - PWM Enable Register"]
109    #[inline(always)]
110    pub const fn per(&self) -> &PER {
111        &self.per
112    }
113    #[doc = "0x90..0xa0 - PWM Group\\[g\\] Register"]
114    #[inline(always)]
115    pub const fn pgr(&self, n: usize) -> &PGR {
116        &self.pgr[n]
117    }
118    #[doc = "0xc0 - Capture Enable Register"]
119    #[inline(always)]
120    pub const fn cer(&self) -> &CER {
121        &self.cer
122    }
123    #[doc = "0x100..0x120 - PWM Control Register"]
124    #[inline(always)]
125    pub const fn pcr(&self, n: usize) -> &PCR {
126        #[allow(clippy::no_effect)]
127        [(); 8][n];
128        unsafe {
129            &*(self as *const Self)
130                .cast::<u8>()
131                .add(256)
132                .add(32 * n)
133                .cast()
134        }
135    }
136    #[doc = "0x104..0x124 - PWM Period Register"]
137    #[inline(always)]
138    pub const fn ppr(&self, n: usize) -> &PPR {
139        #[allow(clippy::no_effect)]
140        [(); 8][n];
141        unsafe {
142            &*(self as *const Self)
143                .cast::<u8>()
144                .add(260)
145                .add(32 * n)
146                .cast()
147        }
148    }
149    #[doc = "0x108..0x128 - PWM Count Register"]
150    #[inline(always)]
151    pub const fn pcntr(&self, n: usize) -> &PCNTR {
152        #[allow(clippy::no_effect)]
153        [(); 8][n];
154        unsafe {
155            &*(self as *const Self)
156                .cast::<u8>()
157                .add(264)
158                .add(32 * n)
159                .cast()
160        }
161    }
162    #[doc = "0x10c..0x12c - PWM Pulse Counter Register"]
163    #[inline(always)]
164    pub const fn ppcntr(&self, n: usize) -> &PPCNTR {
165        #[allow(clippy::no_effect)]
166        [(); 8][n];
167        unsafe {
168            &*(self as *const Self)
169                .cast::<u8>()
170                .add(268)
171                .add(32 * n)
172                .cast()
173        }
174    }
175    #[doc = "0x110..0x130 - Capture Control Register"]
176    #[inline(always)]
177    pub const fn ccr(&self, n: usize) -> &CCR {
178        #[allow(clippy::no_effect)]
179        [(); 8][n];
180        unsafe {
181            &*(self as *const Self)
182                .cast::<u8>()
183                .add(272)
184                .add(32 * n)
185                .cast()
186        }
187    }
188    #[doc = "0x114..0x134 - Capture Rise Lock Register"]
189    #[inline(always)]
190    pub const fn crlr(&self, n: usize) -> &CRLR {
191        #[allow(clippy::no_effect)]
192        [(); 8][n];
193        unsafe {
194            &*(self as *const Self)
195                .cast::<u8>()
196                .add(276)
197                .add(32 * n)
198                .cast()
199        }
200    }
201    #[doc = "0x118..0x138 - Capture Fall Lock Register"]
202    #[inline(always)]
203    pub const fn cflr(&self, n: usize) -> &CFLR {
204        #[allow(clippy::no_effect)]
205        [(); 8][n];
206        unsafe {
207            &*(self as *const Self)
208                .cast::<u8>()
209                .add(280)
210                .add(32 * n)
211                .cast()
212        }
213    }
214}
215#[doc = "pier (rw) register accessor: PWM IRQ Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pier::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pier::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pier`] module"]
216pub type PIER = crate::Reg<pier::PIER_SPEC>;
217#[doc = "PWM IRQ Enable Register"]
218pub mod pier;
219#[doc = "pisr (rw) register accessor: PWM IRQ Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pisr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pisr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pisr`] module"]
220pub type PISR = crate::Reg<pisr::PISR_SPEC>;
221#[doc = "PWM IRQ Status Register"]
222pub mod pisr;
223#[doc = "cier (rw) register accessor: Capture IRQ Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cier::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cier::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cier`] module"]
224pub type CIER = crate::Reg<cier::CIER_SPEC>;
225#[doc = "Capture IRQ Enable Register"]
226pub mod cier;
227#[doc = "cisr (rw) register accessor: Capture IRQ Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cisr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cisr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cisr`] module"]
228pub type CISR = crate::Reg<cisr::CISR_SPEC>;
229#[doc = "Capture IRQ Status Register"]
230pub mod cisr;
231#[doc = "pccr01 (rw) register accessor: PWM01 Clock Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pccr01::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pccr01::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pccr01`] module"]
232pub type PCCR01 = crate::Reg<pccr01::PCCR01_SPEC>;
233#[doc = "PWM01 Clock Configuration Register"]
234pub mod pccr01;
235#[doc = "pccr23 (rw) register accessor: PWM23 Clock Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pccr23::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pccr23::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pccr23`] module"]
236pub type PCCR23 = crate::Reg<pccr23::PCCR23_SPEC>;
237#[doc = "PWM23 Clock Configuration Register"]
238pub mod pccr23;
239#[doc = "pccr45 (rw) register accessor: PWM45 Clock Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pccr45::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pccr45::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pccr45`] module"]
240pub type PCCR45 = crate::Reg<pccr45::PCCR45_SPEC>;
241#[doc = "PWM45 Clock Configuration Register"]
242pub mod pccr45;
243#[doc = "pccr67 (rw) register accessor: PWM67 Clock Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pccr67::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pccr67::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pccr67`] module"]
244pub type PCCR67 = crate::Reg<pccr67::PCCR67_SPEC>;
245#[doc = "PWM67 Clock Configuration Register"]
246pub mod pccr67;
247#[doc = "pcgr (rw) register accessor: PWM Clock Gating Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcgr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcgr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcgr`] module"]
248pub type PCGR = crate::Reg<pcgr::PCGR_SPEC>;
249#[doc = "PWM Clock Gating Register"]
250pub mod pcgr;
251#[doc = "pdzcr01 (rw) register accessor: PWM01 Dead Zone Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdzcr01::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdzcr01::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdzcr01`] module"]
252pub type PDZCR01 = crate::Reg<pdzcr01::PDZCR01_SPEC>;
253#[doc = "PWM01 Dead Zone Control Register"]
254pub mod pdzcr01;
255#[doc = "pdzcr23 (rw) register accessor: PWM23 Dead Zone Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdzcr23::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdzcr23::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdzcr23`] module"]
256pub type PDZCR23 = crate::Reg<pdzcr23::PDZCR23_SPEC>;
257#[doc = "PWM23 Dead Zone Control Register"]
258pub mod pdzcr23;
259#[doc = "pdzcr45 (rw) register accessor: PWM45 Dead Zone Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdzcr45::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdzcr45::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdzcr45`] module"]
260pub type PDZCR45 = crate::Reg<pdzcr45::PDZCR45_SPEC>;
261#[doc = "PWM45 Dead Zone Control Register"]
262pub mod pdzcr45;
263#[doc = "pdzcr67 (rw) register accessor: PWM67 Dead Zone Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pdzcr67::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pdzcr67::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pdzcr67`] module"]
264pub type PDZCR67 = crate::Reg<pdzcr67::PDZCR67_SPEC>;
265#[doc = "PWM67 Dead Zone Control Register"]
266pub mod pdzcr67;
267#[doc = "per (rw) register accessor: PWM Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`per::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`per::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@per`] module"]
268pub type PER = crate::Reg<per::PER_SPEC>;
269#[doc = "PWM Enable Register"]
270pub mod per;
271#[doc = "pgr (rw) register accessor: PWM Group\\[g\\] Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pgr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pgr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pgr`] module"]
272pub type PGR = crate::Reg<pgr::PGR_SPEC>;
273#[doc = "PWM Group\\[g\\] Register"]
274pub mod pgr;
275#[doc = "cer (rw) register accessor: Capture Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cer::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cer::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cer`] module"]
276pub type CER = crate::Reg<cer::CER_SPEC>;
277#[doc = "Capture Enable Register"]
278pub mod cer;
279#[doc = "pcr (rw) register accessor: PWM Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcr`] module"]
280pub type PCR = crate::Reg<pcr::PCR_SPEC>;
281#[doc = "PWM Control Register"]
282pub mod pcr;
283#[doc = "ppr (rw) register accessor: PWM Period Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ppr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ppr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppr`] module"]
284pub type PPR = crate::Reg<ppr::PPR_SPEC>;
285#[doc = "PWM Period Register"]
286pub mod ppr;
287#[doc = "pcntr (rw) register accessor: PWM Count Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`pcntr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`pcntr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcntr`] module"]
288pub type PCNTR = crate::Reg<pcntr::PCNTR_SPEC>;
289#[doc = "PWM Count Register"]
290pub mod pcntr;
291#[doc = "ppcntr (r) register accessor: PWM Pulse Counter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ppcntr::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ppcntr`] module"]
292pub type PPCNTR = crate::Reg<ppcntr::PPCNTR_SPEC>;
293#[doc = "PWM Pulse Counter Register"]
294pub mod ppcntr;
295#[doc = "ccr (rw) register accessor: Capture Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ccr::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ccr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ccr`] module"]
296pub type CCR = crate::Reg<ccr::CCR_SPEC>;
297#[doc = "Capture Control Register"]
298pub mod ccr;
299#[doc = "crlr (r) register accessor: Capture Rise Lock Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`crlr::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@crlr`] module"]
300pub type CRLR = crate::Reg<crlr::CRLR_SPEC>;
301#[doc = "Capture Rise Lock Register"]
302pub mod crlr;
303#[doc = "cflr (r) register accessor: Capture Fall Lock Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cflr::R`].  See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cflr`] module"]
304pub type CFLR = crate::Reg<cflr::CFLR_SPEC>;
305#[doc = "Capture Fall Lock Register"]
306pub mod cflr;