d1_pac/i2s_pcm/
i2s_pcm_int.rs

1#[doc = "Register `i2s_pcm_int` reader"]
2pub type R = crate::R<I2S_PCM_INT_SPEC>;
3#[doc = "Register `i2s_pcm_int` writer"]
4pub type W = crate::W<I2S_PCM_INT_SPEC>;
5#[doc = "Field `rxai_en` reader - RXFIFO Data Available Interrupt Enable"]
6pub type RXAI_EN_R = crate::BitReader<RXAI_EN_A>;
7#[doc = "RXFIFO Data Available Interrupt Enable\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum RXAI_EN_A {
10    #[doc = "0: Disabled"]
11    DISABLE = 0,
12    #[doc = "1: Enabled"]
13    ENABLE = 1,
14}
15impl From<RXAI_EN_A> for bool {
16    #[inline(always)]
17    fn from(variant: RXAI_EN_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl RXAI_EN_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> RXAI_EN_A {
25        match self.bits {
26            false => RXAI_EN_A::DISABLE,
27            true => RXAI_EN_A::ENABLE,
28        }
29    }
30    #[doc = "Disabled"]
31    #[inline(always)]
32    pub fn is_disable(&self) -> bool {
33        *self == RXAI_EN_A::DISABLE
34    }
35    #[doc = "Enabled"]
36    #[inline(always)]
37    pub fn is_enable(&self) -> bool {
38        *self == RXAI_EN_A::ENABLE
39    }
40}
41#[doc = "Field `rxai_en` writer - RXFIFO Data Available Interrupt Enable"]
42pub type RXAI_EN_W<'a, REG> = crate::BitWriter<'a, REG, RXAI_EN_A>;
43impl<'a, REG> RXAI_EN_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "Disabled"]
48    #[inline(always)]
49    pub fn disable(self) -> &'a mut crate::W<REG> {
50        self.variant(RXAI_EN_A::DISABLE)
51    }
52    #[doc = "Enabled"]
53    #[inline(always)]
54    pub fn enable(self) -> &'a mut crate::W<REG> {
55        self.variant(RXAI_EN_A::ENABLE)
56    }
57}
58#[doc = "Field `rxoi_en` reader - RXFIFO Overrun Interrupt Enable"]
59pub type RXOI_EN_R = crate::BitReader<RXOI_EN_A>;
60#[doc = "RXFIFO Overrun Interrupt Enable\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum RXOI_EN_A {
63    #[doc = "0: Disabled"]
64    DISABLE = 0,
65    #[doc = "1: Enabled"]
66    ENABLE = 1,
67}
68impl From<RXOI_EN_A> for bool {
69    #[inline(always)]
70    fn from(variant: RXOI_EN_A) -> Self {
71        variant as u8 != 0
72    }
73}
74impl RXOI_EN_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> RXOI_EN_A {
78        match self.bits {
79            false => RXOI_EN_A::DISABLE,
80            true => RXOI_EN_A::ENABLE,
81        }
82    }
83    #[doc = "Disabled"]
84    #[inline(always)]
85    pub fn is_disable(&self) -> bool {
86        *self == RXOI_EN_A::DISABLE
87    }
88    #[doc = "Enabled"]
89    #[inline(always)]
90    pub fn is_enable(&self) -> bool {
91        *self == RXOI_EN_A::ENABLE
92    }
93}
94#[doc = "Field `rxoi_en` writer - RXFIFO Overrun Interrupt Enable"]
95pub type RXOI_EN_W<'a, REG> = crate::BitWriter<'a, REG, RXOI_EN_A>;
96impl<'a, REG> RXOI_EN_W<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "Disabled"]
101    #[inline(always)]
102    pub fn disable(self) -> &'a mut crate::W<REG> {
103        self.variant(RXOI_EN_A::DISABLE)
104    }
105    #[doc = "Enabled"]
106    #[inline(always)]
107    pub fn enable(self) -> &'a mut crate::W<REG> {
108        self.variant(RXOI_EN_A::ENABLE)
109    }
110}
111#[doc = "Field `rxui_en` reader - RXFIFO Underrun Interrupt Enable"]
112pub type RXUI_EN_R = crate::BitReader<RXUI_EN_A>;
113#[doc = "RXFIFO Underrun Interrupt Enable\n\nValue on reset: 0"]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115pub enum RXUI_EN_A {
116    #[doc = "0: Disabled"]
117    DISABLE = 0,
118    #[doc = "1: Enabled"]
119    ENABLE = 1,
120}
121impl From<RXUI_EN_A> for bool {
122    #[inline(always)]
123    fn from(variant: RXUI_EN_A) -> Self {
124        variant as u8 != 0
125    }
126}
127impl RXUI_EN_R {
128    #[doc = "Get enumerated values variant"]
129    #[inline(always)]
130    pub const fn variant(&self) -> RXUI_EN_A {
131        match self.bits {
132            false => RXUI_EN_A::DISABLE,
133            true => RXUI_EN_A::ENABLE,
134        }
135    }
136    #[doc = "Disabled"]
137    #[inline(always)]
138    pub fn is_disable(&self) -> bool {
139        *self == RXUI_EN_A::DISABLE
140    }
141    #[doc = "Enabled"]
142    #[inline(always)]
143    pub fn is_enable(&self) -> bool {
144        *self == RXUI_EN_A::ENABLE
145    }
146}
147#[doc = "Field `rxui_en` writer - RXFIFO Underrun Interrupt Enable"]
148pub type RXUI_EN_W<'a, REG> = crate::BitWriter<'a, REG, RXUI_EN_A>;
149impl<'a, REG> RXUI_EN_W<'a, REG>
150where
151    REG: crate::Writable + crate::RegisterSpec,
152{
153    #[doc = "Disabled"]
154    #[inline(always)]
155    pub fn disable(self) -> &'a mut crate::W<REG> {
156        self.variant(RXUI_EN_A::DISABLE)
157    }
158    #[doc = "Enabled"]
159    #[inline(always)]
160    pub fn enable(self) -> &'a mut crate::W<REG> {
161        self.variant(RXUI_EN_A::ENABLE)
162    }
163}
164#[doc = "Field `rx_drq` reader - RXFIFO Data Available DRQ Enable"]
165pub type RX_DRQ_R = crate::BitReader<RX_DRQ_A>;
166#[doc = "RXFIFO Data Available DRQ Enable\n\nValue on reset: 0"]
167#[derive(Clone, Copy, Debug, PartialEq, Eq)]
168pub enum RX_DRQ_A {
169    #[doc = "0: Disabled"]
170    DISABLE = 0,
171    #[doc = "1: Enabled"]
172    ENABLE = 1,
173}
174impl From<RX_DRQ_A> for bool {
175    #[inline(always)]
176    fn from(variant: RX_DRQ_A) -> Self {
177        variant as u8 != 0
178    }
179}
180impl RX_DRQ_R {
181    #[doc = "Get enumerated values variant"]
182    #[inline(always)]
183    pub const fn variant(&self) -> RX_DRQ_A {
184        match self.bits {
185            false => RX_DRQ_A::DISABLE,
186            true => RX_DRQ_A::ENABLE,
187        }
188    }
189    #[doc = "Disabled"]
190    #[inline(always)]
191    pub fn is_disable(&self) -> bool {
192        *self == RX_DRQ_A::DISABLE
193    }
194    #[doc = "Enabled"]
195    #[inline(always)]
196    pub fn is_enable(&self) -> bool {
197        *self == RX_DRQ_A::ENABLE
198    }
199}
200#[doc = "Field `rx_drq` writer - RXFIFO Data Available DRQ Enable"]
201pub type RX_DRQ_W<'a, REG> = crate::BitWriter<'a, REG, RX_DRQ_A>;
202impl<'a, REG> RX_DRQ_W<'a, REG>
203where
204    REG: crate::Writable + crate::RegisterSpec,
205{
206    #[doc = "Disabled"]
207    #[inline(always)]
208    pub fn disable(self) -> &'a mut crate::W<REG> {
209        self.variant(RX_DRQ_A::DISABLE)
210    }
211    #[doc = "Enabled"]
212    #[inline(always)]
213    pub fn enable(self) -> &'a mut crate::W<REG> {
214        self.variant(RX_DRQ_A::ENABLE)
215    }
216}
217#[doc = "Field `txei_en` reader - TXFIFO Empty Interrupt Enable"]
218pub type TXEI_EN_R = crate::BitReader<TXEI_EN_A>;
219#[doc = "TXFIFO Empty Interrupt Enable\n\nValue on reset: 0"]
220#[derive(Clone, Copy, Debug, PartialEq, Eq)]
221pub enum TXEI_EN_A {
222    #[doc = "0: Disabled"]
223    DISABLE = 0,
224    #[doc = "1: Enabled"]
225    ENABLE = 1,
226}
227impl From<TXEI_EN_A> for bool {
228    #[inline(always)]
229    fn from(variant: TXEI_EN_A) -> Self {
230        variant as u8 != 0
231    }
232}
233impl TXEI_EN_R {
234    #[doc = "Get enumerated values variant"]
235    #[inline(always)]
236    pub const fn variant(&self) -> TXEI_EN_A {
237        match self.bits {
238            false => TXEI_EN_A::DISABLE,
239            true => TXEI_EN_A::ENABLE,
240        }
241    }
242    #[doc = "Disabled"]
243    #[inline(always)]
244    pub fn is_disable(&self) -> bool {
245        *self == TXEI_EN_A::DISABLE
246    }
247    #[doc = "Enabled"]
248    #[inline(always)]
249    pub fn is_enable(&self) -> bool {
250        *self == TXEI_EN_A::ENABLE
251    }
252}
253#[doc = "Field `txei_en` writer - TXFIFO Empty Interrupt Enable"]
254pub type TXEI_EN_W<'a, REG> = crate::BitWriter<'a, REG, TXEI_EN_A>;
255impl<'a, REG> TXEI_EN_W<'a, REG>
256where
257    REG: crate::Writable + crate::RegisterSpec,
258{
259    #[doc = "Disabled"]
260    #[inline(always)]
261    pub fn disable(self) -> &'a mut crate::W<REG> {
262        self.variant(TXEI_EN_A::DISABLE)
263    }
264    #[doc = "Enabled"]
265    #[inline(always)]
266    pub fn enable(self) -> &'a mut crate::W<REG> {
267        self.variant(TXEI_EN_A::ENABLE)
268    }
269}
270#[doc = "Field `txoi_en` reader - TXFIFO Overrun Interrupt Enable"]
271pub type TXOI_EN_R = crate::BitReader<TXOI_EN_A>;
272#[doc = "TXFIFO Overrun Interrupt Enable\n\nValue on reset: 0"]
273#[derive(Clone, Copy, Debug, PartialEq, Eq)]
274pub enum TXOI_EN_A {
275    #[doc = "0: Disabled"]
276    DISABLE = 0,
277    #[doc = "1: Enabled"]
278    ENABLE = 1,
279}
280impl From<TXOI_EN_A> for bool {
281    #[inline(always)]
282    fn from(variant: TXOI_EN_A) -> Self {
283        variant as u8 != 0
284    }
285}
286impl TXOI_EN_R {
287    #[doc = "Get enumerated values variant"]
288    #[inline(always)]
289    pub const fn variant(&self) -> TXOI_EN_A {
290        match self.bits {
291            false => TXOI_EN_A::DISABLE,
292            true => TXOI_EN_A::ENABLE,
293        }
294    }
295    #[doc = "Disabled"]
296    #[inline(always)]
297    pub fn is_disable(&self) -> bool {
298        *self == TXOI_EN_A::DISABLE
299    }
300    #[doc = "Enabled"]
301    #[inline(always)]
302    pub fn is_enable(&self) -> bool {
303        *self == TXOI_EN_A::ENABLE
304    }
305}
306#[doc = "Field `txoi_en` writer - TXFIFO Overrun Interrupt Enable"]
307pub type TXOI_EN_W<'a, REG> = crate::BitWriter<'a, REG, TXOI_EN_A>;
308impl<'a, REG> TXOI_EN_W<'a, REG>
309where
310    REG: crate::Writable + crate::RegisterSpec,
311{
312    #[doc = "Disabled"]
313    #[inline(always)]
314    pub fn disable(self) -> &'a mut crate::W<REG> {
315        self.variant(TXOI_EN_A::DISABLE)
316    }
317    #[doc = "Enabled"]
318    #[inline(always)]
319    pub fn enable(self) -> &'a mut crate::W<REG> {
320        self.variant(TXOI_EN_A::ENABLE)
321    }
322}
323#[doc = "Field `txui_en` reader - TXFIFO Underrun Interrupt Enable"]
324pub type TXUI_EN_R = crate::BitReader<TXUI_EN_A>;
325#[doc = "TXFIFO Underrun Interrupt Enable\n\nValue on reset: 0"]
326#[derive(Clone, Copy, Debug, PartialEq, Eq)]
327pub enum TXUI_EN_A {
328    #[doc = "0: Disabled"]
329    DISABLE = 0,
330    #[doc = "1: Enabled"]
331    ENABLE = 1,
332}
333impl From<TXUI_EN_A> for bool {
334    #[inline(always)]
335    fn from(variant: TXUI_EN_A) -> Self {
336        variant as u8 != 0
337    }
338}
339impl TXUI_EN_R {
340    #[doc = "Get enumerated values variant"]
341    #[inline(always)]
342    pub const fn variant(&self) -> TXUI_EN_A {
343        match self.bits {
344            false => TXUI_EN_A::DISABLE,
345            true => TXUI_EN_A::ENABLE,
346        }
347    }
348    #[doc = "Disabled"]
349    #[inline(always)]
350    pub fn is_disable(&self) -> bool {
351        *self == TXUI_EN_A::DISABLE
352    }
353    #[doc = "Enabled"]
354    #[inline(always)]
355    pub fn is_enable(&self) -> bool {
356        *self == TXUI_EN_A::ENABLE
357    }
358}
359#[doc = "Field `txui_en` writer - TXFIFO Underrun Interrupt Enable"]
360pub type TXUI_EN_W<'a, REG> = crate::BitWriter<'a, REG, TXUI_EN_A>;
361impl<'a, REG> TXUI_EN_W<'a, REG>
362where
363    REG: crate::Writable + crate::RegisterSpec,
364{
365    #[doc = "Disabled"]
366    #[inline(always)]
367    pub fn disable(self) -> &'a mut crate::W<REG> {
368        self.variant(TXUI_EN_A::DISABLE)
369    }
370    #[doc = "Enabled"]
371    #[inline(always)]
372    pub fn enable(self) -> &'a mut crate::W<REG> {
373        self.variant(TXUI_EN_A::ENABLE)
374    }
375}
376#[doc = "Field `tx_drq` reader - TXFIFO Empty DRQ Enable"]
377pub type TX_DRQ_R = crate::BitReader<TX_DRQ_A>;
378#[doc = "TXFIFO Empty DRQ Enable\n\nValue on reset: 0"]
379#[derive(Clone, Copy, Debug, PartialEq, Eq)]
380pub enum TX_DRQ_A {
381    #[doc = "0: Disabled"]
382    DISABLE = 0,
383    #[doc = "1: Enabled"]
384    ENABLE = 1,
385}
386impl From<TX_DRQ_A> for bool {
387    #[inline(always)]
388    fn from(variant: TX_DRQ_A) -> Self {
389        variant as u8 != 0
390    }
391}
392impl TX_DRQ_R {
393    #[doc = "Get enumerated values variant"]
394    #[inline(always)]
395    pub const fn variant(&self) -> TX_DRQ_A {
396        match self.bits {
397            false => TX_DRQ_A::DISABLE,
398            true => TX_DRQ_A::ENABLE,
399        }
400    }
401    #[doc = "Disabled"]
402    #[inline(always)]
403    pub fn is_disable(&self) -> bool {
404        *self == TX_DRQ_A::DISABLE
405    }
406    #[doc = "Enabled"]
407    #[inline(always)]
408    pub fn is_enable(&self) -> bool {
409        *self == TX_DRQ_A::ENABLE
410    }
411}
412#[doc = "Field `tx_drq` writer - TXFIFO Empty DRQ Enable"]
413pub type TX_DRQ_W<'a, REG> = crate::BitWriter<'a, REG, TX_DRQ_A>;
414impl<'a, REG> TX_DRQ_W<'a, REG>
415where
416    REG: crate::Writable + crate::RegisterSpec,
417{
418    #[doc = "Disabled"]
419    #[inline(always)]
420    pub fn disable(self) -> &'a mut crate::W<REG> {
421        self.variant(TX_DRQ_A::DISABLE)
422    }
423    #[doc = "Enabled"]
424    #[inline(always)]
425    pub fn enable(self) -> &'a mut crate::W<REG> {
426        self.variant(TX_DRQ_A::ENABLE)
427    }
428}
429impl R {
430    #[doc = "Bit 0 - RXFIFO Data Available Interrupt Enable"]
431    #[inline(always)]
432    pub fn rxai_en(&self) -> RXAI_EN_R {
433        RXAI_EN_R::new((self.bits & 1) != 0)
434    }
435    #[doc = "Bit 1 - RXFIFO Overrun Interrupt Enable"]
436    #[inline(always)]
437    pub fn rxoi_en(&self) -> RXOI_EN_R {
438        RXOI_EN_R::new(((self.bits >> 1) & 1) != 0)
439    }
440    #[doc = "Bit 2 - RXFIFO Underrun Interrupt Enable"]
441    #[inline(always)]
442    pub fn rxui_en(&self) -> RXUI_EN_R {
443        RXUI_EN_R::new(((self.bits >> 2) & 1) != 0)
444    }
445    #[doc = "Bit 3 - RXFIFO Data Available DRQ Enable"]
446    #[inline(always)]
447    pub fn rx_drq(&self) -> RX_DRQ_R {
448        RX_DRQ_R::new(((self.bits >> 3) & 1) != 0)
449    }
450    #[doc = "Bit 4 - TXFIFO Empty Interrupt Enable"]
451    #[inline(always)]
452    pub fn txei_en(&self) -> TXEI_EN_R {
453        TXEI_EN_R::new(((self.bits >> 4) & 1) != 0)
454    }
455    #[doc = "Bit 5 - TXFIFO Overrun Interrupt Enable"]
456    #[inline(always)]
457    pub fn txoi_en(&self) -> TXOI_EN_R {
458        TXOI_EN_R::new(((self.bits >> 5) & 1) != 0)
459    }
460    #[doc = "Bit 6 - TXFIFO Underrun Interrupt Enable"]
461    #[inline(always)]
462    pub fn txui_en(&self) -> TXUI_EN_R {
463        TXUI_EN_R::new(((self.bits >> 6) & 1) != 0)
464    }
465    #[doc = "Bit 7 - TXFIFO Empty DRQ Enable"]
466    #[inline(always)]
467    pub fn tx_drq(&self) -> TX_DRQ_R {
468        TX_DRQ_R::new(((self.bits >> 7) & 1) != 0)
469    }
470}
471impl W {
472    #[doc = "Bit 0 - RXFIFO Data Available Interrupt Enable"]
473    #[inline(always)]
474    #[must_use]
475    pub fn rxai_en(&mut self) -> RXAI_EN_W<I2S_PCM_INT_SPEC> {
476        RXAI_EN_W::new(self, 0)
477    }
478    #[doc = "Bit 1 - RXFIFO Overrun Interrupt Enable"]
479    #[inline(always)]
480    #[must_use]
481    pub fn rxoi_en(&mut self) -> RXOI_EN_W<I2S_PCM_INT_SPEC> {
482        RXOI_EN_W::new(self, 1)
483    }
484    #[doc = "Bit 2 - RXFIFO Underrun Interrupt Enable"]
485    #[inline(always)]
486    #[must_use]
487    pub fn rxui_en(&mut self) -> RXUI_EN_W<I2S_PCM_INT_SPEC> {
488        RXUI_EN_W::new(self, 2)
489    }
490    #[doc = "Bit 3 - RXFIFO Data Available DRQ Enable"]
491    #[inline(always)]
492    #[must_use]
493    pub fn rx_drq(&mut self) -> RX_DRQ_W<I2S_PCM_INT_SPEC> {
494        RX_DRQ_W::new(self, 3)
495    }
496    #[doc = "Bit 4 - TXFIFO Empty Interrupt Enable"]
497    #[inline(always)]
498    #[must_use]
499    pub fn txei_en(&mut self) -> TXEI_EN_W<I2S_PCM_INT_SPEC> {
500        TXEI_EN_W::new(self, 4)
501    }
502    #[doc = "Bit 5 - TXFIFO Overrun Interrupt Enable"]
503    #[inline(always)]
504    #[must_use]
505    pub fn txoi_en(&mut self) -> TXOI_EN_W<I2S_PCM_INT_SPEC> {
506        TXOI_EN_W::new(self, 5)
507    }
508    #[doc = "Bit 6 - TXFIFO Underrun Interrupt Enable"]
509    #[inline(always)]
510    #[must_use]
511    pub fn txui_en(&mut self) -> TXUI_EN_W<I2S_PCM_INT_SPEC> {
512        TXUI_EN_W::new(self, 6)
513    }
514    #[doc = "Bit 7 - TXFIFO Empty DRQ Enable"]
515    #[inline(always)]
516    #[must_use]
517    pub fn tx_drq(&mut self) -> TX_DRQ_W<I2S_PCM_INT_SPEC> {
518        TX_DRQ_W::new(self, 7)
519    }
520    #[doc = r" Writes raw bits to the register."]
521    #[doc = r""]
522    #[doc = r" # Safety"]
523    #[doc = r""]
524    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
525    #[inline(always)]
526    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
527        self.bits = bits;
528        self
529    }
530}
531#[doc = "I2S/PCM DMA and Interrupt Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`i2s_pcm_int::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`i2s_pcm_int::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
532pub struct I2S_PCM_INT_SPEC;
533impl crate::RegisterSpec for I2S_PCM_INT_SPEC {
534    type Ux = u32;
535}
536#[doc = "`read()` method returns [`i2s_pcm_int::R`](R) reader structure"]
537impl crate::Readable for I2S_PCM_INT_SPEC {}
538#[doc = "`write(|w| ..)` method takes [`i2s_pcm_int::W`](W) writer structure"]
539impl crate::Writable for I2S_PCM_INT_SPEC {
540    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
541    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
542}
543#[doc = "`reset()` method sets i2s_pcm_int to value 0"]
544impl crate::Resettable for I2S_PCM_INT_SPEC {
545    const RESET_VALUE: Self::Ux = 0;
546}
d1_pac/i2s_pcm/i2s_pcm_int.rs

d1_pac/i2s_pcm/
i2s_pcm_int.rs
