1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 dmac_irq_en0: DMAC_IRQ_EN0,
5 dmac_irq_en1: DMAC_IRQ_EN1,
6 _reserved2: [u8; 0x08],
7 dmac_irq_pend0: DMAC_IRQ_PEND0,
8 dmac_irq_pend1: DMAC_IRQ_PEND1,
9 _reserved4: [u8; 0x10],
10 dmac_auto_gate: DMAC_AUTO_GATE,
11 _reserved5: [u8; 0x04],
12 dmac_sta: DMAC_STA,
13 _reserved6: [u8; 0xcc],
14 dmac_en: (),
15 _reserved7: [u8; 0x04],
16 dmac_pau: (),
17 _reserved8: [u8; 0x04],
18 dmac_desc_addr: (),
19 _reserved9: [u8; 0x04],
20 dmac_cfg: (),
21 _reserved10: [u8; 0x04],
22 dmac_cur_src: (),
23 _reserved11: [u8; 0x04],
24 dmac_cur_dest: (),
25 _reserved12: [u8; 0x04],
26 dmac_bcnt_left: (),
27 _reserved13: [u8; 0x04],
28 dmac_para: (),
29 _reserved14: [u8; 0x0c],
30 dmac_mode: (),
31 _reserved15: [u8; 0x04],
32 dmac_fdesc_addr: (),
33 _reserved16: [u8; 0x04],
34 dmac_pkg_num: (),
35}
36impl RegisterBlock {
37 #[doc = "0x00 - DMAC IRQ Enable Register 0"]
38 #[inline(always)]
39 pub const fn dmac_irq_en0(&self) -> &DMAC_IRQ_EN0 {
40 &self.dmac_irq_en0
41 }
42 #[doc = "0x04 - DMAC IRQ Enable Register 1"]
43 #[inline(always)]
44 pub const fn dmac_irq_en1(&self) -> &DMAC_IRQ_EN1 {
45 &self.dmac_irq_en1
46 }
47 #[doc = "0x10 - DMAC IRQ Pending Register 0"]
48 #[inline(always)]
49 pub const fn dmac_irq_pend0(&self) -> &DMAC_IRQ_PEND0 {
50 &self.dmac_irq_pend0
51 }
52 #[doc = "0x14 - DMAC IRQ Pending Register 1"]
53 #[inline(always)]
54 pub const fn dmac_irq_pend1(&self) -> &DMAC_IRQ_PEND1 {
55 &self.dmac_irq_pend1
56 }
57 #[doc = "0x28 - DMAC Auto Gating Register"]
58 #[inline(always)]
59 pub const fn dmac_auto_gate(&self) -> &DMAC_AUTO_GATE {
60 &self.dmac_auto_gate
61 }
62 #[doc = "0x30 - DMAC Status Register"]
63 #[inline(always)]
64 pub const fn dmac_sta(&self) -> &DMAC_STA {
65 &self.dmac_sta
66 }
67 #[doc = "0x100..0x140 - DMAC Channel Enable Register"]
68 #[inline(always)]
69 pub const fn dmac_en(&self, n: usize) -> &DMAC_EN {
70 #[allow(clippy::no_effect)]
71 [(); 16][n];
72 unsafe {
73 &*(self as *const Self)
74 .cast::<u8>()
75 .add(256)
76 .add(64 * n)
77 .cast()
78 }
79 }
80 #[doc = "0x104..0x144 - DMAC Channel Pause Register"]
81 #[inline(always)]
82 pub const fn dmac_pau(&self, n: usize) -> &DMAC_PAU {
83 #[allow(clippy::no_effect)]
84 [(); 16][n];
85 unsafe {
86 &*(self as *const Self)
87 .cast::<u8>()
88 .add(260)
89 .add(64 * n)
90 .cast()
91 }
92 }
93 #[doc = "0x108..0x148 - DMAC Channel Start Address Register"]
94 #[inline(always)]
95 pub const fn dmac_desc_addr(&self, n: usize) -> &DMAC_DESC_ADDR {
96 #[allow(clippy::no_effect)]
97 [(); 16][n];
98 unsafe {
99 &*(self as *const Self)
100 .cast::<u8>()
101 .add(264)
102 .add(64 * n)
103 .cast()
104 }
105 }
106 #[doc = "0x10c..0x14c - DMAC Channel Configuration Register"]
107 #[inline(always)]
108 pub const fn dmac_cfg(&self, n: usize) -> &DMAC_CFG {
109 #[allow(clippy::no_effect)]
110 [(); 16][n];
111 unsafe {
112 &*(self as *const Self)
113 .cast::<u8>()
114 .add(268)
115 .add(64 * n)
116 .cast()
117 }
118 }
119 #[doc = "0x110..0x150 - DMAC Channel Current Source Register"]
120 #[inline(always)]
121 pub const fn dmac_cur_src(&self, n: usize) -> &DMAC_CUR_SRC {
122 #[allow(clippy::no_effect)]
123 [(); 16][n];
124 unsafe {
125 &*(self as *const Self)
126 .cast::<u8>()
127 .add(272)
128 .add(64 * n)
129 .cast()
130 }
131 }
132 #[doc = "0x114..0x154 - DMAC Channel Current Destination Register"]
133 #[inline(always)]
134 pub const fn dmac_cur_dest(&self, n: usize) -> &DMAC_CUR_DEST {
135 #[allow(clippy::no_effect)]
136 [(); 16][n];
137 unsafe {
138 &*(self as *const Self)
139 .cast::<u8>()
140 .add(276)
141 .add(64 * n)
142 .cast()
143 }
144 }
145 #[doc = "0x118..0x158 - DMAC Channel Byte Counter Left Register"]
146 #[inline(always)]
147 pub const fn dmac_bcnt_left(&self, n: usize) -> &DMAC_BCNT_LEFT {
148 #[allow(clippy::no_effect)]
149 [(); 16][n];
150 unsafe {
151 &*(self as *const Self)
152 .cast::<u8>()
153 .add(280)
154 .add(64 * n)
155 .cast()
156 }
157 }
158 #[doc = "0x11c..0x15c - DMAC Channel Parameter Register"]
159 #[inline(always)]
160 pub const fn dmac_para(&self, n: usize) -> &DMAC_PARA {
161 #[allow(clippy::no_effect)]
162 [(); 16][n];
163 unsafe {
164 &*(self as *const Self)
165 .cast::<u8>()
166 .add(284)
167 .add(64 * n)
168 .cast()
169 }
170 }
171 #[doc = "0x128..0x168 - DMAC Mode Register"]
172 #[inline(always)]
173 pub const fn dmac_mode(&self, n: usize) -> &DMAC_MODE {
174 #[allow(clippy::no_effect)]
175 [(); 16][n];
176 unsafe {
177 &*(self as *const Self)
178 .cast::<u8>()
179 .add(296)
180 .add(64 * n)
181 .cast()
182 }
183 }
184 #[doc = "0x12c..0x16c - DMAC Former Descriptor Address Register"]
185 #[inline(always)]
186 pub const fn dmac_fdesc_addr(&self, n: usize) -> &DMAC_FDESC_ADDR {
187 #[allow(clippy::no_effect)]
188 [(); 16][n];
189 unsafe {
190 &*(self as *const Self)
191 .cast::<u8>()
192 .add(300)
193 .add(64 * n)
194 .cast()
195 }
196 }
197 #[doc = "0x130..0x170 - DMAC Package Number Register"]
198 #[inline(always)]
199 pub const fn dmac_pkg_num(&self, n: usize) -> &DMAC_PKG_NUM {
200 #[allow(clippy::no_effect)]
201 [(); 16][n];
202 unsafe {
203 &*(self as *const Self)
204 .cast::<u8>()
205 .add(304)
206 .add(64 * n)
207 .cast()
208 }
209 }
210}
211#[doc = "dmac_irq_en0 (rw) register accessor: DMAC IRQ Enable Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_irq_en0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmac_irq_en0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_irq_en0`] module"]
212pub type DMAC_IRQ_EN0 = crate::Reg<dmac_irq_en0::DMAC_IRQ_EN0_SPEC>;
213#[doc = "DMAC IRQ Enable Register 0"]
214pub mod dmac_irq_en0;
215#[doc = "dmac_irq_en1 (rw) register accessor: DMAC IRQ Enable Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_irq_en1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmac_irq_en1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_irq_en1`] module"]
216pub type DMAC_IRQ_EN1 = crate::Reg<dmac_irq_en1::DMAC_IRQ_EN1_SPEC>;
217#[doc = "DMAC IRQ Enable Register 1"]
218pub mod dmac_irq_en1;
219#[doc = "dmac_irq_pend0 (rw) register accessor: DMAC IRQ Pending Register 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_irq_pend0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmac_irq_pend0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_irq_pend0`] module"]
220pub type DMAC_IRQ_PEND0 = crate::Reg<dmac_irq_pend0::DMAC_IRQ_PEND0_SPEC>;
221#[doc = "DMAC IRQ Pending Register 0"]
222pub mod dmac_irq_pend0;
223#[doc = "dmac_irq_pend1 (rw) register accessor: DMAC IRQ Pending Register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_irq_pend1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmac_irq_pend1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_irq_pend1`] module"]
224pub type DMAC_IRQ_PEND1 = crate::Reg<dmac_irq_pend1::DMAC_IRQ_PEND1_SPEC>;
225#[doc = "DMAC IRQ Pending Register 1"]
226pub mod dmac_irq_pend1;
227#[doc = "dmac_auto_gate (rw) register accessor: DMAC Auto Gating Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_auto_gate::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmac_auto_gate::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_auto_gate`] module"]
228pub type DMAC_AUTO_GATE = crate::Reg<dmac_auto_gate::DMAC_AUTO_GATE_SPEC>;
229#[doc = "DMAC Auto Gating Register"]
230pub mod dmac_auto_gate;
231#[doc = "dmac_sta (r) register accessor: DMAC Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_sta::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_sta`] module"]
232pub type DMAC_STA = crate::Reg<dmac_sta::DMAC_STA_SPEC>;
233#[doc = "DMAC Status Register"]
234pub mod dmac_sta;
235#[doc = "dmac_en (rw) register accessor: DMAC Channel Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_en::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmac_en::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_en`] module"]
236pub type DMAC_EN = crate::Reg<dmac_en::DMAC_EN_SPEC>;
237#[doc = "DMAC Channel Enable Register"]
238pub mod dmac_en;
239#[doc = "dmac_pau (rw) register accessor: DMAC Channel Pause Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_pau::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmac_pau::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_pau`] module"]
240pub type DMAC_PAU = crate::Reg<dmac_pau::DMAC_PAU_SPEC>;
241#[doc = "DMAC Channel Pause Register"]
242pub mod dmac_pau;
243#[doc = "dmac_desc_addr (rw) register accessor: DMAC Channel Start Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_desc_addr::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmac_desc_addr::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_desc_addr`] module"]
244pub type DMAC_DESC_ADDR = crate::Reg<dmac_desc_addr::DMAC_DESC_ADDR_SPEC>;
245#[doc = "DMAC Channel Start Address Register"]
246pub mod dmac_desc_addr;
247#[doc = "dmac_cfg (r) register accessor: DMAC Channel Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_cfg::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_cfg`] module"]
248pub type DMAC_CFG = crate::Reg<dmac_cfg::DMAC_CFG_SPEC>;
249#[doc = "DMAC Channel Configuration Register"]
250pub mod dmac_cfg;
251#[doc = "dmac_cur_src (r) register accessor: DMAC Channel Current Source Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_cur_src::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_cur_src`] module"]
252pub type DMAC_CUR_SRC = crate::Reg<dmac_cur_src::DMAC_CUR_SRC_SPEC>;
253#[doc = "DMAC Channel Current Source Register"]
254pub mod dmac_cur_src;
255#[doc = "dmac_cur_dest (r) register accessor: DMAC Channel Current Destination Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_cur_dest::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_cur_dest`] module"]
256pub type DMAC_CUR_DEST = crate::Reg<dmac_cur_dest::DMAC_CUR_DEST_SPEC>;
257#[doc = "DMAC Channel Current Destination Register"]
258pub mod dmac_cur_dest;
259#[doc = "dmac_bcnt_left (r) register accessor: DMAC Channel Byte Counter Left Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_bcnt_left::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_bcnt_left`] module"]
260pub type DMAC_BCNT_LEFT = crate::Reg<dmac_bcnt_left::DMAC_BCNT_LEFT_SPEC>;
261#[doc = "DMAC Channel Byte Counter Left Register"]
262pub mod dmac_bcnt_left;
263#[doc = "dmac_para (r) register accessor: DMAC Channel Parameter Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_para::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_para`] module"]
264pub type DMAC_PARA = crate::Reg<dmac_para::DMAC_PARA_SPEC>;
265#[doc = "DMAC Channel Parameter Register"]
266pub mod dmac_para;
267#[doc = "dmac_mode (rw) register accessor: DMAC Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_mode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`dmac_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_mode`] module"]
268pub type DMAC_MODE = crate::Reg<dmac_mode::DMAC_MODE_SPEC>;
269#[doc = "DMAC Mode Register"]
270pub mod dmac_mode;
271#[doc = "dmac_fdesc_addr (r) register accessor: DMAC Former Descriptor Address Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_fdesc_addr::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_fdesc_addr`] module"]
272pub type DMAC_FDESC_ADDR = crate::Reg<dmac_fdesc_addr::DMAC_FDESC_ADDR_SPEC>;
273#[doc = "DMAC Former Descriptor Address Register"]
274pub mod dmac_fdesc_addr;
275#[doc = "dmac_pkg_num (r) register accessor: DMAC Package Number Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`dmac_pkg_num::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@dmac_pkg_num`] module"]
276pub type DMAC_PKG_NUM = crate::Reg<dmac_pkg_num::DMAC_PKG_NUM_SPEC>;
277#[doc = "DMAC Package Number Register"]
278pub mod dmac_pkg_num;