d1_pac/audio_codec/
hmic_sts.rs1#[doc = "Register `hmic_sts` reader"]
2pub type R = crate::R<HMIC_STS_SPEC>;
3#[doc = "Register `hmic_sts` writer"]
4pub type W = crate::W<HMIC_STS_SPEC>;
5#[doc = "Field `mic_det_st` reader - MIC detect pending interrupt"]
6pub type MIC_DET_ST_R = crate::BitReader<MIC_DET_ST_A>;
7#[doc = "MIC detect pending interrupt\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum MIC_DET_ST_A {
10 #[doc = "0: No pending IRQ"]
11 NO_PENDING = 0,
12 #[doc = "1: Pending IRQ"]
13 PENDING = 1,
14}
15impl From<MIC_DET_ST_A> for bool {
16 #[inline(always)]
17 fn from(variant: MIC_DET_ST_A) -> Self {
18 variant as u8 != 0
19 }
20}
21impl MIC_DET_ST_R {
22 #[doc = "Get enumerated values variant"]
23 #[inline(always)]
24 pub const fn variant(&self) -> MIC_DET_ST_A {
25 match self.bits {
26 false => MIC_DET_ST_A::NO_PENDING,
27 true => MIC_DET_ST_A::PENDING,
28 }
29 }
30 #[doc = "No pending IRQ"]
31 #[inline(always)]
32 pub fn is_no_pending(&self) -> bool {
33 *self == MIC_DET_ST_A::NO_PENDING
34 }
35 #[doc = "Pending IRQ"]
36 #[inline(always)]
37 pub fn is_pending(&self) -> bool {
38 *self == MIC_DET_ST_A::PENDING
39 }
40}
41#[doc = "Field `mic_det_st` writer - MIC detect pending interrupt"]
42pub type MIC_DET_ST_W<'a, REG> = crate::BitWriter1C<'a, REG, MIC_DET_ST_A>;
43impl<'a, REG> MIC_DET_ST_W<'a, REG>
44where
45 REG: crate::Writable + crate::RegisterSpec,
46{
47 #[doc = "No pending IRQ"]
48 #[inline(always)]
49 pub fn no_pending(self) -> &'a mut crate::W<REG> {
50 self.variant(MIC_DET_ST_A::NO_PENDING)
51 }
52 #[doc = "Pending IRQ"]
53 #[inline(always)]
54 pub fn pending(self) -> &'a mut crate::W<REG> {
55 self.variant(MIC_DET_ST_A::PENDING)
56 }
57}
58#[doc = "Field `jack_det_iirq` reader - Jack input detect pending interrupt"]
59pub type JACK_DET_IIRQ_R = crate::BitReader<JACK_DET_IIRQ_A>;
60#[doc = "Jack input detect pending interrupt\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum JACK_DET_IIRQ_A {
63 #[doc = "0: No Pending IRQ"]
64 NO_PENDING = 0,
65 #[doc = "1: Pending IRQ"]
66 PENDING = 1,
67}
68impl From<JACK_DET_IIRQ_A> for bool {
69 #[inline(always)]
70 fn from(variant: JACK_DET_IIRQ_A) -> Self {
71 variant as u8 != 0
72 }
73}
74impl JACK_DET_IIRQ_R {
75 #[doc = "Get enumerated values variant"]
76 #[inline(always)]
77 pub const fn variant(&self) -> JACK_DET_IIRQ_A {
78 match self.bits {
79 false => JACK_DET_IIRQ_A::NO_PENDING,
80 true => JACK_DET_IIRQ_A::PENDING,
81 }
82 }
83 #[doc = "No Pending IRQ"]
84 #[inline(always)]
85 pub fn is_no_pending(&self) -> bool {
86 *self == JACK_DET_IIRQ_A::NO_PENDING
87 }
88 #[doc = "Pending IRQ"]
89 #[inline(always)]
90 pub fn is_pending(&self) -> bool {
91 *self == JACK_DET_IIRQ_A::PENDING
92 }
93}
94#[doc = "Field `jack_det_iirq` writer - Jack input detect pending interrupt"]
95pub type JACK_DET_IIRQ_W<'a, REG> = crate::BitWriter1C<'a, REG, JACK_DET_IIRQ_A>;
96impl<'a, REG> JACK_DET_IIRQ_W<'a, REG>
97where
98 REG: crate::Writable + crate::RegisterSpec,
99{
100 #[doc = "No Pending IRQ"]
101 #[inline(always)]
102 pub fn no_pending(self) -> &'a mut crate::W<REG> {
103 self.variant(JACK_DET_IIRQ_A::NO_PENDING)
104 }
105 #[doc = "Pending IRQ"]
106 #[inline(always)]
107 pub fn pending(self) -> &'a mut crate::W<REG> {
108 self.variant(JACK_DET_IIRQ_A::PENDING)
109 }
110}
111#[doc = "Field `jack_det_oirq` reader - Jack output detect pending interrupt"]
112pub type JACK_DET_OIRQ_R = crate::BitReader<JACK_DET_OIRQ_A>;
113#[doc = "Jack output detect pending interrupt\n\nValue on reset: 0"]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115pub enum JACK_DET_OIRQ_A {
116 #[doc = "0: No Pending IRQ"]
117 NO_PENDING = 0,
118 #[doc = "1: Pending IRQ"]
119 PENDING = 1,
120}
121impl From<JACK_DET_OIRQ_A> for bool {
122 #[inline(always)]
123 fn from(variant: JACK_DET_OIRQ_A) -> Self {
124 variant as u8 != 0
125 }
126}
127impl JACK_DET_OIRQ_R {
128 #[doc = "Get enumerated values variant"]
129 #[inline(always)]
130 pub const fn variant(&self) -> JACK_DET_OIRQ_A {
131 match self.bits {
132 false => JACK_DET_OIRQ_A::NO_PENDING,
133 true => JACK_DET_OIRQ_A::PENDING,
134 }
135 }
136 #[doc = "No Pending IRQ"]
137 #[inline(always)]
138 pub fn is_no_pending(&self) -> bool {
139 *self == JACK_DET_OIRQ_A::NO_PENDING
140 }
141 #[doc = "Pending IRQ"]
142 #[inline(always)]
143 pub fn is_pending(&self) -> bool {
144 *self == JACK_DET_OIRQ_A::PENDING
145 }
146}
147#[doc = "Field `jack_det_oirq` writer - Jack output detect pending interrupt"]
148pub type JACK_DET_OIRQ_W<'a, REG> = crate::BitWriter1C<'a, REG, JACK_DET_OIRQ_A>;
149impl<'a, REG> JACK_DET_OIRQ_W<'a, REG>
150where
151 REG: crate::Writable + crate::RegisterSpec,
152{
153 #[doc = "No Pending IRQ"]
154 #[inline(always)]
155 pub fn no_pending(self) -> &'a mut crate::W<REG> {
156 self.variant(JACK_DET_OIRQ_A::NO_PENDING)
157 }
158 #[doc = "Pending IRQ"]
159 #[inline(always)]
160 pub fn pending(self) -> &'a mut crate::W<REG> {
161 self.variant(JACK_DET_OIRQ_A::PENDING)
162 }
163}
164#[doc = "Field `hmic_data` reader - HMIC Average Data"]
165pub type HMIC_DATA_R = crate::FieldReader;
166#[doc = "Field `mdata_discard` reader - After MIC DATA data is received, the first N-data will be discarded."]
167pub type MDATA_DISCARD_R = crate::FieldReader<MDATA_DISCARD_A>;
168#[doc = "After MIC DATA data is received, the first N-data will be discarded.\n\nValue on reset: 3"]
169#[derive(Clone, Copy, Debug, PartialEq, Eq)]
170#[repr(u8)]
171pub enum MDATA_DISCARD_A {
172 #[doc = "0: None discarded"]
173 NONE = 0,
174 #[doc = "1: 1-data discarded"]
175 _1_DATA = 1,
176 #[doc = "2: 2-data discarded"]
177 _2_DATA = 2,
178 #[doc = "3: 4-data discarded"]
179 _4_DATA = 3,
180}
181impl From<MDATA_DISCARD_A> for u8 {
182 #[inline(always)]
183 fn from(variant: MDATA_DISCARD_A) -> Self {
184 variant as _
185 }
186}
187impl crate::FieldSpec for MDATA_DISCARD_A {
188 type Ux = u8;
189}
190impl MDATA_DISCARD_R {
191 #[doc = "Get enumerated values variant"]
192 #[inline(always)]
193 pub const fn variant(&self) -> MDATA_DISCARD_A {
194 match self.bits {
195 0 => MDATA_DISCARD_A::NONE,
196 1 => MDATA_DISCARD_A::_1_DATA,
197 2 => MDATA_DISCARD_A::_2_DATA,
198 3 => MDATA_DISCARD_A::_4_DATA,
199 _ => unreachable!(),
200 }
201 }
202 #[doc = "None discarded"]
203 #[inline(always)]
204 pub fn is_none(&self) -> bool {
205 *self == MDATA_DISCARD_A::NONE
206 }
207 #[doc = "1-data discarded"]
208 #[inline(always)]
209 pub fn is_1_data(&self) -> bool {
210 *self == MDATA_DISCARD_A::_1_DATA
211 }
212 #[doc = "2-data discarded"]
213 #[inline(always)]
214 pub fn is_2_data(&self) -> bool {
215 *self == MDATA_DISCARD_A::_2_DATA
216 }
217 #[doc = "4-data discarded"]
218 #[inline(always)]
219 pub fn is_4_data(&self) -> bool {
220 *self == MDATA_DISCARD_A::_4_DATA
221 }
222}
223#[doc = "Field `mdata_discard` writer - After MIC DATA data is received, the first N-data will be discarded."]
224pub type MDATA_DISCARD_W<'a, REG> = crate::FieldWriterSafe<'a, REG, 2, MDATA_DISCARD_A>;
225impl<'a, REG> MDATA_DISCARD_W<'a, REG>
226where
227 REG: crate::Writable + crate::RegisterSpec,
228 REG::Ux: From<u8>,
229{
230 #[doc = "None discarded"]
231 #[inline(always)]
232 pub fn none(self) -> &'a mut crate::W<REG> {
233 self.variant(MDATA_DISCARD_A::NONE)
234 }
235 #[doc = "1-data discarded"]
236 #[inline(always)]
237 pub fn _1_data(self) -> &'a mut crate::W<REG> {
238 self.variant(MDATA_DISCARD_A::_1_DATA)
239 }
240 #[doc = "2-data discarded"]
241 #[inline(always)]
242 pub fn _2_data(self) -> &'a mut crate::W<REG> {
243 self.variant(MDATA_DISCARD_A::_2_DATA)
244 }
245 #[doc = "4-data discarded"]
246 #[inline(always)]
247 pub fn _4_data(self) -> &'a mut crate::W<REG> {
248 self.variant(MDATA_DISCARD_A::_4_DATA)
249 }
250}
251impl R {
252 #[doc = "Bit 0 - MIC detect pending interrupt"]
253 #[inline(always)]
254 pub fn mic_det_st(&self) -> MIC_DET_ST_R {
255 MIC_DET_ST_R::new((self.bits & 1) != 0)
256 }
257 #[doc = "Bit 3 - Jack input detect pending interrupt"]
258 #[inline(always)]
259 pub fn jack_det_iirq(&self) -> JACK_DET_IIRQ_R {
260 JACK_DET_IIRQ_R::new(((self.bits >> 3) & 1) != 0)
261 }
262 #[doc = "Bit 4 - Jack output detect pending interrupt"]
263 #[inline(always)]
264 pub fn jack_det_oirq(&self) -> JACK_DET_OIRQ_R {
265 JACK_DET_OIRQ_R::new(((self.bits >> 4) & 1) != 0)
266 }
267 #[doc = "Bits 8:12 - HMIC Average Data"]
268 #[inline(always)]
269 pub fn hmic_data(&self) -> HMIC_DATA_R {
270 HMIC_DATA_R::new(((self.bits >> 8) & 0x1f) as u8)
271 }
272 #[doc = "Bits 13:14 - After MIC DATA data is received, the first N-data will be discarded."]
273 #[inline(always)]
274 pub fn mdata_discard(&self) -> MDATA_DISCARD_R {
275 MDATA_DISCARD_R::new(((self.bits >> 13) & 3) as u8)
276 }
277}
278impl W {
279 #[doc = "Bit 0 - MIC detect pending interrupt"]
280 #[inline(always)]
281 #[must_use]
282 pub fn mic_det_st(&mut self) -> MIC_DET_ST_W<HMIC_STS_SPEC> {
283 MIC_DET_ST_W::new(self, 0)
284 }
285 #[doc = "Bit 3 - Jack input detect pending interrupt"]
286 #[inline(always)]
287 #[must_use]
288 pub fn jack_det_iirq(&mut self) -> JACK_DET_IIRQ_W<HMIC_STS_SPEC> {
289 JACK_DET_IIRQ_W::new(self, 3)
290 }
291 #[doc = "Bit 4 - Jack output detect pending interrupt"]
292 #[inline(always)]
293 #[must_use]
294 pub fn jack_det_oirq(&mut self) -> JACK_DET_OIRQ_W<HMIC_STS_SPEC> {
295 JACK_DET_OIRQ_W::new(self, 4)
296 }
297 #[doc = "Bits 13:14 - After MIC DATA data is received, the first N-data will be discarded."]
298 #[inline(always)]
299 #[must_use]
300 pub fn mdata_discard(&mut self) -> MDATA_DISCARD_W<HMIC_STS_SPEC> {
301 MDATA_DISCARD_W::new(self, 13)
302 }
303 #[doc = r" Writes raw bits to the register."]
304 #[doc = r""]
305 #[doc = r" # Safety"]
306 #[doc = r""]
307 #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
308 #[inline(always)]
309 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
310 self.bits = bits;
311 self
312 }
313}
314#[doc = "HMIC Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hmic_sts::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hmic_sts::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
315pub struct HMIC_STS_SPEC;
316impl crate::RegisterSpec for HMIC_STS_SPEC {
317 type Ux = u32;
318}
319#[doc = "`read()` method returns [`hmic_sts::R`](R) reader structure"]
320impl crate::Readable for HMIC_STS_SPEC {}
321#[doc = "`write(|w| ..)` method takes [`hmic_sts::W`](W) writer structure"]
322impl crate::Writable for HMIC_STS_SPEC {
323 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
324 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0x19;
325}
326#[doc = "`reset()` method sets hmic_sts to value 0x6000"]
327impl crate::Resettable for HMIC_STS_SPEC {
328 const RESET_VALUE: Self::Ux = 0x6000;
329}