d1_pac/audio_codec/
ac_adc_dap_ctr.rs

1#[doc = "Register `ac_adc_dap_ctr` reader"]
2pub type R = crate::R<AC_ADC_DAP_CTR_SPEC>;
3#[doc = "Register `ac_adc_dap_ctr` writer"]
4pub type W = crate::W<AC_ADC_DAP_CTR_SPEC>;
5#[doc = "Field `adc_hpf_en[1,0]` reader - ADC HPF\\[i\\] enable control"]
6pub type ADC_HPF_EN_R = crate::BitReader<ADC_HPF_EN_A>;
7#[doc = "ADC HPF\\[i\\] enable control\n\nValue on reset: 0"]
8#[derive(Clone, Copy, Debug, PartialEq, Eq)]
9pub enum ADC_HPF_EN_A {
10    #[doc = "0: Disabled"]
11    DISABLED = 0,
12    #[doc = "1: Enabled"]
13    ENABLED = 1,
14}
15impl From<ADC_HPF_EN_A> for bool {
16    #[inline(always)]
17    fn from(variant: ADC_HPF_EN_A) -> Self {
18        variant as u8 != 0
19    }
20}
21impl ADC_HPF_EN_R {
22    #[doc = "Get enumerated values variant"]
23    #[inline(always)]
24    pub const fn variant(&self) -> ADC_HPF_EN_A {
25        match self.bits {
26            false => ADC_HPF_EN_A::DISABLED,
27            true => ADC_HPF_EN_A::ENABLED,
28        }
29    }
30    #[doc = "Disabled"]
31    #[inline(always)]
32    pub fn is_disabled(&self) -> bool {
33        *self == ADC_HPF_EN_A::DISABLED
34    }
35    #[doc = "Enabled"]
36    #[inline(always)]
37    pub fn is_enabled(&self) -> bool {
38        *self == ADC_HPF_EN_A::ENABLED
39    }
40}
41#[doc = "Field `adc_hpf_en[1,0]` writer - ADC HPF\\[i\\] enable control"]
42pub type ADC_HPF_EN_W<'a, REG> = crate::BitWriter<'a, REG, ADC_HPF_EN_A>;
43impl<'a, REG> ADC_HPF_EN_W<'a, REG>
44where
45    REG: crate::Writable + crate::RegisterSpec,
46{
47    #[doc = "Disabled"]
48    #[inline(always)]
49    pub fn disabled(self) -> &'a mut crate::W<REG> {
50        self.variant(ADC_HPF_EN_A::DISABLED)
51    }
52    #[doc = "Enabled"]
53    #[inline(always)]
54    pub fn enabled(self) -> &'a mut crate::W<REG> {
55        self.variant(ADC_HPF_EN_A::ENABLED)
56    }
57}
58#[doc = "Field `adc_drc_en[1,0]` reader - ADC DRC\\[i\\] enable control"]
59pub type ADC_DRC_EN_R = crate::BitReader<ADC_DRC_EN_A>;
60#[doc = "ADC DRC\\[i\\] enable control\n\nValue on reset: 0"]
61#[derive(Clone, Copy, Debug, PartialEq, Eq)]
62pub enum ADC_DRC_EN_A {
63    #[doc = "0: Disabled"]
64    DISABLED = 0,
65    #[doc = "1: Enabled"]
66    ENABLED = 1,
67}
68impl From<ADC_DRC_EN_A> for bool {
69    #[inline(always)]
70    fn from(variant: ADC_DRC_EN_A) -> Self {
71        variant as u8 != 0
72    }
73}
74impl ADC_DRC_EN_R {
75    #[doc = "Get enumerated values variant"]
76    #[inline(always)]
77    pub const fn variant(&self) -> ADC_DRC_EN_A {
78        match self.bits {
79            false => ADC_DRC_EN_A::DISABLED,
80            true => ADC_DRC_EN_A::ENABLED,
81        }
82    }
83    #[doc = "Disabled"]
84    #[inline(always)]
85    pub fn is_disabled(&self) -> bool {
86        *self == ADC_DRC_EN_A::DISABLED
87    }
88    #[doc = "Enabled"]
89    #[inline(always)]
90    pub fn is_enabled(&self) -> bool {
91        *self == ADC_DRC_EN_A::ENABLED
92    }
93}
94#[doc = "Field `adc_drc_en[1,0]` writer - ADC DRC\\[i\\] enable control"]
95pub type ADC_DRC_EN_W<'a, REG> = crate::BitWriter<'a, REG, ADC_DRC_EN_A>;
96impl<'a, REG> ADC_DRC_EN_W<'a, REG>
97where
98    REG: crate::Writable + crate::RegisterSpec,
99{
100    #[doc = "Disabled"]
101    #[inline(always)]
102    pub fn disabled(self) -> &'a mut crate::W<REG> {
103        self.variant(ADC_DRC_EN_A::DISABLED)
104    }
105    #[doc = "Enabled"]
106    #[inline(always)]
107    pub fn enabled(self) -> &'a mut crate::W<REG> {
108        self.variant(ADC_DRC_EN_A::ENABLED)
109    }
110}
111#[doc = "Field `adc_dap_en[1,0]` reader - DAP\\[i\\] for ADC enable\n\nDAP0 control ADC1/2\n\nDAP1 control ADC3"]
112pub type ADC_DAP_EN_R = crate::BitReader<ADC_DAP_EN_A>;
113#[doc = "DAP\\[i\\] for ADC enable\n\nDAP0 control ADC1/2\n\nDAP1 control ADC3\n\nValue on reset: 0"]
114#[derive(Clone, Copy, Debug, PartialEq, Eq)]
115pub enum ADC_DAP_EN_A {
116    #[doc = "0: Bypassed"]
117    BYPASSED = 0,
118    #[doc = "1: Enabled"]
119    ENABLED = 1,
120}
121impl From<ADC_DAP_EN_A> for bool {
122    #[inline(always)]
123    fn from(variant: ADC_DAP_EN_A) -> Self {
124        variant as u8 != 0
125    }
126}
127impl ADC_DAP_EN_R {
128    #[doc = "Get enumerated values variant"]
129    #[inline(always)]
130    pub const fn variant(&self) -> ADC_DAP_EN_A {
131        match self.bits {
132            false => ADC_DAP_EN_A::BYPASSED,
133            true => ADC_DAP_EN_A::ENABLED,
134        }
135    }
136    #[doc = "Bypassed"]
137    #[inline(always)]
138    pub fn is_bypassed(&self) -> bool {
139        *self == ADC_DAP_EN_A::BYPASSED
140    }
141    #[doc = "Enabled"]
142    #[inline(always)]
143    pub fn is_enabled(&self) -> bool {
144        *self == ADC_DAP_EN_A::ENABLED
145    }
146}
147#[doc = "Field `adc_dap_en[1,0]` writer - DAP\\[i\\] for ADC enable\n\nDAP0 control ADC1/2\n\nDAP1 control ADC3"]
148pub type ADC_DAP_EN_W<'a, REG> = crate::BitWriter<'a, REG, ADC_DAP_EN_A>;
149impl<'a, REG> ADC_DAP_EN_W<'a, REG>
150where
151    REG: crate::Writable + crate::RegisterSpec,
152{
153    #[doc = "Bypassed"]
154    #[inline(always)]
155    pub fn bypassed(self) -> &'a mut crate::W<REG> {
156        self.variant(ADC_DAP_EN_A::BYPASSED)
157    }
158    #[doc = "Enabled"]
159    #[inline(always)]
160    pub fn enabled(self) -> &'a mut crate::W<REG> {
161        self.variant(ADC_DAP_EN_A::ENABLED)
162    }
163}
164impl R {
165    #[doc = "ADC HPF\\[i\\] enable control\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `adc_hpf1_en` field"]
166    #[inline(always)]
167    pub fn adc_hpf_en(&self, n: u8) -> ADC_HPF_EN_R {
168        #[allow(clippy::no_effect)]
169        [(); 2][n as usize];
170        ADC_HPF_EN_R::new(((self.bits >> (n * 4 + 24)) & 1) != 0)
171    }
172    #[doc = "Bit 24 - ADC HPF\\[i\\] enable control"]
173    #[inline(always)]
174    pub fn adc_hpf1_en(&self) -> ADC_HPF_EN_R {
175        ADC_HPF_EN_R::new(((self.bits >> 24) & 1) != 0)
176    }
177    #[doc = "Bit 28 - ADC HPF\\[i\\] enable control"]
178    #[inline(always)]
179    pub fn adc_hpf0_en(&self) -> ADC_HPF_EN_R {
180        ADC_HPF_EN_R::new(((self.bits >> 28) & 1) != 0)
181    }
182    #[doc = "ADC DRC\\[i\\] enable control\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `adc_drc1_en` field"]
183    #[inline(always)]
184    pub fn adc_drc_en(&self, n: u8) -> ADC_DRC_EN_R {
185        #[allow(clippy::no_effect)]
186        [(); 2][n as usize];
187        ADC_DRC_EN_R::new(((self.bits >> (n * 4 + 25)) & 1) != 0)
188    }
189    #[doc = "Bit 25 - ADC DRC\\[i\\] enable control"]
190    #[inline(always)]
191    pub fn adc_drc1_en(&self) -> ADC_DRC_EN_R {
192        ADC_DRC_EN_R::new(((self.bits >> 25) & 1) != 0)
193    }
194    #[doc = "Bit 29 - ADC DRC\\[i\\] enable control"]
195    #[inline(always)]
196    pub fn adc_drc0_en(&self) -> ADC_DRC_EN_R {
197        ADC_DRC_EN_R::new(((self.bits >> 29) & 1) != 0)
198    }
199    #[doc = "DAP\\[i\\] for ADC enable\n\nDAP0 control ADC1/2\n\nDAP1 control ADC3\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `adc_dap1_en` field"]
200    #[inline(always)]
201    pub fn adc_dap_en(&self, n: u8) -> ADC_DAP_EN_R {
202        #[allow(clippy::no_effect)]
203        [(); 2][n as usize];
204        ADC_DAP_EN_R::new(((self.bits >> (n * 4 + 27)) & 1) != 0)
205    }
206    #[doc = "Bit 27 - DAP\\[i\\] for ADC enable\n\nDAP0 control ADC1/2\n\nDAP1 control ADC3"]
207    #[inline(always)]
208    pub fn adc_dap1_en(&self) -> ADC_DAP_EN_R {
209        ADC_DAP_EN_R::new(((self.bits >> 27) & 1) != 0)
210    }
211    #[doc = "Bit 31 - DAP\\[i\\] for ADC enable\n\nDAP0 control ADC1/2\n\nDAP1 control ADC3"]
212    #[inline(always)]
213    pub fn adc_dap0_en(&self) -> ADC_DAP_EN_R {
214        ADC_DAP_EN_R::new(((self.bits >> 31) & 1) != 0)
215    }
216}
217impl W {
218    #[doc = "ADC HPF\\[i\\] enable control\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `adc_hpf1_en` field"]
219    #[inline(always)]
220    #[must_use]
221    pub fn adc_hpf_en(&mut self, n: u8) -> ADC_HPF_EN_W<AC_ADC_DAP_CTR_SPEC> {
222        #[allow(clippy::no_effect)]
223        [(); 2][n as usize];
224        ADC_HPF_EN_W::new(self, n * 4 + 24)
225    }
226    #[doc = "Bit 24 - ADC HPF\\[i\\] enable control"]
227    #[inline(always)]
228    #[must_use]
229    pub fn adc_hpf1_en(&mut self) -> ADC_HPF_EN_W<AC_ADC_DAP_CTR_SPEC> {
230        ADC_HPF_EN_W::new(self, 24)
231    }
232    #[doc = "Bit 28 - ADC HPF\\[i\\] enable control"]
233    #[inline(always)]
234    #[must_use]
235    pub fn adc_hpf0_en(&mut self) -> ADC_HPF_EN_W<AC_ADC_DAP_CTR_SPEC> {
236        ADC_HPF_EN_W::new(self, 28)
237    }
238    #[doc = "ADC DRC\\[i\\] enable control\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `adc_drc1_en` field"]
239    #[inline(always)]
240    #[must_use]
241    pub fn adc_drc_en(&mut self, n: u8) -> ADC_DRC_EN_W<AC_ADC_DAP_CTR_SPEC> {
242        #[allow(clippy::no_effect)]
243        [(); 2][n as usize];
244        ADC_DRC_EN_W::new(self, n * 4 + 25)
245    }
246    #[doc = "Bit 25 - ADC DRC\\[i\\] enable control"]
247    #[inline(always)]
248    #[must_use]
249    pub fn adc_drc1_en(&mut self) -> ADC_DRC_EN_W<AC_ADC_DAP_CTR_SPEC> {
250        ADC_DRC_EN_W::new(self, 25)
251    }
252    #[doc = "Bit 29 - ADC DRC\\[i\\] enable control"]
253    #[inline(always)]
254    #[must_use]
255    pub fn adc_drc0_en(&mut self) -> ADC_DRC_EN_W<AC_ADC_DAP_CTR_SPEC> {
256        ADC_DRC_EN_W::new(self, 29)
257    }
258    #[doc = "DAP\\[i\\] for ADC enable\n\nDAP0 control ADC1/2\n\nDAP1 control ADC3\n\nNOTE: `n` is number of field in register. `n == 0` corresponds to `adc_dap1_en` field"]
259    #[inline(always)]
260    #[must_use]
261    pub fn adc_dap_en(&mut self, n: u8) -> ADC_DAP_EN_W<AC_ADC_DAP_CTR_SPEC> {
262        #[allow(clippy::no_effect)]
263        [(); 2][n as usize];
264        ADC_DAP_EN_W::new(self, n * 4 + 27)
265    }
266    #[doc = "Bit 27 - DAP\\[i\\] for ADC enable\n\nDAP0 control ADC1/2\n\nDAP1 control ADC3"]
267    #[inline(always)]
268    #[must_use]
269    pub fn adc_dap1_en(&mut self) -> ADC_DAP_EN_W<AC_ADC_DAP_CTR_SPEC> {
270        ADC_DAP_EN_W::new(self, 27)
271    }
272    #[doc = "Bit 31 - DAP\\[i\\] for ADC enable\n\nDAP0 control ADC1/2\n\nDAP1 control ADC3"]
273    #[inline(always)]
274    #[must_use]
275    pub fn adc_dap0_en(&mut self) -> ADC_DAP_EN_W<AC_ADC_DAP_CTR_SPEC> {
276        ADC_DAP_EN_W::new(self, 31)
277    }
278    #[doc = r" Writes raw bits to the register."]
279    #[doc = r""]
280    #[doc = r" # Safety"]
281    #[doc = r""]
282    #[doc = r" Passing incorrect value can cause undefined behaviour. See reference manual"]
283    #[inline(always)]
284    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
285        self.bits = bits;
286        self
287    }
288}
289#[doc = "ADC DAP Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ac_adc_dap_ctr::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`ac_adc_dap_ctr::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
290pub struct AC_ADC_DAP_CTR_SPEC;
291impl crate::RegisterSpec for AC_ADC_DAP_CTR_SPEC {
292    type Ux = u32;
293}
294#[doc = "`read()` method returns [`ac_adc_dap_ctr::R`](R) reader structure"]
295impl crate::Readable for AC_ADC_DAP_CTR_SPEC {}
296#[doc = "`write(|w| ..)` method takes [`ac_adc_dap_ctr::W`](W) writer structure"]
297impl crate::Writable for AC_ADC_DAP_CTR_SPEC {
298    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
299    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
300}
301#[doc = "`reset()` method sets ac_adc_dap_ctr to value 0"]
302impl crate::Resettable for AC_ADC_DAP_CTR_SPEC {
303    const RESET_VALUE: Self::Ux = 0;
304}
d1_pac/audio_codec/ac_adc_dap_ctr.rs

d1_pac/audio_codec/
ac_adc_dap_ctr.rs
