d1_pac/
hs_timer.rs

1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4    hs_tmr_irq_en: HS_TMR_IRQ_EN,
5    hs_tmr_irq_stas: HS_TMR_IRQ_STAS,
6    _reserved2: [u8; 0x18],
7    hs_tmr_ctrl: (),
8    _reserved3: [u8; 0x04],
9    hs_tmr_intv_lo: (),
10    _reserved4: [u8; 0x04],
11    hs_tmr_intv_hi: (),
12    _reserved5: [u8; 0x04],
13    hs_tmr_curnt_lo: (),
14    _reserved6: [u8; 0x04],
15    hs_tmr_curnt_hi: (),
16}
17impl RegisterBlock {
18    #[doc = "0x00 - HS Timer IRQ Enable Register"]
19    #[inline(always)]
20    pub const fn hs_tmr_irq_en(&self) -> &HS_TMR_IRQ_EN {
21        &self.hs_tmr_irq_en
22    }
23    #[doc = "0x04 - HS Timer Status Register"]
24    #[inline(always)]
25    pub const fn hs_tmr_irq_stas(&self) -> &HS_TMR_IRQ_STAS {
26        &self.hs_tmr_irq_stas
27    }
28    #[doc = "0x20..0x28 - HS Timer Control Register"]
29    #[inline(always)]
30    pub const fn hs_tmr_ctrl(&self, n: usize) -> &HS_TMR_CTRL {
31        #[allow(clippy::no_effect)]
32        [(); 2][n];
33        unsafe {
34            &*(self as *const Self)
35                .cast::<u8>()
36                .add(32)
37                .add(32 * n)
38                .cast()
39        }
40    }
41    #[doc = "0x20 - HS Timer Control Register"]
42    #[inline(always)]
43    pub const fn hs_tmr0_ctrl(&self) -> &HS_TMR_CTRL {
44        self.hs_tmr_ctrl(0)
45    }
46    #[doc = "0x40 - HS Timer Control Register"]
47    #[inline(always)]
48    pub const fn hs_tmr1_ctrl(&self) -> &HS_TMR_CTRL {
49        self.hs_tmr_ctrl(1)
50    }
51    #[doc = "0x24..0x2c - HS Timer Interval Value Low Register"]
52    #[inline(always)]
53    pub const fn hs_tmr_intv_lo(&self, n: usize) -> &HS_TMR_INTV_LO {
54        #[allow(clippy::no_effect)]
55        [(); 2][n];
56        unsafe {
57            &*(self as *const Self)
58                .cast::<u8>()
59                .add(36)
60                .add(32 * n)
61                .cast()
62        }
63    }
64    #[doc = "0x24 - HS Timer Interval Value Low Register"]
65    #[inline(always)]
66    pub const fn hs_tmr0_intv_lo(&self) -> &HS_TMR_INTV_LO {
67        self.hs_tmr_intv_lo(0)
68    }
69    #[doc = "0x44 - HS Timer Interval Value Low Register"]
70    #[inline(always)]
71    pub const fn hs_tmr1_intv_lo(&self) -> &HS_TMR_INTV_LO {
72        self.hs_tmr_intv_lo(1)
73    }
74    #[doc = "0x28..0x30 - HS Timer Interval Value High Register"]
75    #[inline(always)]
76    pub const fn hs_tmr_intv_hi(&self, n: usize) -> &HS_TMR_INTV_HI {
77        #[allow(clippy::no_effect)]
78        [(); 2][n];
79        unsafe {
80            &*(self as *const Self)
81                .cast::<u8>()
82                .add(40)
83                .add(32 * n)
84                .cast()
85        }
86    }
87    #[doc = "0x28 - HS Timer Interval Value High Register"]
88    #[inline(always)]
89    pub const fn hs_tmr0_intv_hi(&self) -> &HS_TMR_INTV_HI {
90        self.hs_tmr_intv_hi(0)
91    }
92    #[doc = "0x48 - HS Timer Interval Value High Register"]
93    #[inline(always)]
94    pub const fn hs_tmr1_intv_hi(&self) -> &HS_TMR_INTV_HI {
95        self.hs_tmr_intv_hi(1)
96    }
97    #[doc = "0x2c..0x34 - HS Timer Current Value Low Register"]
98    #[inline(always)]
99    pub const fn hs_tmr_curnt_lo(&self, n: usize) -> &HS_TMR_CURNT_LO {
100        #[allow(clippy::no_effect)]
101        [(); 2][n];
102        unsafe {
103            &*(self as *const Self)
104                .cast::<u8>()
105                .add(44)
106                .add(32 * n)
107                .cast()
108        }
109    }
110    #[doc = "0x2c - HS Timer Current Value Low Register"]
111    #[inline(always)]
112    pub const fn hs_tmr0_curnt_lo(&self) -> &HS_TMR_CURNT_LO {
113        self.hs_tmr_curnt_lo(0)
114    }
115    #[doc = "0x4c - HS Timer Current Value Low Register"]
116    #[inline(always)]
117    pub const fn hs_tmr1_curnt_lo(&self) -> &HS_TMR_CURNT_LO {
118        self.hs_tmr_curnt_lo(1)
119    }
120    #[doc = "0x30..0x38 - HS Timer Current Value High Register"]
121    #[inline(always)]
122    pub const fn hs_tmr_curnt_hi(&self, n: usize) -> &HS_TMR_CURNT_HI {
123        #[allow(clippy::no_effect)]
124        [(); 2][n];
125        unsafe {
126            &*(self as *const Self)
127                .cast::<u8>()
128                .add(48)
129                .add(32 * n)
130                .cast()
131        }
132    }
133    #[doc = "0x30 - HS Timer Current Value High Register"]
134    #[inline(always)]
135    pub const fn hs_tmr0_curnt_hi(&self) -> &HS_TMR_CURNT_HI {
136        self.hs_tmr_curnt_hi(0)
137    }
138    #[doc = "0x50 - HS Timer Current Value High Register"]
139    #[inline(always)]
140    pub const fn hs_tmr1_curnt_hi(&self) -> &HS_TMR_CURNT_HI {
141        self.hs_tmr_curnt_hi(1)
142    }
143}
144#[doc = "hs_tmr_irq_en (rw) register accessor: HS Timer IRQ Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hs_tmr_irq_en::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hs_tmr_irq_en::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hs_tmr_irq_en`] module"]
145pub type HS_TMR_IRQ_EN = crate::Reg<hs_tmr_irq_en::HS_TMR_IRQ_EN_SPEC>;
146#[doc = "HS Timer IRQ Enable Register"]
147pub mod hs_tmr_irq_en;
148#[doc = "hs_tmr_irq_stas (rw) register accessor: HS Timer Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hs_tmr_irq_stas::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hs_tmr_irq_stas::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hs_tmr_irq_stas`] module"]
149pub type HS_TMR_IRQ_STAS = crate::Reg<hs_tmr_irq_stas::HS_TMR_IRQ_STAS_SPEC>;
150#[doc = "HS Timer Status Register"]
151pub mod hs_tmr_irq_stas;
152#[doc = "hs_tmr_ctrl (rw) register accessor: HS Timer Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hs_tmr_ctrl::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hs_tmr_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hs_tmr_ctrl`] module"]
153pub type HS_TMR_CTRL = crate::Reg<hs_tmr_ctrl::HS_TMR_CTRL_SPEC>;
154#[doc = "HS Timer Control Register"]
155pub mod hs_tmr_ctrl;
156#[doc = "hs_tmr_intv_lo (rw) register accessor: HS Timer Interval Value Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hs_tmr_intv_lo::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hs_tmr_intv_lo::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hs_tmr_intv_lo`] module"]
157pub type HS_TMR_INTV_LO = crate::Reg<hs_tmr_intv_lo::HS_TMR_INTV_LO_SPEC>;
158#[doc = "HS Timer Interval Value Low Register"]
159pub mod hs_tmr_intv_lo;
160#[doc = "hs_tmr_intv_hi (rw) register accessor: HS Timer Interval Value High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hs_tmr_intv_hi::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hs_tmr_intv_hi::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hs_tmr_intv_hi`] module"]
161pub type HS_TMR_INTV_HI = crate::Reg<hs_tmr_intv_hi::HS_TMR_INTV_HI_SPEC>;
162#[doc = "HS Timer Interval Value High Register"]
163pub mod hs_tmr_intv_hi;
164#[doc = "hs_tmr_curnt_lo (rw) register accessor: HS Timer Current Value Low Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hs_tmr_curnt_lo::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hs_tmr_curnt_lo::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hs_tmr_curnt_lo`] module"]
165pub type HS_TMR_CURNT_LO = crate::Reg<hs_tmr_curnt_lo::HS_TMR_CURNT_LO_SPEC>;
166#[doc = "HS Timer Current Value Low Register"]
167pub mod hs_tmr_curnt_lo;
168#[doc = "hs_tmr_curnt_hi (rw) register accessor: HS Timer Current Value High Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`hs_tmr_curnt_hi::R`].  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`hs_tmr_curnt_hi::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hs_tmr_curnt_hi`] module"]
169pub type HS_TMR_CURNT_HI = crate::Reg<hs_tmr_curnt_hi::HS_TMR_CURNT_HI_SPEC>;
170#[doc = "HS Timer Current Value High Register"]
171pub mod hs_tmr_curnt_hi;