1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 tmr_irq_en: TMR_IRQ_EN,
5 tmr_irq_sta: TMR_IRQ_STA,
6 _reserved2: [u8; 0x08],
7 tmr_ctrl: (),
8 _reserved3: [u8; 0x04],
9 tmr_intv_value: (),
10 _reserved4: [u8; 0x04],
11 tmr_cur_value: (),
12 _reserved5: [u8; 0x88],
13 wdog_irq_en: WDOG_IRQ_EN,
14 wdog_irq_sta: WDOG_IRQ_STA,
15 wdog_soft_rst: WDOG_SOFT_RST,
16 _reserved8: [u8; 0x04],
17 wdog_ctrl: WDOG_CTRL,
18 wdog_cfg: WDOG_CFG,
19 wdog_mode: WDOG_MODE,
20 wdog_output_cfg: WDOG_OUTPUT_CFG,
21 avs_cnt_ctl: AVS_CNT_CTL,
22 avs_cnt0: AVS_CNT0,
23 avs_cnt1: AVS_CNT1,
24 avs_cnt_div: AVS_CNT_DIV,
25}
26impl RegisterBlock {
27 #[doc = "0x00 - Timer IRQ Enable Register"]
28 #[inline(always)]
29 pub const fn tmr_irq_en(&self) -> &TMR_IRQ_EN {
30 &self.tmr_irq_en
31 }
32 #[doc = "0x04 - Timer Status Register"]
33 #[inline(always)]
34 pub const fn tmr_irq_sta(&self) -> &TMR_IRQ_STA {
35 &self.tmr_irq_sta
36 }
37 #[doc = "0x10..0x18 - Timer IRQ Enable Register"]
38 #[inline(always)]
39 pub const fn tmr_ctrl(&self, n: usize) -> &TMR_CTRL {
40 #[allow(clippy::no_effect)]
41 [(); 2][n];
42 unsafe {
43 &*(self as *const Self)
44 .cast::<u8>()
45 .add(16)
46 .add(16 * n)
47 .cast()
48 }
49 }
50 #[doc = "0x10 - Timer IRQ Enable Register"]
51 #[inline(always)]
52 pub const fn tmr0_ctrl(&self) -> &TMR_CTRL {
53 self.tmr_ctrl(0)
54 }
55 #[doc = "0x20 - Timer IRQ Enable Register"]
56 #[inline(always)]
57 pub const fn tmr1_ctrl(&self) -> &TMR_CTRL {
58 self.tmr_ctrl(1)
59 }
60 #[doc = "0x14..0x1c - Timer Interval Value Register"]
61 #[inline(always)]
62 pub const fn tmr_intv_value(&self, n: usize) -> &TMR_INTV_VALUE {
63 #[allow(clippy::no_effect)]
64 [(); 2][n];
65 unsafe {
66 &*(self as *const Self)
67 .cast::<u8>()
68 .add(20)
69 .add(16 * n)
70 .cast()
71 }
72 }
73 #[doc = "0x14 - Timer Interval Value Register"]
74 #[inline(always)]
75 pub const fn tmr0_intv_value(&self) -> &TMR_INTV_VALUE {
76 self.tmr_intv_value(0)
77 }
78 #[doc = "0x24 - Timer Interval Value Register"]
79 #[inline(always)]
80 pub const fn tmr1_intv_value(&self) -> &TMR_INTV_VALUE {
81 self.tmr_intv_value(1)
82 }
83 #[doc = "0x18..0x20 - Timer Current Value Register"]
84 #[inline(always)]
85 pub const fn tmr_cur_value(&self, n: usize) -> &TMR_CUR_VALUE {
86 #[allow(clippy::no_effect)]
87 [(); 2][n];
88 unsafe {
89 &*(self as *const Self)
90 .cast::<u8>()
91 .add(24)
92 .add(16 * n)
93 .cast()
94 }
95 }
96 #[doc = "0x18 - Timer Current Value Register"]
97 #[inline(always)]
98 pub const fn tmr0_cur_value(&self) -> &TMR_CUR_VALUE {
99 self.tmr_cur_value(0)
100 }
101 #[doc = "0x28 - Timer Current Value Register"]
102 #[inline(always)]
103 pub const fn tmr1_cur_value(&self) -> &TMR_CUR_VALUE {
104 self.tmr_cur_value(1)
105 }
106 #[doc = "0xa0 - Watchdog IRQ Enable Register"]
107 #[inline(always)]
108 pub const fn wdog_irq_en(&self) -> &WDOG_IRQ_EN {
109 &self.wdog_irq_en
110 }
111 #[doc = "0xa4 - Watchdog Status Register"]
112 #[inline(always)]
113 pub const fn wdog_irq_sta(&self) -> &WDOG_IRQ_STA {
114 &self.wdog_irq_sta
115 }
116 #[doc = "0xa8 - Watchdog Software Reset Register"]
117 #[inline(always)]
118 pub const fn wdog_soft_rst(&self) -> &WDOG_SOFT_RST {
119 &self.wdog_soft_rst
120 }
121 #[doc = "0xb0 - Watchdog Control Register"]
122 #[inline(always)]
123 pub const fn wdog_ctrl(&self) -> &WDOG_CTRL {
124 &self.wdog_ctrl
125 }
126 #[doc = "0xb4 - Watchdog Configuration Register"]
127 #[inline(always)]
128 pub const fn wdog_cfg(&self) -> &WDOG_CFG {
129 &self.wdog_cfg
130 }
131 #[doc = "0xb8 - Watchdog Mode Register"]
132 #[inline(always)]
133 pub const fn wdog_mode(&self) -> &WDOG_MODE {
134 &self.wdog_mode
135 }
136 #[doc = "0xbc - Watchdog Output Configuration Register"]
137 #[inline(always)]
138 pub const fn wdog_output_cfg(&self) -> &WDOG_OUTPUT_CFG {
139 &self.wdog_output_cfg
140 }
141 #[doc = "0xc0 - AVS Counter Control Register"]
142 #[inline(always)]
143 pub const fn avs_cnt_ctl(&self) -> &AVS_CNT_CTL {
144 &self.avs_cnt_ctl
145 }
146 #[doc = "0xc4 - AVS Counter 0 Register"]
147 #[inline(always)]
148 pub const fn avs_cnt0(&self) -> &AVS_CNT0 {
149 &self.avs_cnt0
150 }
151 #[doc = "0xc8 - AVS Counter 1 Register"]
152 #[inline(always)]
153 pub const fn avs_cnt1(&self) -> &AVS_CNT1 {
154 &self.avs_cnt1
155 }
156 #[doc = "0xcc - AVS Counter Divisor Register"]
157 #[inline(always)]
158 pub const fn avs_cnt_div(&self) -> &AVS_CNT_DIV {
159 &self.avs_cnt_div
160 }
161}
162#[doc = "tmr_irq_en (rw) register accessor: Timer IRQ Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tmr_irq_en::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tmr_irq_en::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tmr_irq_en`] module"]
163pub type TMR_IRQ_EN = crate::Reg<tmr_irq_en::TMR_IRQ_EN_SPEC>;
164#[doc = "Timer IRQ Enable Register"]
165pub mod tmr_irq_en;
166#[doc = "tmr_irq_sta (rw) register accessor: Timer Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tmr_irq_sta::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tmr_irq_sta::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tmr_irq_sta`] module"]
167pub type TMR_IRQ_STA = crate::Reg<tmr_irq_sta::TMR_IRQ_STA_SPEC>;
168#[doc = "Timer Status Register"]
169pub mod tmr_irq_sta;
170#[doc = "tmr_ctrl (rw) register accessor: Timer IRQ Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tmr_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tmr_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tmr_ctrl`] module"]
171pub type TMR_CTRL = crate::Reg<tmr_ctrl::TMR_CTRL_SPEC>;
172#[doc = "Timer IRQ Enable Register"]
173pub mod tmr_ctrl;
174#[doc = "tmr_intv_value (rw) register accessor: Timer Interval Value Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tmr_intv_value::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tmr_intv_value::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tmr_intv_value`] module"]
175pub type TMR_INTV_VALUE = crate::Reg<tmr_intv_value::TMR_INTV_VALUE_SPEC>;
176#[doc = "Timer Interval Value Register"]
177pub mod tmr_intv_value;
178#[doc = "tmr_cur_value (rw) register accessor: Timer Current Value Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`tmr_cur_value::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`tmr_cur_value::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tmr_cur_value`] module"]
179pub type TMR_CUR_VALUE = crate::Reg<tmr_cur_value::TMR_CUR_VALUE_SPEC>;
180#[doc = "Timer Current Value Register"]
181pub mod tmr_cur_value;
182#[doc = "wdog_irq_en (rw) register accessor: Watchdog IRQ Enable Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdog_irq_en::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdog_irq_en::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdog_irq_en`] module"]
183pub type WDOG_IRQ_EN = crate::Reg<wdog_irq_en::WDOG_IRQ_EN_SPEC>;
184#[doc = "Watchdog IRQ Enable Register"]
185pub mod wdog_irq_en;
186#[doc = "wdog_irq_sta (rw) register accessor: Watchdog Status Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdog_irq_sta::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdog_irq_sta::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdog_irq_sta`] module"]
187pub type WDOG_IRQ_STA = crate::Reg<wdog_irq_sta::WDOG_IRQ_STA_SPEC>;
188#[doc = "Watchdog Status Register"]
189pub mod wdog_irq_sta;
190#[doc = "wdog_soft_rst (rw) register accessor: Watchdog Software Reset Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdog_soft_rst::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdog_soft_rst::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdog_soft_rst`] module"]
191pub type WDOG_SOFT_RST = crate::Reg<wdog_soft_rst::WDOG_SOFT_RST_SPEC>;
192#[doc = "Watchdog Software Reset Register"]
193pub mod wdog_soft_rst;
194#[doc = "wdog_ctrl (rw) register accessor: Watchdog Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdog_ctrl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdog_ctrl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdog_ctrl`] module"]
195pub type WDOG_CTRL = crate::Reg<wdog_ctrl::WDOG_CTRL_SPEC>;
196#[doc = "Watchdog Control Register"]
197pub mod wdog_ctrl;
198#[doc = "wdog_cfg (rw) register accessor: Watchdog Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdog_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdog_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdog_cfg`] module"]
199pub type WDOG_CFG = crate::Reg<wdog_cfg::WDOG_CFG_SPEC>;
200#[doc = "Watchdog Configuration Register"]
201pub mod wdog_cfg;
202#[doc = "wdog_mode (rw) register accessor: Watchdog Mode Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdog_mode::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdog_mode::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdog_mode`] module"]
203pub type WDOG_MODE = crate::Reg<wdog_mode::WDOG_MODE_SPEC>;
204#[doc = "Watchdog Mode Register"]
205pub mod wdog_mode;
206#[doc = "wdog_output_cfg (rw) register accessor: Watchdog Output Configuration Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wdog_output_cfg::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wdog_output_cfg::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@wdog_output_cfg`] module"]
207pub type WDOG_OUTPUT_CFG = crate::Reg<wdog_output_cfg::WDOG_OUTPUT_CFG_SPEC>;
208#[doc = "Watchdog Output Configuration Register"]
209pub mod wdog_output_cfg;
210#[doc = "avs_cnt_ctl (rw) register accessor: AVS Counter Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`avs_cnt_ctl::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`avs_cnt_ctl::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@avs_cnt_ctl`] module"]
211pub type AVS_CNT_CTL = crate::Reg<avs_cnt_ctl::AVS_CNT_CTL_SPEC>;
212#[doc = "AVS Counter Control Register"]
213pub mod avs_cnt_ctl;
214#[doc = "avs_cnt0 (rw) register accessor: AVS Counter 0 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`avs_cnt0::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`avs_cnt0::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@avs_cnt0`] module"]
215pub type AVS_CNT0 = crate::Reg<avs_cnt0::AVS_CNT0_SPEC>;
216#[doc = "AVS Counter 0 Register"]
217pub mod avs_cnt0;
218#[doc = "avs_cnt1 (rw) register accessor: AVS Counter 1 Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`avs_cnt1::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`avs_cnt1::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@avs_cnt1`] module"]
219pub type AVS_CNT1 = crate::Reg<avs_cnt1::AVS_CNT1_SPEC>;
220#[doc = "AVS Counter 1 Register"]
221pub mod avs_cnt1;
222#[doc = "avs_cnt_div (rw) register accessor: AVS Counter Divisor Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`avs_cnt_div::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`avs_cnt_div::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@avs_cnt_div`] module"]
223pub type AVS_CNT_DIV = crate::Reg<avs_cnt_div::AVS_CNT_DIV_SPEC>;
224#[doc = "AVS Counter Divisor Register"]
225pub mod avs_cnt_div;