cyt4bf_d/m0/eth0/
tx_lpi_time.rs

1#[doc = "Register `TX_LPI_TIME` reader"]
2pub struct R(crate::R<TX_LPI_TIME_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<TX_LPI_TIME_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<TX_LPI_TIME_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<TX_LPI_TIME_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `LPI_TIME` reader - Time in LPI. This register increments once every 16 pclk cycles when the enable LPI transmission bit 20 is set in the transmit control register. Cleared on read."]
17pub type LPI_TIME_R = crate::FieldReader<u32, u32>;
18impl R {
19    #[doc = "Bits 0:23 - Time in LPI. This register increments once every 16 pclk cycles when the enable LPI transmission bit 20 is set in the transmit control register. Cleared on read."]
20    #[inline(always)]
21    pub fn lpi_time(&self) -> LPI_TIME_R {
22        LPI_TIME_R::new(self.bits & 0x00ff_ffff)
23    }
24}
25#[doc = "Transmit LPI time\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tx_lpi_time](index.html) module"]
26pub struct TX_LPI_TIME_SPEC;
27impl crate::RegisterSpec for TX_LPI_TIME_SPEC {
28    type Ux = u32;
29}
30#[doc = "`read()` method returns [tx_lpi_time::R](R) reader structure"]
31impl crate::Readable for TX_LPI_TIME_SPEC {
32    type Reader = R;
33}
34#[doc = "`reset()` method sets TX_LPI_TIME to value 0"]
35impl crate::Resettable for TX_LPI_TIME_SPEC {
36    const RESET_VALUE: Self::Ux = 0;
37}
cyt4bf_d/m0/eth0/tx_lpi_time.rs

cyt4bf_d/m0/eth0/
tx_lpi_time.rs
