cyt4bb_b/m0/canfd0/
status.rs

1#[doc = "Register `STATUS` reader"]
2pub struct R(crate::R<STATUS_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<STATUS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<STATUS_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `STOP_ACK` reader - Clock Stop Acknowledge for each TTCAN IP. These bits are directly driven by m_ttcan_clkstop_ack of each TTCAN IP. When this bit is set the corresponding TTCAN IP clocks will be gated off, except HCLK will enabled for each AHB write"]
17pub type STOP_ACK_R = crate::FieldReader<u8, u8>;
18impl R {
19    #[doc = "Bits 0:7 - Clock Stop Acknowledge for each TTCAN IP. These bits are directly driven by m_ttcan_clkstop_ack of each TTCAN IP. When this bit is set the corresponding TTCAN IP clocks will be gated off, except HCLK will enabled for each AHB write"]
20    #[inline(always)]
21    pub fn stop_ack(&self) -> STOP_ACK_R {
22        STOP_ACK_R::new((self.bits & 0xff) as u8)
23    }
24}
25#[doc = "Global CAN status register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
26pub struct STATUS_SPEC;
27impl crate::RegisterSpec for STATUS_SPEC {
28    type Ux = u32;
29}
30#[doc = "`read()` method returns [status::R](R) reader structure"]
31impl crate::Readable for STATUS_SPEC {
32    type Reader = R;
33}
34#[doc = "`reset()` method sets STATUS to value 0"]
35impl crate::Resettable for STATUS_SPEC {
36    const RESET_VALUE: Self::Ux = 0;
37}
cyt4bb_b/m0/canfd0/status.rs

cyt4bb_b/m0/canfd0/
status.rs
