cyt4bb_a/m0/eth0/
screening_type_1_register_8.rs

1#[doc = "Register `SCREENING_TYPE_1_REGISTER_8` reader"]
2pub struct R(crate::R<SCREENING_TYPE_1_REGISTER_8_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SCREENING_TYPE_1_REGISTER_8_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SCREENING_TYPE_1_REGISTER_8_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SCREENING_TYPE_1_REGISTER_8_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SCREENING_TYPE_1_REGISTER_8` writer"]
17pub struct W(crate::W<SCREENING_TYPE_1_REGISTER_8_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SCREENING_TYPE_1_REGISTER_8_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SCREENING_TYPE_1_REGISTER_8_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SCREENING_TYPE_1_REGISTER_8_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `QUEUE_NUMBER` reader - Queue Number (0 to 15)"]
38pub type QUEUE_NUMBER_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `QUEUE_NUMBER` writer - Queue Number (0 to 15)"]
40pub type QUEUE_NUMBER_W<'a, const O: u8> =
41    crate::FieldWriter<'a, u32, SCREENING_TYPE_1_REGISTER_8_SPEC, u8, u8, 4, O>;
42#[doc = "Field `DSTC_MATCH` reader - DS/TC Match"]
43pub type DSTC_MATCH_R = crate::FieldReader<u8, u8>;
44#[doc = "Field `DSTC_MATCH` writer - DS/TC Match"]
45pub type DSTC_MATCH_W<'a, const O: u8> =
46    crate::FieldWriter<'a, u32, SCREENING_TYPE_1_REGISTER_8_SPEC, u8, u8, 8, O>;
47#[doc = "Field `UDP_PORT_MATCH` reader - UDP Port Match"]
48pub type UDP_PORT_MATCH_R = crate::FieldReader<u16, u16>;
49#[doc = "Field `UDP_PORT_MATCH` writer - UDP Port Match"]
50pub type UDP_PORT_MATCH_W<'a, const O: u8> =
51    crate::FieldWriter<'a, u32, SCREENING_TYPE_1_REGISTER_8_SPEC, u16, u16, 16, O>;
52#[doc = "Field `DSTC_ENABLE` reader - DS/TC Enable"]
53pub type DSTC_ENABLE_R = crate::BitReader<bool>;
54#[doc = "Field `DSTC_ENABLE` writer - DS/TC Enable"]
55pub type DSTC_ENABLE_W<'a, const O: u8> =
56    crate::BitWriter<'a, u32, SCREENING_TYPE_1_REGISTER_8_SPEC, bool, O>;
57#[doc = "Field `UDP_PORT_MATCH_ENABLE` reader - UDP port match enable"]
58pub type UDP_PORT_MATCH_ENABLE_R = crate::BitReader<bool>;
59#[doc = "Field `UDP_PORT_MATCH_ENABLE` writer - UDP port match enable"]
60pub type UDP_PORT_MATCH_ENABLE_W<'a, const O: u8> =
61    crate::BitWriter<'a, u32, SCREENING_TYPE_1_REGISTER_8_SPEC, bool, O>;
62impl R {
63    #[doc = "Bits 0:3 - Queue Number (0 to 15)"]
64    #[inline(always)]
65    pub fn queue_number(&self) -> QUEUE_NUMBER_R {
66        QUEUE_NUMBER_R::new((self.bits & 0x0f) as u8)
67    }
68    #[doc = "Bits 4:11 - DS/TC Match"]
69    #[inline(always)]
70    pub fn dstc_match(&self) -> DSTC_MATCH_R {
71        DSTC_MATCH_R::new(((self.bits >> 4) & 0xff) as u8)
72    }
73    #[doc = "Bits 12:27 - UDP Port Match"]
74    #[inline(always)]
75    pub fn udp_port_match(&self) -> UDP_PORT_MATCH_R {
76        UDP_PORT_MATCH_R::new(((self.bits >> 12) & 0xffff) as u16)
77    }
78    #[doc = "Bit 28 - DS/TC Enable"]
79    #[inline(always)]
80    pub fn dstc_enable(&self) -> DSTC_ENABLE_R {
81        DSTC_ENABLE_R::new(((self.bits >> 28) & 1) != 0)
82    }
83    #[doc = "Bit 29 - UDP port match enable"]
84    #[inline(always)]
85    pub fn udp_port_match_enable(&self) -> UDP_PORT_MATCH_ENABLE_R {
86        UDP_PORT_MATCH_ENABLE_R::new(((self.bits >> 29) & 1) != 0)
87    }
88}
89impl W {
90    #[doc = "Bits 0:3 - Queue Number (0 to 15)"]
91    #[inline(always)]
92    #[must_use]
93    pub fn queue_number(&mut self) -> QUEUE_NUMBER_W<0> {
94        QUEUE_NUMBER_W::new(self)
95    }
96    #[doc = "Bits 4:11 - DS/TC Match"]
97    #[inline(always)]
98    #[must_use]
99    pub fn dstc_match(&mut self) -> DSTC_MATCH_W<4> {
100        DSTC_MATCH_W::new(self)
101    }
102    #[doc = "Bits 12:27 - UDP Port Match"]
103    #[inline(always)]
104    #[must_use]
105    pub fn udp_port_match(&mut self) -> UDP_PORT_MATCH_W<12> {
106        UDP_PORT_MATCH_W::new(self)
107    }
108    #[doc = "Bit 28 - DS/TC Enable"]
109    #[inline(always)]
110    #[must_use]
111    pub fn dstc_enable(&mut self) -> DSTC_ENABLE_W<28> {
112        DSTC_ENABLE_W::new(self)
113    }
114    #[doc = "Bit 29 - UDP port match enable"]
115    #[inline(always)]
116    #[must_use]
117    pub fn udp_port_match_enable(&mut self) -> UDP_PORT_MATCH_ENABLE_W<29> {
118        UDP_PORT_MATCH_ENABLE_W::new(self)
119    }
120    #[doc = "Writes raw bits to the register."]
121    #[inline(always)]
122    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
123        self.0.bits(bits);
124        self
125    }
126}
127#[doc = "screening type 1 register 8, same as screening_type_1_register_0\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [screening_type_1_register_8](index.html) module"]
128pub struct SCREENING_TYPE_1_REGISTER_8_SPEC;
129impl crate::RegisterSpec for SCREENING_TYPE_1_REGISTER_8_SPEC {
130    type Ux = u32;
131}
132#[doc = "`read()` method returns [screening_type_1_register_8::R](R) reader structure"]
133impl crate::Readable for SCREENING_TYPE_1_REGISTER_8_SPEC {
134    type Reader = R;
135}
136#[doc = "`write(|w| ..)` method takes [screening_type_1_register_8::W](W) writer structure"]
137impl crate::Writable for SCREENING_TYPE_1_REGISTER_8_SPEC {
138    type Writer = W;
139    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
140    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
141}
142#[doc = "`reset()` method sets SCREENING_TYPE_1_REGISTER_8 to value 0"]
143impl crate::Resettable for SCREENING_TYPE_1_REGISTER_8_SPEC {
144    const RESET_VALUE: Self::Ux = 0;
145}
cyt4bb_a/m0/eth0/screening_type_1_register_8.rs

cyt4bb_a/m0/eth0/
screening_type_1_register_8.rs
