cyt3dl_c/m0/crypto/
tr_cmd.rs

1#[doc = "Register `TR_CMD` reader"]
2pub struct R(crate::R<TR_CMD_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<TR_CMD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<TR_CMD_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<TR_CMD_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `TR_CMD` writer"]
17pub struct W(crate::W<TR_CMD_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<TR_CMD_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<TR_CMD_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<TR_CMD_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `START` reader - True random command. On completion of the command, HW sets this field to '0' and sets INTR.TR_DATA_AVAILABLE to '1 when: - A random number is generated in TR_RESULT. - All ring oscillators are off (per TR_CTL1). - A repetition count (RC) or adaptive proportion (AP) error is detected during the random number generation (INTR.TR_RC/AP_DETECT_ERROR). Note: On completion of the command, SW should check TR_CTL1 and INTR.TR_RC/AP_DETECT_ERROR to ensure that no unexpected error occurred during random number generation."]
38pub type START_R = crate::BitReader<bool>;
39#[doc = "Field `START` writer - True random command. On completion of the command, HW sets this field to '0' and sets INTR.TR_DATA_AVAILABLE to '1 when: - A random number is generated in TR_RESULT. - All ring oscillators are off (per TR_CTL1). - A repetition count (RC) or adaptive proportion (AP) error is detected during the random number generation (INTR.TR_RC/AP_DETECT_ERROR). Note: On completion of the command, SW should check TR_CTL1 and INTR.TR_RC/AP_DETECT_ERROR to ensure that no unexpected error occurred during random number generation."]
40pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, TR_CMD_SPEC, bool, O>;
41impl R {
42    #[doc = "Bit 0 - True random command. On completion of the command, HW sets this field to '0' and sets INTR.TR_DATA_AVAILABLE to '1 when: - A random number is generated in TR_RESULT. - All ring oscillators are off (per TR_CTL1). - A repetition count (RC) or adaptive proportion (AP) error is detected during the random number generation (INTR.TR_RC/AP_DETECT_ERROR). Note: On completion of the command, SW should check TR_CTL1 and INTR.TR_RC/AP_DETECT_ERROR to ensure that no unexpected error occurred during random number generation."]
43    #[inline(always)]
44    pub fn start(&self) -> START_R {
45        START_R::new((self.bits & 1) != 0)
46    }
47}
48impl W {
49    #[doc = "Bit 0 - True random command. On completion of the command, HW sets this field to '0' and sets INTR.TR_DATA_AVAILABLE to '1 when: - A random number is generated in TR_RESULT. - All ring oscillators are off (per TR_CTL1). - A repetition count (RC) or adaptive proportion (AP) error is detected during the random number generation (INTR.TR_RC/AP_DETECT_ERROR). Note: On completion of the command, SW should check TR_CTL1 and INTR.TR_RC/AP_DETECT_ERROR to ensure that no unexpected error occurred during random number generation."]
50    #[inline(always)]
51    #[must_use]
52    pub fn start(&mut self) -> START_W<0> {
53        START_W::new(self)
54    }
55    #[doc = "Writes raw bits to the register."]
56    #[inline(always)]
57    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
58        self.0.bits(bits);
59        self
60    }
61}
62#[doc = "True random command\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tr_cmd](index.html) module"]
63pub struct TR_CMD_SPEC;
64impl crate::RegisterSpec for TR_CMD_SPEC {
65    type Ux = u32;
66}
67#[doc = "`read()` method returns [tr_cmd::R](R) reader structure"]
68impl crate::Readable for TR_CMD_SPEC {
69    type Reader = R;
70}
71#[doc = "`write(|w| ..)` method takes [tr_cmd::W](W) writer structure"]
72impl crate::Writable for TR_CMD_SPEC {
73    type Writer = W;
74    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
75    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
76}
77#[doc = "`reset()` method sets TR_CMD to value 0"]
78impl crate::Resettable for TR_CMD_SPEC {
79    const RESET_VALUE: Self::Ux = 0;
80}
cyt3dl_c/m0/crypto/tr_cmd.rs

cyt3dl_c/m0/crypto/
tr_cmd.rs
