1#[doc = "Register `PWR_LVD_CTL` reader"]
2pub struct R(crate::R<PWR_LVD_CTL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<PWR_LVD_CTL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<PWR_LVD_CTL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<PWR_LVD_CTL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `PWR_LVD_CTL` writer"]
17pub struct W(crate::W<PWR_LVD_CTL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<PWR_LVD_CTL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<PWR_LVD_CTL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<PWR_LVD_CTL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `HVLVD1_TRIPSEL` reader - Threshold selection for HVLVD1. Disable the detector (HVLVD1_EN=0) before changing the threshold. 0: rise=1.225V (nom), fall=1.2V (nom) 1: rise=1.425V (nom), fall=1.4V (nom) 2: rise=1.625V (nom), fall=1.6V (nom) 3: rise=1.825V (nom), fall=1.8V (nom) 4: rise=2.025V (nom), fall=2V (nom) 5: rise=2.125V (nom), fall=2.1V (nom) 6: rise=2.225V (nom), fall=2.2V (nom) 7: rise=2.325V (nom), fall=2.3V (nom) 8: rise=2.425V (nom), fall=2.4V (nom) 9: rise=2.525V (nom), fall=2.5V (nom) 10: rise=2.625V (nom), fall=2.6V (nom) 11: rise=2.725V (nom), fall=2.7V (nom) 12: rise=2.825V (nom), fall=2.8V (nom) 13: rise=2.925V (nom), fall=2.9V (nom) 14: rise=3.025V (nom), fall=3.0V (nom) 15: rise=3.125V (nom), fall=3.1V (nom)"]
38pub type HVLVD1_TRIPSEL_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `HVLVD1_TRIPSEL` writer - Threshold selection for HVLVD1. Disable the detector (HVLVD1_EN=0) before changing the threshold. 0: rise=1.225V (nom), fall=1.2V (nom) 1: rise=1.425V (nom), fall=1.4V (nom) 2: rise=1.625V (nom), fall=1.6V (nom) 3: rise=1.825V (nom), fall=1.8V (nom) 4: rise=2.025V (nom), fall=2V (nom) 5: rise=2.125V (nom), fall=2.1V (nom) 6: rise=2.225V (nom), fall=2.2V (nom) 7: rise=2.325V (nom), fall=2.3V (nom) 8: rise=2.425V (nom), fall=2.4V (nom) 9: rise=2.525V (nom), fall=2.5V (nom) 10: rise=2.625V (nom), fall=2.6V (nom) 11: rise=2.725V (nom), fall=2.7V (nom) 12: rise=2.825V (nom), fall=2.8V (nom) 13: rise=2.925V (nom), fall=2.9V (nom) 14: rise=3.025V (nom), fall=3.0V (nom) 15: rise=3.125V (nom), fall=3.1V (nom)"]
40pub type HVLVD1_TRIPSEL_W<'a, const O: u8> =
41 crate::FieldWriter<'a, u32, PWR_LVD_CTL_SPEC, u8, u8, 4, O>;
42#[doc = "Field `HVLVD1_SRCSEL` reader - Source selection for HVLVD1"]
43pub type HVLVD1_SRCSEL_R = crate::FieldReader<u8, HVLVD1_SRCSEL_A>;
44#[doc = "Source selection for HVLVD1\n\nValue on reset: 0"]
45#[derive(Clone, Copy, Debug, PartialEq, Eq)]
46#[repr(u8)]
47pub enum HVLVD1_SRCSEL_A {
48 #[doc = "0: Select VDDD"]
49 VDDD = 0,
50 #[doc = "1: Select AMUXBUSA (VDDD branch)"]
51 AMUXBUSA = 1,
52 #[doc = "2: N/A"]
53 RSVD = 2,
54 #[doc = "3: N/A"]
55 VDDIO = 3,
56 #[doc = "4: Select AMUXBUSB (VDDD branch)"]
57 AMUXBUSB = 4,
58}
59impl From<HVLVD1_SRCSEL_A> for u8 {
60 #[inline(always)]
61 fn from(variant: HVLVD1_SRCSEL_A) -> Self {
62 variant as _
63 }
64}
65impl HVLVD1_SRCSEL_R {
66 #[doc = "Get enumerated values variant"]
67 #[inline(always)]
68 pub fn variant(&self) -> Option<HVLVD1_SRCSEL_A> {
69 match self.bits {
70 0 => Some(HVLVD1_SRCSEL_A::VDDD),
71 1 => Some(HVLVD1_SRCSEL_A::AMUXBUSA),
72 2 => Some(HVLVD1_SRCSEL_A::RSVD),
73 3 => Some(HVLVD1_SRCSEL_A::VDDIO),
74 4 => Some(HVLVD1_SRCSEL_A::AMUXBUSB),
75 _ => None,
76 }
77 }
78 #[doc = "Checks if the value of the field is `VDDD`"]
79 #[inline(always)]
80 pub fn is_vddd(&self) -> bool {
81 *self == HVLVD1_SRCSEL_A::VDDD
82 }
83 #[doc = "Checks if the value of the field is `AMUXBUSA`"]
84 #[inline(always)]
85 pub fn is_amuxbusa(&self) -> bool {
86 *self == HVLVD1_SRCSEL_A::AMUXBUSA
87 }
88 #[doc = "Checks if the value of the field is `RSVD`"]
89 #[inline(always)]
90 pub fn is_rsvd(&self) -> bool {
91 *self == HVLVD1_SRCSEL_A::RSVD
92 }
93 #[doc = "Checks if the value of the field is `VDDIO`"]
94 #[inline(always)]
95 pub fn is_vddio(&self) -> bool {
96 *self == HVLVD1_SRCSEL_A::VDDIO
97 }
98 #[doc = "Checks if the value of the field is `AMUXBUSB`"]
99 #[inline(always)]
100 pub fn is_amuxbusb(&self) -> bool {
101 *self == HVLVD1_SRCSEL_A::AMUXBUSB
102 }
103}
104#[doc = "Field `HVLVD1_SRCSEL` writer - Source selection for HVLVD1"]
105pub type HVLVD1_SRCSEL_W<'a, const O: u8> =
106 crate::FieldWriter<'a, u32, PWR_LVD_CTL_SPEC, u8, HVLVD1_SRCSEL_A, 3, O>;
107impl<'a, const O: u8> HVLVD1_SRCSEL_W<'a, O> {
108 #[doc = "Select VDDD"]
109 #[inline(always)]
110 pub fn vddd(self) -> &'a mut W {
111 self.variant(HVLVD1_SRCSEL_A::VDDD)
112 }
113 #[doc = "Select AMUXBUSA (VDDD branch)"]
114 #[inline(always)]
115 pub fn amuxbusa(self) -> &'a mut W {
116 self.variant(HVLVD1_SRCSEL_A::AMUXBUSA)
117 }
118 #[doc = "N/A"]
119 #[inline(always)]
120 pub fn rsvd(self) -> &'a mut W {
121 self.variant(HVLVD1_SRCSEL_A::RSVD)
122 }
123 #[doc = "N/A"]
124 #[inline(always)]
125 pub fn vddio(self) -> &'a mut W {
126 self.variant(HVLVD1_SRCSEL_A::VDDIO)
127 }
128 #[doc = "Select AMUXBUSB (VDDD branch)"]
129 #[inline(always)]
130 pub fn amuxbusb(self) -> &'a mut W {
131 self.variant(HVLVD1_SRCSEL_A::AMUXBUSB)
132 }
133}
134#[doc = "Field `HVLVD1_EN` reader - Enable HVLVD1 voltage monitor. HVLVD1 does not function during DEEPSLEEP, but it automatically returns to its configured setting after DEEPSLEEP wakeup. Do not change other HVLVD1 settings when enabled."]
135pub type HVLVD1_EN_R = crate::BitReader<bool>;
136#[doc = "Field `HVLVD1_EN` writer - Enable HVLVD1 voltage monitor. HVLVD1 does not function during DEEPSLEEP, but it automatically returns to its configured setting after DEEPSLEEP wakeup. Do not change other HVLVD1 settings when enabled."]
137pub type HVLVD1_EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PWR_LVD_CTL_SPEC, bool, O>;
138#[doc = "Field `HVLVD1_TRIPSEL_HT` reader - N/A"]
139pub type HVLVD1_TRIPSEL_HT_R = crate::FieldReader<u8, u8>;
140#[doc = "Field `HVLVD1_TRIPSEL_HT` writer - N/A"]
141pub type HVLVD1_TRIPSEL_HT_W<'a, const O: u8> =
142 crate::FieldWriter<'a, u32, PWR_LVD_CTL_SPEC, u8, u8, 5, O>;
143#[doc = "Field `HVLVD1_DPSLP_EN_HT` reader - Keep HVLVD1 voltage monitor enabled during DEEPSLEEP mode. This field is only used when HVLVD1_EN_HT==1."]
144pub type HVLVD1_DPSLP_EN_HT_R = crate::BitReader<bool>;
145#[doc = "Field `HVLVD1_DPSLP_EN_HT` writer - Keep HVLVD1 voltage monitor enabled during DEEPSLEEP mode. This field is only used when HVLVD1_EN_HT==1."]
146pub type HVLVD1_DPSLP_EN_HT_W<'a, const O: u8> =
147 crate::BitWriter<'a, u32, PWR_LVD_CTL_SPEC, bool, O>;
148#[doc = "Field `HVLVD1_EN_HT` reader - Enable HVLVD1 voltage monitor. This detector monitors vddd only. Do not change other HVLVD1 settings when enabled."]
149pub type HVLVD1_EN_HT_R = crate::BitReader<bool>;
150#[doc = "Field `HVLVD1_EN_HT` writer - Enable HVLVD1 voltage monitor. This detector monitors vddd only. Do not change other HVLVD1 settings when enabled."]
151pub type HVLVD1_EN_HT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PWR_LVD_CTL_SPEC, bool, O>;
152#[doc = "Field `HVLVD1_EDGE_SEL` reader - Sets which edge(s) will trigger an action when the threshold is crossed."]
153pub type HVLVD1_EDGE_SEL_R = crate::FieldReader<u8, HVLVD1_EDGE_SEL_A>;
154#[doc = "Sets which edge(s) will trigger an action when the threshold is crossed.\n\nValue on reset: 0"]
155#[derive(Clone, Copy, Debug, PartialEq, Eq)]
156#[repr(u8)]
157pub enum HVLVD1_EDGE_SEL_A {
158 #[doc = "0: Disabled"]
159 DISABLE = 0,
160 #[doc = "1: Rising edge"]
161 RISING = 1,
162 #[doc = "2: Falling edge"]
163 FALLING = 2,
164 #[doc = "3: Both rising and falling edges"]
165 BOTH = 3,
166}
167impl From<HVLVD1_EDGE_SEL_A> for u8 {
168 #[inline(always)]
169 fn from(variant: HVLVD1_EDGE_SEL_A) -> Self {
170 variant as _
171 }
172}
173impl HVLVD1_EDGE_SEL_R {
174 #[doc = "Get enumerated values variant"]
175 #[inline(always)]
176 pub fn variant(&self) -> HVLVD1_EDGE_SEL_A {
177 match self.bits {
178 0 => HVLVD1_EDGE_SEL_A::DISABLE,
179 1 => HVLVD1_EDGE_SEL_A::RISING,
180 2 => HVLVD1_EDGE_SEL_A::FALLING,
181 3 => HVLVD1_EDGE_SEL_A::BOTH,
182 _ => unreachable!(),
183 }
184 }
185 #[doc = "Checks if the value of the field is `DISABLE`"]
186 #[inline(always)]
187 pub fn is_disable(&self) -> bool {
188 *self == HVLVD1_EDGE_SEL_A::DISABLE
189 }
190 #[doc = "Checks if the value of the field is `RISING`"]
191 #[inline(always)]
192 pub fn is_rising(&self) -> bool {
193 *self == HVLVD1_EDGE_SEL_A::RISING
194 }
195 #[doc = "Checks if the value of the field is `FALLING`"]
196 #[inline(always)]
197 pub fn is_falling(&self) -> bool {
198 *self == HVLVD1_EDGE_SEL_A::FALLING
199 }
200 #[doc = "Checks if the value of the field is `BOTH`"]
201 #[inline(always)]
202 pub fn is_both(&self) -> bool {
203 *self == HVLVD1_EDGE_SEL_A::BOTH
204 }
205}
206#[doc = "Field `HVLVD1_EDGE_SEL` writer - Sets which edge(s) will trigger an action when the threshold is crossed."]
207pub type HVLVD1_EDGE_SEL_W<'a, const O: u8> =
208 crate::FieldWriterSafe<'a, u32, PWR_LVD_CTL_SPEC, u8, HVLVD1_EDGE_SEL_A, 2, O>;
209impl<'a, const O: u8> HVLVD1_EDGE_SEL_W<'a, O> {
210 #[doc = "Disabled"]
211 #[inline(always)]
212 pub fn disable(self) -> &'a mut W {
213 self.variant(HVLVD1_EDGE_SEL_A::DISABLE)
214 }
215 #[doc = "Rising edge"]
216 #[inline(always)]
217 pub fn rising(self) -> &'a mut W {
218 self.variant(HVLVD1_EDGE_SEL_A::RISING)
219 }
220 #[doc = "Falling edge"]
221 #[inline(always)]
222 pub fn falling(self) -> &'a mut W {
223 self.variant(HVLVD1_EDGE_SEL_A::FALLING)
224 }
225 #[doc = "Both rising and falling edges"]
226 #[inline(always)]
227 pub fn both(self) -> &'a mut W {
228 self.variant(HVLVD1_EDGE_SEL_A::BOTH)
229 }
230}
231#[doc = "Field `HVLVD1_ACTION` reader - Action taken when the threshold is crossed in the programmed directions(s)"]
232pub type HVLVD1_ACTION_R = crate::BitReader<HVLVD1_ACTION_A>;
233#[doc = "Action taken when the threshold is crossed in the programmed directions(s)\n\nValue on reset: 0"]
234#[derive(Clone, Copy, Debug, PartialEq, Eq)]
235pub enum HVLVD1_ACTION_A {
236 #[doc = "0: Generate an interrupt"]
237 INTERRUPT = 0,
238 #[doc = "1: Generate a fault"]
239 FAULT = 1,
240}
241impl From<HVLVD1_ACTION_A> for bool {
242 #[inline(always)]
243 fn from(variant: HVLVD1_ACTION_A) -> Self {
244 variant as u8 != 0
245 }
246}
247impl HVLVD1_ACTION_R {
248 #[doc = "Get enumerated values variant"]
249 #[inline(always)]
250 pub fn variant(&self) -> HVLVD1_ACTION_A {
251 match self.bits {
252 false => HVLVD1_ACTION_A::INTERRUPT,
253 true => HVLVD1_ACTION_A::FAULT,
254 }
255 }
256 #[doc = "Checks if the value of the field is `INTERRUPT`"]
257 #[inline(always)]
258 pub fn is_interrupt(&self) -> bool {
259 *self == HVLVD1_ACTION_A::INTERRUPT
260 }
261 #[doc = "Checks if the value of the field is `FAULT`"]
262 #[inline(always)]
263 pub fn is_fault(&self) -> bool {
264 *self == HVLVD1_ACTION_A::FAULT
265 }
266}
267#[doc = "Field `HVLVD1_ACTION` writer - Action taken when the threshold is crossed in the programmed directions(s)"]
268pub type HVLVD1_ACTION_W<'a, const O: u8> =
269 crate::BitWriter<'a, u32, PWR_LVD_CTL_SPEC, HVLVD1_ACTION_A, O>;
270impl<'a, const O: u8> HVLVD1_ACTION_W<'a, O> {
271 #[doc = "Generate an interrupt"]
272 #[inline(always)]
273 pub fn interrupt(self) -> &'a mut W {
274 self.variant(HVLVD1_ACTION_A::INTERRUPT)
275 }
276 #[doc = "Generate a fault"]
277 #[inline(always)]
278 pub fn fault(self) -> &'a mut W {
279 self.variant(HVLVD1_ACTION_A::FAULT)
280 }
281}
282impl R {
283 #[doc = "Bits 0:3 - Threshold selection for HVLVD1. Disable the detector (HVLVD1_EN=0) before changing the threshold. 0: rise=1.225V (nom), fall=1.2V (nom) 1: rise=1.425V (nom), fall=1.4V (nom) 2: rise=1.625V (nom), fall=1.6V (nom) 3: rise=1.825V (nom), fall=1.8V (nom) 4: rise=2.025V (nom), fall=2V (nom) 5: rise=2.125V (nom), fall=2.1V (nom) 6: rise=2.225V (nom), fall=2.2V (nom) 7: rise=2.325V (nom), fall=2.3V (nom) 8: rise=2.425V (nom), fall=2.4V (nom) 9: rise=2.525V (nom), fall=2.5V (nom) 10: rise=2.625V (nom), fall=2.6V (nom) 11: rise=2.725V (nom), fall=2.7V (nom) 12: rise=2.825V (nom), fall=2.8V (nom) 13: rise=2.925V (nom), fall=2.9V (nom) 14: rise=3.025V (nom), fall=3.0V (nom) 15: rise=3.125V (nom), fall=3.1V (nom)"]
284 #[inline(always)]
285 pub fn hvlvd1_tripsel(&self) -> HVLVD1_TRIPSEL_R {
286 HVLVD1_TRIPSEL_R::new((self.bits & 0x0f) as u8)
287 }
288 #[doc = "Bits 4:6 - Source selection for HVLVD1"]
289 #[inline(always)]
290 pub fn hvlvd1_srcsel(&self) -> HVLVD1_SRCSEL_R {
291 HVLVD1_SRCSEL_R::new(((self.bits >> 4) & 7) as u8)
292 }
293 #[doc = "Bit 7 - Enable HVLVD1 voltage monitor. HVLVD1 does not function during DEEPSLEEP, but it automatically returns to its configured setting after DEEPSLEEP wakeup. Do not change other HVLVD1 settings when enabled."]
294 #[inline(always)]
295 pub fn hvlvd1_en(&self) -> HVLVD1_EN_R {
296 HVLVD1_EN_R::new(((self.bits >> 7) & 1) != 0)
297 }
298 #[doc = "Bits 8:12 - N/A"]
299 #[inline(always)]
300 pub fn hvlvd1_tripsel_ht(&self) -> HVLVD1_TRIPSEL_HT_R {
301 HVLVD1_TRIPSEL_HT_R::new(((self.bits >> 8) & 0x1f) as u8)
302 }
303 #[doc = "Bit 14 - Keep HVLVD1 voltage monitor enabled during DEEPSLEEP mode. This field is only used when HVLVD1_EN_HT==1."]
304 #[inline(always)]
305 pub fn hvlvd1_dpslp_en_ht(&self) -> HVLVD1_DPSLP_EN_HT_R {
306 HVLVD1_DPSLP_EN_HT_R::new(((self.bits >> 14) & 1) != 0)
307 }
308 #[doc = "Bit 15 - Enable HVLVD1 voltage monitor. This detector monitors vddd only. Do not change other HVLVD1 settings when enabled."]
309 #[inline(always)]
310 pub fn hvlvd1_en_ht(&self) -> HVLVD1_EN_HT_R {
311 HVLVD1_EN_HT_R::new(((self.bits >> 15) & 1) != 0)
312 }
313 #[doc = "Bits 16:17 - Sets which edge(s) will trigger an action when the threshold is crossed."]
314 #[inline(always)]
315 pub fn hvlvd1_edge_sel(&self) -> HVLVD1_EDGE_SEL_R {
316 HVLVD1_EDGE_SEL_R::new(((self.bits >> 16) & 3) as u8)
317 }
318 #[doc = "Bit 18 - Action taken when the threshold is crossed in the programmed directions(s)"]
319 #[inline(always)]
320 pub fn hvlvd1_action(&self) -> HVLVD1_ACTION_R {
321 HVLVD1_ACTION_R::new(((self.bits >> 18) & 1) != 0)
322 }
323}
324impl W {
325 #[doc = "Bits 0:3 - Threshold selection for HVLVD1. Disable the detector (HVLVD1_EN=0) before changing the threshold. 0: rise=1.225V (nom), fall=1.2V (nom) 1: rise=1.425V (nom), fall=1.4V (nom) 2: rise=1.625V (nom), fall=1.6V (nom) 3: rise=1.825V (nom), fall=1.8V (nom) 4: rise=2.025V (nom), fall=2V (nom) 5: rise=2.125V (nom), fall=2.1V (nom) 6: rise=2.225V (nom), fall=2.2V (nom) 7: rise=2.325V (nom), fall=2.3V (nom) 8: rise=2.425V (nom), fall=2.4V (nom) 9: rise=2.525V (nom), fall=2.5V (nom) 10: rise=2.625V (nom), fall=2.6V (nom) 11: rise=2.725V (nom), fall=2.7V (nom) 12: rise=2.825V (nom), fall=2.8V (nom) 13: rise=2.925V (nom), fall=2.9V (nom) 14: rise=3.025V (nom), fall=3.0V (nom) 15: rise=3.125V (nom), fall=3.1V (nom)"]
326 #[inline(always)]
327 #[must_use]
328 pub fn hvlvd1_tripsel(&mut self) -> HVLVD1_TRIPSEL_W<0> {
329 HVLVD1_TRIPSEL_W::new(self)
330 }
331 #[doc = "Bits 4:6 - Source selection for HVLVD1"]
332 #[inline(always)]
333 #[must_use]
334 pub fn hvlvd1_srcsel(&mut self) -> HVLVD1_SRCSEL_W<4> {
335 HVLVD1_SRCSEL_W::new(self)
336 }
337 #[doc = "Bit 7 - Enable HVLVD1 voltage monitor. HVLVD1 does not function during DEEPSLEEP, but it automatically returns to its configured setting after DEEPSLEEP wakeup. Do not change other HVLVD1 settings when enabled."]
338 #[inline(always)]
339 #[must_use]
340 pub fn hvlvd1_en(&mut self) -> HVLVD1_EN_W<7> {
341 HVLVD1_EN_W::new(self)
342 }
343 #[doc = "Bits 8:12 - N/A"]
344 #[inline(always)]
345 #[must_use]
346 pub fn hvlvd1_tripsel_ht(&mut self) -> HVLVD1_TRIPSEL_HT_W<8> {
347 HVLVD1_TRIPSEL_HT_W::new(self)
348 }
349 #[doc = "Bit 14 - Keep HVLVD1 voltage monitor enabled during DEEPSLEEP mode. This field is only used when HVLVD1_EN_HT==1."]
350 #[inline(always)]
351 #[must_use]
352 pub fn hvlvd1_dpslp_en_ht(&mut self) -> HVLVD1_DPSLP_EN_HT_W<14> {
353 HVLVD1_DPSLP_EN_HT_W::new(self)
354 }
355 #[doc = "Bit 15 - Enable HVLVD1 voltage monitor. This detector monitors vddd only. Do not change other HVLVD1 settings when enabled."]
356 #[inline(always)]
357 #[must_use]
358 pub fn hvlvd1_en_ht(&mut self) -> HVLVD1_EN_HT_W<15> {
359 HVLVD1_EN_HT_W::new(self)
360 }
361 #[doc = "Bits 16:17 - Sets which edge(s) will trigger an action when the threshold is crossed."]
362 #[inline(always)]
363 #[must_use]
364 pub fn hvlvd1_edge_sel(&mut self) -> HVLVD1_EDGE_SEL_W<16> {
365 HVLVD1_EDGE_SEL_W::new(self)
366 }
367 #[doc = "Bit 18 - Action taken when the threshold is crossed in the programmed directions(s)"]
368 #[inline(always)]
369 #[must_use]
370 pub fn hvlvd1_action(&mut self) -> HVLVD1_ACTION_W<18> {
371 HVLVD1_ACTION_W::new(self)
372 }
373 #[doc = "Writes raw bits to the register."]
374 #[inline(always)]
375 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
376 self.0.bits(bits);
377 self
378 }
379}
380#[doc = "High Voltage / Low Voltage Detector (HVLVD) Configuration Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pwr_lvd_ctl](index.html) module"]
381pub struct PWR_LVD_CTL_SPEC;
382impl crate::RegisterSpec for PWR_LVD_CTL_SPEC {
383 type Ux = u32;
384}
385#[doc = "`read()` method returns [pwr_lvd_ctl::R](R) reader structure"]
386impl crate::Readable for PWR_LVD_CTL_SPEC {
387 type Reader = R;
388}
389#[doc = "`write(|w| ..)` method takes [pwr_lvd_ctl::W](W) writer structure"]
390impl crate::Writable for PWR_LVD_CTL_SPEC {
391 type Writer = W;
392 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
393 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
394}
395#[doc = "`reset()` method sets PWR_LVD_CTL to value 0"]
396impl crate::Resettable for PWR_LVD_CTL_SPEC {
397 const RESET_VALUE: Self::Ux = 0;
398}