cyt3bb_a/m0/prot/smpu/
ms14_ctl.rs

1#[doc = "Register `MS14_CTL` reader"]
2pub struct R(crate::R<MS14_CTL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<MS14_CTL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<MS14_CTL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<MS14_CTL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `MS14_CTL` writer"]
17pub struct W(crate::W<MS14_CTL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<MS14_CTL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<MS14_CTL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<MS14_CTL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `P` reader - See MS0_CTL.P."]
38pub type P_R = crate::BitReader<bool>;
39#[doc = "Field `P` writer - See MS0_CTL.P."]
40pub type P_W<'a, const O: u8> = crate::BitWriter<'a, u32, MS14_CTL_SPEC, bool, O>;
41#[doc = "Field `NS` reader - See MS0_CTL.NS."]
42pub type NS_R = crate::BitReader<bool>;
43#[doc = "Field `NS` writer - See MS0_CTL.NS."]
44pub type NS_W<'a, const O: u8> = crate::BitWriter<'a, u32, MS14_CTL_SPEC, bool, O>;
45#[doc = "Field `PRIO` reader - See MS0_CTL.PRIO"]
46pub type PRIO_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `PRIO` writer - See MS0_CTL.PRIO"]
48pub type PRIO_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MS14_CTL_SPEC, u8, u8, 2, O>;
49#[doc = "Field `PC_MASK_0` reader - See MS0_CTL.PC_MASK_0."]
50pub type PC_MASK_0_R = crate::BitReader<bool>;
51#[doc = "Field `PC_MASK_15_TO_1` reader - See MS0_CTL.PC_MASK_15_TO_1."]
52pub type PC_MASK_15_TO_1_R = crate::FieldReader<u16, u16>;
53#[doc = "Field `PC_MASK_15_TO_1` writer - See MS0_CTL.PC_MASK_15_TO_1."]
54pub type PC_MASK_15_TO_1_W<'a, const O: u8> =
55    crate::FieldWriter<'a, u32, MS14_CTL_SPEC, u16, u16, 15, O>;
56impl R {
57    #[doc = "Bit 0 - See MS0_CTL.P."]
58    #[inline(always)]
59    pub fn p(&self) -> P_R {
60        P_R::new((self.bits & 1) != 0)
61    }
62    #[doc = "Bit 1 - See MS0_CTL.NS."]
63    #[inline(always)]
64    pub fn ns(&self) -> NS_R {
65        NS_R::new(((self.bits >> 1) & 1) != 0)
66    }
67    #[doc = "Bits 8:9 - See MS0_CTL.PRIO"]
68    #[inline(always)]
69    pub fn prio(&self) -> PRIO_R {
70        PRIO_R::new(((self.bits >> 8) & 3) as u8)
71    }
72    #[doc = "Bit 16 - See MS0_CTL.PC_MASK_0."]
73    #[inline(always)]
74    pub fn pc_mask_0(&self) -> PC_MASK_0_R {
75        PC_MASK_0_R::new(((self.bits >> 16) & 1) != 0)
76    }
77    #[doc = "Bits 17:31 - See MS0_CTL.PC_MASK_15_TO_1."]
78    #[inline(always)]
79    pub fn pc_mask_15_to_1(&self) -> PC_MASK_15_TO_1_R {
80        PC_MASK_15_TO_1_R::new(((self.bits >> 17) & 0x7fff) as u16)
81    }
82}
83impl W {
84    #[doc = "Bit 0 - See MS0_CTL.P."]
85    #[inline(always)]
86    #[must_use]
87    pub fn p(&mut self) -> P_W<0> {
88        P_W::new(self)
89    }
90    #[doc = "Bit 1 - See MS0_CTL.NS."]
91    #[inline(always)]
92    #[must_use]
93    pub fn ns(&mut self) -> NS_W<1> {
94        NS_W::new(self)
95    }
96    #[doc = "Bits 8:9 - See MS0_CTL.PRIO"]
97    #[inline(always)]
98    #[must_use]
99    pub fn prio(&mut self) -> PRIO_W<8> {
100        PRIO_W::new(self)
101    }
102    #[doc = "Bits 17:31 - See MS0_CTL.PC_MASK_15_TO_1."]
103    #[inline(always)]
104    #[must_use]
105    pub fn pc_mask_15_to_1(&mut self) -> PC_MASK_15_TO_1_W<17> {
106        PC_MASK_15_TO_1_W::new(self)
107    }
108    #[doc = "Writes raw bits to the register."]
109    #[inline(always)]
110    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
111        self.0.bits(bits);
112        self
113    }
114}
115#[doc = "Master 14 protection context control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ms14_ctl](index.html) module"]
116pub struct MS14_CTL_SPEC;
117impl crate::RegisterSpec for MS14_CTL_SPEC {
118    type Ux = u32;
119}
120#[doc = "`read()` method returns [ms14_ctl::R](R) reader structure"]
121impl crate::Readable for MS14_CTL_SPEC {
122    type Reader = R;
123}
124#[doc = "`write(|w| ..)` method takes [ms14_ctl::W](W) writer structure"]
125impl crate::Writable for MS14_CTL_SPEC {
126    type Writer = W;
127    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
128    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
129}
130#[doc = "`reset()` method sets MS14_CTL to value 0x0303"]
131impl crate::Resettable for MS14_CTL_SPEC {
132    const RESET_VALUE: Self::Ux = 0x0303;
133}
cyt3bb_a/m0/prot/smpu/ms14_ctl.rs

cyt3bb_a/m0/prot/smpu/
ms14_ctl.rs
