cyt3bb_a/m0/gpio/
intr_cause2.rs

1#[doc = "Register `INTR_CAUSE2` reader"]
2pub struct R(crate::R<INTR_CAUSE2_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INTR_CAUSE2_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INTR_CAUSE2_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INTR_CAUSE2_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `PORT_INT` reader - Each IO port has an associated bit field in this register. The bit field reflects the IO port's interrupt line (bit field i reflects 'gpio_interrupts\\[i\\]' for IO port i). The register is used when the system uses a combined interrupt line 'gpio_interrupt'. The software ISR reads the register to determine which IO port(s) is responsible for the combined interrupt line. Once, the IO port(s) is determined, the IO port's GPIO_PORT_INTR register is read to determine the IO pin(s) in the IO port that caused the interrupt. '0': Port has no pending interrupt '1': Port has pending interrupt"]
17pub type PORT_INT_R = crate::FieldReader<u32, u32>;
18impl R {
19    #[doc = "Bits 0:31 - Each IO port has an associated bit field in this register. The bit field reflects the IO port's interrupt line (bit field i reflects 'gpio_interrupts\\[i\\]' for IO port i). The register is used when the system uses a combined interrupt line 'gpio_interrupt'. The software ISR reads the register to determine which IO port(s) is responsible for the combined interrupt line. Once, the IO port(s) is determined, the IO port's GPIO_PORT_INTR register is read to determine the IO pin(s) in the IO port that caused the interrupt. '0': Port has no pending interrupt '1': Port has pending interrupt"]
20    #[inline(always)]
21    pub fn port_int(&self) -> PORT_INT_R {
22        PORT_INT_R::new(self.bits)
23    }
24}
25#[doc = "Interrupt port cause register 2\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intr_cause2](index.html) module"]
26pub struct INTR_CAUSE2_SPEC;
27impl crate::RegisterSpec for INTR_CAUSE2_SPEC {
28    type Ux = u32;
29}
30#[doc = "`read()` method returns [intr_cause2::R](R) reader structure"]
31impl crate::Readable for INTR_CAUSE2_SPEC {
32    type Reader = R;
33}
34#[doc = "`reset()` method sets INTR_CAUSE2 to value 0"]
35impl crate::Resettable for INTR_CAUSE2_SPEC {
36    const RESET_VALUE: Self::Ux = 0;
37}
cyt3bb_a/m0/gpio/intr_cause2.rs

cyt3bb_a/m0/gpio/
intr_cause2.rs
