cyt3bb_a/m0/eth0/
int_q1_status.rs

1#[doc = "Register `INT_Q1_STATUS` reader"]
2pub struct R(crate::R<INT_Q1_STATUS_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<INT_Q1_STATUS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<INT_Q1_STATUS_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<INT_Q1_STATUS_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `RECEIVE_COMPLETE` reader - Receive complete"]
17pub type RECEIVE_COMPLETE_R = crate::BitReader<bool>;
18#[doc = "Field `RX_USED_BIT_READ` reader - RX used bit read"]
19pub type RX_USED_BIT_READ_R = crate::BitReader<bool>;
20#[doc = "Field `RETRY_LIMIT_EXCEEDED_OR_LATE_COLLISION` reader - Retry limit exceeded or late collision"]
21pub type RETRY_LIMIT_EXCEEDED_OR_LATE_COLLISION_R = crate::BitReader<bool>;
22#[doc = "Field `AMBA_ERROR` reader - Transmit frame corruption due to AMBA (AXI/AHB) error set if an error occurs whilst midway through reading transmit frame from the external memory, including HRESP (AHB), RRESP and BRESP errors (AXI) and buffers exhausted mid frame"]
23pub type AMBA_ERROR_R = crate::BitReader<bool>;
24#[doc = "Field `TRANSMIT_COMPLETE` reader - Transmit complete"]
25pub type TRANSMIT_COMPLETE_R = crate::BitReader<bool>;
26#[doc = "Field `RESP_NOT_OK` reader - bresp not OK"]
27pub type RESP_NOT_OK_R = crate::BitReader<bool>;
28impl R {
29    #[doc = "Bit 1 - Receive complete"]
30    #[inline(always)]
31    pub fn receive_complete(&self) -> RECEIVE_COMPLETE_R {
32        RECEIVE_COMPLETE_R::new(((self.bits >> 1) & 1) != 0)
33    }
34    #[doc = "Bit 2 - RX used bit read"]
35    #[inline(always)]
36    pub fn rx_used_bit_read(&self) -> RX_USED_BIT_READ_R {
37        RX_USED_BIT_READ_R::new(((self.bits >> 2) & 1) != 0)
38    }
39    #[doc = "Bit 5 - Retry limit exceeded or late collision"]
40    #[inline(always)]
41    pub fn retry_limit_exceeded_or_late_collision(
42        &self,
43    ) -> RETRY_LIMIT_EXCEEDED_OR_LATE_COLLISION_R {
44        RETRY_LIMIT_EXCEEDED_OR_LATE_COLLISION_R::new(((self.bits >> 5) & 1) != 0)
45    }
46    #[doc = "Bit 6 - Transmit frame corruption due to AMBA (AXI/AHB) error set if an error occurs whilst midway through reading transmit frame from the external memory, including HRESP (AHB), RRESP and BRESP errors (AXI) and buffers exhausted mid frame"]
47    #[inline(always)]
48    pub fn amba_error(&self) -> AMBA_ERROR_R {
49        AMBA_ERROR_R::new(((self.bits >> 6) & 1) != 0)
50    }
51    #[doc = "Bit 7 - Transmit complete"]
52    #[inline(always)]
53    pub fn transmit_complete(&self) -> TRANSMIT_COMPLETE_R {
54        TRANSMIT_COMPLETE_R::new(((self.bits >> 7) & 1) != 0)
55    }
56    #[doc = "Bit 11 - bresp not OK"]
57    #[inline(always)]
58    pub fn resp_not_ok(&self) -> RESP_NOT_OK_R {
59        RESP_NOT_OK_R::new(((self.bits >> 11) & 1) != 0)
60    }
61}
62#[doc = "Priority queue Interrupt Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [int_q1_status](index.html) module"]
63pub struct INT_Q1_STATUS_SPEC;
64impl crate::RegisterSpec for INT_Q1_STATUS_SPEC {
65    type Ux = u32;
66}
67#[doc = "`read()` method returns [int_q1_status::R](R) reader structure"]
68impl crate::Readable for INT_Q1_STATUS_SPEC {
69    type Reader = R;
70}
71#[doc = "`reset()` method sets INT_Q1_STATUS to value 0"]
72impl crate::Resettable for INT_Q1_STATUS_SPEC {
73    const RESET_VALUE: Self::Ux = 0;
74}
cyt3bb_a/m0/eth0/int_q1_status.rs

cyt3bb_a/m0/eth0/
int_q1_status.rs
