cyt3bb_a/m0/crypto/
pr_lfsr_ctl2.rs1#[doc = "Register `PR_LFSR_CTL2` reader"]
2pub struct R(crate::R<PR_LFSR_CTL2_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<PR_LFSR_CTL2_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<PR_LFSR_CTL2_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<PR_LFSR_CTL2_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `PR_LFSR_CTL2` writer"]
17pub struct W(crate::W<PR_LFSR_CTL2_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<PR_LFSR_CTL2_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<PR_LFSR_CTL2_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<PR_LFSR_CTL2_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `LFSR29` reader - State of a 29-bit Linear Feedback Shift Registers (LFSR) that is used to generate a pseudo random bit sequence. See PR_LFSR_CTL0."]
38pub type LFSR29_R = crate::FieldReader<u32, u32>;
39#[doc = "Field `LFSR29` writer - State of a 29-bit Linear Feedback Shift Registers (LFSR) that is used to generate a pseudo random bit sequence. See PR_LFSR_CTL0."]
40pub type LFSR29_W<'a, const O: u8> =
41 crate::FieldWriter<'a, u32, PR_LFSR_CTL2_SPEC, u32, u32, 29, O>;
42impl R {
43 #[doc = "Bits 0:28 - State of a 29-bit Linear Feedback Shift Registers (LFSR) that is used to generate a pseudo random bit sequence. See PR_LFSR_CTL0."]
44 #[inline(always)]
45 pub fn lfsr29(&self) -> LFSR29_R {
46 LFSR29_R::new(self.bits & 0x1fff_ffff)
47 }
48}
49impl W {
50 #[doc = "Bits 0:28 - State of a 29-bit Linear Feedback Shift Registers (LFSR) that is used to generate a pseudo random bit sequence. See PR_LFSR_CTL0."]
51 #[inline(always)]
52 #[must_use]
53 pub fn lfsr29(&mut self) -> LFSR29_W<0> {
54 LFSR29_W::new(self)
55 }
56 #[doc = "Writes raw bits to the register."]
57 #[inline(always)]
58 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
59 self.0.bits(bits);
60 self
61 }
62}
63#[doc = "Pseudo random LFSR control 2\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pr_lfsr_ctl2](index.html) module"]
64pub struct PR_LFSR_CTL2_SPEC;
65impl crate::RegisterSpec for PR_LFSR_CTL2_SPEC {
66 type Ux = u32;
67}
68#[doc = "`read()` method returns [pr_lfsr_ctl2::R](R) reader structure"]
69impl crate::Readable for PR_LFSR_CTL2_SPEC {
70 type Reader = R;
71}
72#[doc = "`write(|w| ..)` method takes [pr_lfsr_ctl2::W](W) writer structure"]
73impl crate::Writable for PR_LFSR_CTL2_SPEC {
74 type Writer = W;
75 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
76 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
77}
78#[doc = "`reset()` method sets PR_LFSR_CTL2 to value 0x060c_31b7"]
79impl crate::Resettable for PR_LFSR_CTL2_SPEC {
80 const RESET_VALUE: Self::Ux = 0x060c_31b7;
81}