cyt3bb_a/m0/cpuss/
cm0_status.rs

1#[doc = "Register `CM0_STATUS` reader"]
2pub struct R(crate::R<CM0_STATUS_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CM0_STATUS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CM0_STATUS_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CM0_STATUS_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `SLEEPING` reader - Specifies if the CPU is in Active, Sleep or DeepSleep power mode: - Active power mode: SLEEPING is '0'. - Sleep power mode: SLEEPING is '1' and SLEEPDEEP is '0'. - DeepSleep power mode: SLEEPING is '1' and SLEEPDEEP is '1'."]
17pub type SLEEPING_R = crate::BitReader<bool>;
18#[doc = "Field `SLEEPDEEP` reader - Specifies if the CPU is in Sleep or DeepSleep power mode. See SLEEPING field."]
19pub type SLEEPDEEP_R = crate::BitReader<bool>;
20impl R {
21    #[doc = "Bit 0 - Specifies if the CPU is in Active, Sleep or DeepSleep power mode: - Active power mode: SLEEPING is '0'. - Sleep power mode: SLEEPING is '1' and SLEEPDEEP is '0'. - DeepSleep power mode: SLEEPING is '1' and SLEEPDEEP is '1'."]
22    #[inline(always)]
23    pub fn sleeping(&self) -> SLEEPING_R {
24        SLEEPING_R::new((self.bits & 1) != 0)
25    }
26    #[doc = "Bit 1 - Specifies if the CPU is in Sleep or DeepSleep power mode. See SLEEPING field."]
27    #[inline(always)]
28    pub fn sleepdeep(&self) -> SLEEPDEEP_R {
29        SLEEPDEEP_R::new(((self.bits >> 1) & 1) != 0)
30    }
31}
32#[doc = "CM0+ status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cm0_status](index.html) module"]
33pub struct CM0_STATUS_SPEC;
34impl crate::RegisterSpec for CM0_STATUS_SPEC {
35    type Ux = u32;
36}
37#[doc = "`read()` method returns [cm0_status::R](R) reader structure"]
38impl crate::Readable for CM0_STATUS_SPEC {
39    type Reader = R;
40}
41#[doc = "`reset()` method sets CM0_STATUS to value 0"]
42impl crate::Resettable for CM0_STATUS_SPEC {
43    const RESET_VALUE: Self::Ux = 0;
44}
cyt3bb_a/m0/cpuss/cm0_status.rs

cyt3bb_a/m0/cpuss/
cm0_status.rs
