1#[doc = r"Register block"]
2#[repr(C)]
3pub struct RegisterBlock {
4 #[doc = "0x00..0x1bc - FIFO wrapper around M_TTCAN 3PIP, to enable DMA"]
5 pub ch0: CH,
6 _reserved1: [u8; 0x44],
7 #[doc = "0x200..0x3bc - FIFO wrapper around M_TTCAN 3PIP, to enable DMA"]
8 pub ch1: CH,
9 _reserved2: [u8; 0x44],
10 #[doc = "0x400..0x5bc - FIFO wrapper around M_TTCAN 3PIP, to enable DMA"]
11 pub ch2: CH,
12 _reserved3: [u8; 0x44],
13 #[doc = "0x600..0x7bc - FIFO wrapper around M_TTCAN 3PIP, to enable DMA"]
14 pub ch3: CH,
15 _reserved4: [u8; 0x0844],
16 #[doc = "0x1000 - Global CAN control register"]
17 pub ctl: CTL,
18 #[doc = "0x1004 - Global CAN status register"]
19 pub status: STATUS,
20 _reserved6: [u8; 0x08],
21 #[doc = "0x1010 - Consolidated interrupt0 cause register"]
22 pub intr0_cause: INTR0_CAUSE,
23 #[doc = "0x1014 - Consolidated interrupt1 cause register"]
24 pub intr1_cause: INTR1_CAUSE,
25 _reserved8: [u8; 0x08],
26 #[doc = "0x1020 - Time Stamp control register"]
27 pub ts_ctl: TS_CTL,
28 #[doc = "0x1024 - Time Stamp counter value"]
29 pub ts_cnt: TS_CNT,
30 _reserved10: [u8; 0x58],
31 #[doc = "0x1080 - ECC control"]
32 pub ecc_ctl: ECC_CTL,
33 #[doc = "0x1084 - ECC error injection"]
34 pub ecc_err_inj: ECC_ERR_INJ,
35}
36#[doc = "FIFO wrapper around M_TTCAN 3PIP, to enable DMA"]
37pub use self::ch::CH;
38#[doc = r"Cluster"]
39#[doc = "FIFO wrapper around M_TTCAN 3PIP, to enable DMA"]
40pub mod ch;
41#[doc = "CTL (rw) register accessor: an alias for `Reg<CTL_SPEC>`"]
42pub type CTL = crate::Reg<ctl::CTL_SPEC>;
43#[doc = "Global CAN control register"]
44pub mod ctl;
45#[doc = "STATUS (r) register accessor: an alias for `Reg<STATUS_SPEC>`"]
46pub type STATUS = crate::Reg<status::STATUS_SPEC>;
47#[doc = "Global CAN status register"]
48pub mod status;
49#[doc = "INTR0_CAUSE (r) register accessor: an alias for `Reg<INTR0_CAUSE_SPEC>`"]
50pub type INTR0_CAUSE = crate::Reg<intr0_cause::INTR0_CAUSE_SPEC>;
51#[doc = "Consolidated interrupt0 cause register"]
52pub mod intr0_cause;
53#[doc = "INTR1_CAUSE (r) register accessor: an alias for `Reg<INTR1_CAUSE_SPEC>`"]
54pub type INTR1_CAUSE = crate::Reg<intr1_cause::INTR1_CAUSE_SPEC>;
55#[doc = "Consolidated interrupt1 cause register"]
56pub mod intr1_cause;
57#[doc = "TS_CTL (rw) register accessor: an alias for `Reg<TS_CTL_SPEC>`"]
58pub type TS_CTL = crate::Reg<ts_ctl::TS_CTL_SPEC>;
59#[doc = "Time Stamp control register"]
60pub mod ts_ctl;
61#[doc = "TS_CNT (rw) register accessor: an alias for `Reg<TS_CNT_SPEC>`"]
62pub type TS_CNT = crate::Reg<ts_cnt::TS_CNT_SPEC>;
63#[doc = "Time Stamp counter value"]
64pub mod ts_cnt;
65#[doc = "ECC_CTL (rw) register accessor: an alias for `Reg<ECC_CTL_SPEC>`"]
66pub type ECC_CTL = crate::Reg<ecc_ctl::ECC_CTL_SPEC>;
67#[doc = "ECC control"]
68pub mod ecc_ctl;
69#[doc = "ECC_ERR_INJ (rw) register accessor: an alias for `Reg<ECC_ERR_INJ_SPEC>`"]
70pub type ECC_ERR_INJ = crate::Reg<ecc_err_inj::ECC_ERR_INJ_SPEC>;
71#[doc = "ECC error injection"]
72pub mod ecc_err_inj;