cyt2bl_a/m0/crypto/
error_status1.rs

1#[doc = "Register `ERROR_STATUS1` reader"]
2pub struct R(crate::R<ERROR_STATUS1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<ERROR_STATUS1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<ERROR_STATUS1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<ERROR_STATUS1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `ERROR_STATUS1` writer"]
17pub struct W(crate::W<ERROR_STATUS1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<ERROR_STATUS1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<ERROR_STATUS1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<ERROR_STATUS1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DATA24` reader - Specifies error description information. - For BUS_ERROR: - Violating transfer, read attribute (DATA\\[0\\]). - Violating transfer, size attribute (DATA\\[5:4\\]). '0': 8-bit transfer, '1': 16 bits transfer, '2': 32-bit transfer."]
38pub type DATA24_R = crate::FieldReader<u32, u32>;
39#[doc = "Field `IDX` reader - Error source: '0': INSTR_OPC_ERROR (instruction FIFO decoder error). '1': INSTR_CC_ERROR (instruction FIFO decoder, VU CC error). '2': BUS_ERROR (bus master interface AHB-Lite bus error). '3': TR_AP_DETECT_ERROR. '4': TR_RC_DETECT_ERROR. '5': INSTR_DEV_KEY_ERROR. '6'-'7': Undefined."]
40pub type IDX_R = crate::FieldReader<u8, u8>;
41#[doc = "Field `VALID` reader - Specifies if ERROR_STATUS0 and ERROR_STATUS1 specify valid error information. No new error information is captured as long as VALID is '1'; i.e. the error information of the first detected error is NOT overwritten."]
42pub type VALID_R = crate::BitReader<bool>;
43#[doc = "Field `VALID` writer - Specifies if ERROR_STATUS0 and ERROR_STATUS1 specify valid error information. No new error information is captured as long as VALID is '1'; i.e. the error information of the first detected error is NOT overwritten."]
44pub type VALID_W<'a, const O: u8> = crate::BitWriter<'a, u32, ERROR_STATUS1_SPEC, bool, O>;
45impl R {
46    #[doc = "Bits 0:23 - Specifies error description information. - For BUS_ERROR: - Violating transfer, read attribute (DATA\\[0\\]). - Violating transfer, size attribute (DATA\\[5:4\\]). '0': 8-bit transfer, '1': 16 bits transfer, '2': 32-bit transfer."]
47    #[inline(always)]
48    pub fn data24(&self) -> DATA24_R {
49        DATA24_R::new(self.bits & 0x00ff_ffff)
50    }
51    #[doc = "Bits 24:26 - Error source: '0': INSTR_OPC_ERROR (instruction FIFO decoder error). '1': INSTR_CC_ERROR (instruction FIFO decoder, VU CC error). '2': BUS_ERROR (bus master interface AHB-Lite bus error). '3': TR_AP_DETECT_ERROR. '4': TR_RC_DETECT_ERROR. '5': INSTR_DEV_KEY_ERROR. '6'-'7': Undefined."]
52    #[inline(always)]
53    pub fn idx(&self) -> IDX_R {
54        IDX_R::new(((self.bits >> 24) & 7) as u8)
55    }
56    #[doc = "Bit 31 - Specifies if ERROR_STATUS0 and ERROR_STATUS1 specify valid error information. No new error information is captured as long as VALID is '1'; i.e. the error information of the first detected error is NOT overwritten."]
57    #[inline(always)]
58    pub fn valid(&self) -> VALID_R {
59        VALID_R::new(((self.bits >> 31) & 1) != 0)
60    }
61}
62impl W {
63    #[doc = "Bit 31 - Specifies if ERROR_STATUS0 and ERROR_STATUS1 specify valid error information. No new error information is captured as long as VALID is '1'; i.e. the error information of the first detected error is NOT overwritten."]
64    #[inline(always)]
65    #[must_use]
66    pub fn valid(&mut self) -> VALID_W<31> {
67        VALID_W::new(self)
68    }
69    #[doc = "Writes raw bits to the register."]
70    #[inline(always)]
71    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
72        self.0.bits(bits);
73        self
74    }
75}
76#[doc = "Error status 1\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [error_status1](index.html) module"]
77pub struct ERROR_STATUS1_SPEC;
78impl crate::RegisterSpec for ERROR_STATUS1_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [error_status1::R](R) reader structure"]
82impl crate::Readable for ERROR_STATUS1_SPEC {
83    type Reader = R;
84}
85#[doc = "`write(|w| ..)` method takes [error_status1::W](W) writer structure"]
86impl crate::Writable for ERROR_STATUS1_SPEC {
87    type Writer = W;
88    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
89    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
90}
91#[doc = "`reset()` method sets ERROR_STATUS1 to value 0"]
92impl crate::Resettable for ERROR_STATUS1_SPEC {
93    const RESET_VALUE: Self::Ux = 0;
94}
cyt2bl_a/m0/crypto/error_status1.rs

cyt2bl_a/m0/crypto/
error_status1.rs
