cyclone_msm/
lib.rs

1//! Host-side application to use the FPGA-side application.
2//!
3//! Cyclone MSM currently only supports the G1 curve of BLS12-377.
4//! MSM instances of size up to 27 are supported.
5//!
6//! Steps:
7//! - preprocess points, stream to FPGA
8//! - precompute scalars, stream to FPGA column-wise
9//! - gather and aggregate column sums
10//!
11//! The idea is that in practical use, the points are fixed, whereas the scalars vary per instance.
12//! Therefore, the lengthy preprocessing of points is amortized, whereas the precomputation needs
13//! to be done efficiently for each instance.
14
15pub mod app;
16pub use app::Fpga;
17
18pub mod bls12_377;
19
20pub mod io;
21
22pub mod precompute;
23
24pub mod preprocess;
25
26pub mod testing;
27
28pub mod timing;
29
30use ark_bls12_377::{Fr, G1Projective};
31
32/// Host-side Cyclone MSM application.
33pub struct App {
34    pub fpga: Fpga,
35    len: usize,
36    pool: Option<rayon::ThreadPool>,
37    carried: Option<Vec<Scalar>>,
38}
39
40#[repr(u64)]
41/// Commands for MSM column processing.
42pub enum Command {
43    StartColumn = 1,
44    SetDigit = 3,
45}
46
47/// Packet of 8 commands, streamed to FPGA during MSM column processing.
48pub type Packet = fpga::Aligned<[u64; 8]>;
49
50/// Signed 16-bit digit.
51pub type Digit = i16;
52/// Unsigned 64-bit limb of a scalar
53pub type Limb = u64;
54/// 256-bit scalar composed of four limbs, least-significant limb first
55pub type Scalar = [Limb; 4];
56
57/// FPGA constructor, independent of "hw" feature.
58#[cfg(feature = "hw")]
59pub fn fpga() -> fpga::Result<Fpga> {
60    Fpga::new(0, 0x500, 0, 0x1_0000_0000)
61}
62#[cfg(not(feature = "hw"))]
63pub fn fpga() -> fpga::Result<Fpga> {
64    Ok(Fpga::new())
65}
cyclone_msm/lib.rs

cyclone_msm/
lib.rs
