cw32f030_hal/svd/
generic.rs

1use core::marker;
2#[doc = " Raw register type (`u8`, `u16`, `u32`, ...)"]
3pub trait RawReg:
4    Copy
5    + Default
6    + From<bool>
7    + core::ops::BitOr<Output = Self>
8    + core::ops::BitAnd<Output = Self>
9    + core::ops::BitOrAssign
10    + core::ops::BitAndAssign
11    + core::ops::Not<Output = Self>
12    + core::ops::Shl<u8, Output = Self>
13{
14    #[doc = " Mask for bits of width `WI`"]
15    fn mask<const WI: u8>() -> Self;
16    #[doc = " Mask for bits of width 1"]
17    fn one() -> Self;
18}
19macro_rules! raw_reg {
20    ($ U : ty , $ size : literal , $ mask : ident) => {
21        impl RawReg for $U {
22            #[inline(always)]
23            fn mask<const WI: u8>() -> Self {
24                $mask::<WI>()
25            }
26            #[inline(always)]
27            fn one() -> Self {
28                1
29            }
30        }
31        const fn $mask<const WI: u8>() -> $U {
32            <$U>::MAX >> ($size - WI)
33        }
34        impl FieldSpec for $U {
35            type Ux = $U;
36        }
37    };
38}
39raw_reg!(u8, 8, mask_u8);
40raw_reg!(u16, 16, mask_u16);
41raw_reg!(u32, 32, mask_u32);
42raw_reg!(u64, 64, mask_u64);
43#[doc = " Raw register type"]
44pub trait RegisterSpec {
45    #[doc = " Raw register type (`u8`, `u16`, `u32`, ...)."]
46    type Ux: RawReg;
47}
48#[doc = " Raw field type"]
49pub trait FieldSpec: Sized {
50    #[doc = " Raw field type (`u8`, `u16`, `u32`, ...)."]
51    type Ux: Copy + PartialEq + From<Self>;
52}
53#[doc = " Trait implemented by readable registers to enable the `read` method."]
54#[doc = ""]
55#[doc = " Registers marked with `Writable` can be also be `modify`'ed."]
56pub trait Readable: RegisterSpec {}
57#[doc = " Trait implemented by writeable registers."]
58#[doc = ""]
59#[doc = " This enables the  `write`, `write_with_zero` and `reset` methods."]
60#[doc = ""]
61#[doc = " Registers marked with `Readable` can be also be `modify`'ed."]
62pub trait Writable: RegisterSpec {
63    #[doc = " Specifies the register bits that are not changed if you pass `1` and are changed if you pass `0`"]
64    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux;
65    #[doc = " Specifies the register bits that are not changed if you pass `0` and are changed if you pass `1`"]
66    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux;
67}
68#[doc = " Reset value of the register."]
69#[doc = ""]
70#[doc = " This value is the initial value for the `write` method. It can also be directly written to the"]
71#[doc = " register by using the `reset` method."]
72pub trait Resettable: RegisterSpec {
73    #[doc = " Reset value of the register."]
74    const RESET_VALUE: Self::Ux;
75    #[doc = " Reset value of the register."]
76    #[inline(always)]
77    fn reset_value() -> Self::Ux {
78        Self::RESET_VALUE
79    }
80}
81#[doc = " This structure provides volatile access to registers."]
82#[repr(transparent)]
83pub struct Reg<REG: RegisterSpec> {
84    register: vcell::VolatileCell<REG::Ux>,
85    _marker: marker::PhantomData<REG>,
86}
87unsafe impl<REG: RegisterSpec> Send for Reg<REG> where REG::Ux: Send {}
88impl<REG: RegisterSpec> Reg<REG> {
89    #[doc = " Returns the underlying memory address of register."]
90    #[doc = ""]
91    #[doc = " ```ignore"]
92    #[doc = " let reg_ptr = periph.reg.as_ptr();"]
93    #[doc = " ```"]
94    #[inline(always)]
95    pub fn as_ptr(&self) -> *mut REG::Ux {
96        self.register.as_ptr()
97    }
98}
99impl<REG: Readable> Reg<REG> {
100    #[doc = " Reads the contents of a `Readable` register."]
101    #[doc = ""]
102    #[doc = " You can read the raw contents of a register by using `bits`:"]
103    #[doc = " ```ignore"]
104    #[doc = " let bits = periph.reg.read().bits();"]
105    #[doc = " ```"]
106    #[doc = " or get the content of a particular field of a register:"]
107    #[doc = " ```ignore"]
108    #[doc = " let reader = periph.reg.read();"]
109    #[doc = " let bits = reader.field1().bits();"]
110    #[doc = " let flag = reader.field2().bit_is_set();"]
111    #[doc = " ```"]
112    #[inline(always)]
113    pub fn read(&self) -> R<REG> {
114        R {
115            bits: self.register.get(),
116            _reg: marker::PhantomData,
117        }
118    }
119}
120impl<REG: Resettable + Writable> Reg<REG> {
121    #[doc = " Writes the reset value to `Writable` register."]
122    #[doc = ""]
123    #[doc = " Resets the register to its initial state."]
124    #[inline(always)]
125    pub fn reset(&self) {
126        self.register.set(REG::RESET_VALUE)
127    }
128    #[doc = " Writes bits to a `Writable` register."]
129    #[doc = ""]
130    #[doc = " You can write raw bits into a register:"]
131    #[doc = " ```ignore"]
132    #[doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"]
133    #[doc = " ```"]
134    #[doc = " or write only the fields you need:"]
135    #[doc = " ```ignore"]
136    #[doc = " periph.reg.write(|w| w"]
137    #[doc = "     .field1().bits(newfield1bits)"]
138    #[doc = "     .field2().set_bit()"]
139    #[doc = "     .field3().variant(VARIANT)"]
140    #[doc = " );"]
141    #[doc = " ```"]
142    #[doc = " or an alternative way of saying the same:"]
143    #[doc = " ```ignore"]
144    #[doc = " periph.reg.write(|w| {"]
145    #[doc = "     w.field1().bits(newfield1bits);"]
146    #[doc = "     w.field2().set_bit();"]
147    #[doc = "     w.field3().variant(VARIANT)"]
148    #[doc = " });"]
149    #[doc = " ```"]
150    #[doc = " In the latter case, other fields will be set to their reset value."]
151    #[inline(always)]
152    pub fn write<F>(&self, f: F)
153    where
154        F: FnOnce(&mut W<REG>) -> &mut W<REG>,
155    {
156        self.register.set(
157            f(&mut W {
158                bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP
159                    | REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
160                _reg: marker::PhantomData,
161            })
162            .bits,
163        );
164    }
165}
166impl<REG: Writable> Reg<REG> {
167    #[doc = " Writes 0 to a `Writable` register."]
168    #[doc = ""]
169    #[doc = " Similar to `write`, but unused bits will contain 0."]
170    #[doc = ""]
171    #[doc = " # Safety"]
172    #[doc = ""]
173    #[doc = " Unsafe to use with registers which don't allow to write 0."]
174    #[inline(always)]
175    pub unsafe fn write_with_zero<F>(&self, f: F)
176    where
177        F: FnOnce(&mut W<REG>) -> &mut W<REG>,
178    {
179        self.register.set(
180            f(&mut W {
181                bits: REG::Ux::default(),
182                _reg: marker::PhantomData,
183            })
184            .bits,
185        );
186    }
187}
188impl<REG: Readable + Writable> Reg<REG> {
189    #[doc = " Modifies the contents of the register by reading and then writing it."]
190    #[doc = ""]
191    #[doc = " E.g. to do a read-modify-write sequence to change parts of a register:"]
192    #[doc = " ```ignore"]
193    #[doc = " periph.reg.modify(|r, w| unsafe { w.bits("]
194    #[doc = "    r.bits() | 3"]
195    #[doc = " ) });"]
196    #[doc = " ```"]
197    #[doc = " or"]
198    #[doc = " ```ignore"]
199    #[doc = " periph.reg.modify(|_, w| w"]
200    #[doc = "     .field1().bits(newfield1bits)"]
201    #[doc = "     .field2().set_bit()"]
202    #[doc = "     .field3().variant(VARIANT)"]
203    #[doc = " );"]
204    #[doc = " ```"]
205    #[doc = " or an alternative way of saying the same:"]
206    #[doc = " ```ignore"]
207    #[doc = " periph.reg.modify(|_, w| {"]
208    #[doc = "     w.field1().bits(newfield1bits);"]
209    #[doc = "     w.field2().set_bit();"]
210    #[doc = "     w.field3().variant(VARIANT)"]
211    #[doc = " });"]
212    #[doc = " ```"]
213    #[doc = " Other fields will have the value they had before the call to `modify`."]
214    #[inline(always)]
215    pub fn modify<F>(&self, f: F)
216    where
217        for<'w> F: FnOnce(&R<REG>, &'w mut W<REG>) -> &'w mut W<REG>,
218    {
219        let bits = self.register.get();
220        self.register.set(
221            f(
222                &R {
223                    bits,
224                    _reg: marker::PhantomData,
225                },
226                &mut W {
227                    bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP
228                        | REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
229                    _reg: marker::PhantomData,
230                },
231            )
232            .bits,
233        );
234    }
235}
236#[doc(hidden)]
237pub mod raw;
238#[doc = " Register reader."]
239#[doc = ""]
240#[doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"]
241#[doc = " method."]
242pub type R<REG> = raw::R<REG>;
243impl<REG: RegisterSpec> R<REG> {
244    #[doc = " Reads raw bits from register."]
245    #[inline(always)]
246    pub const fn bits(&self) -> REG::Ux {
247        self.bits
248    }
249}
250impl<REG: RegisterSpec, FI> PartialEq<FI> for R<REG>
251where
252    REG::Ux: PartialEq,
253    FI: Copy,
254    REG::Ux: From<FI>,
255{
256    #[inline(always)]
257    fn eq(&self, other: &FI) -> bool {
258        self.bits.eq(&REG::Ux::from(*other))
259    }
260}
261#[doc = " Register writer."]
262#[doc = ""]
263#[doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."]
264pub type W<REG> = raw::W<REG>;
265#[doc = " Field reader."]
266#[doc = ""]
267#[doc = " Result of the `read` methods of fields."]
268pub type FieldReader<FI = u8> = raw::FieldReader<FI>;
269#[doc = " Bit-wise field reader"]
270pub type BitReader<FI = bool> = raw::BitReader<FI>;
271impl<FI: FieldSpec> FieldReader<FI> {
272    #[doc = " Reads raw bits from field."]
273    #[inline(always)]
274    pub const fn bits(&self) -> FI::Ux {
275        self.bits
276    }
277}
278impl<FI> PartialEq<FI> for FieldReader<FI>
279where
280    FI: FieldSpec + Copy,
281{
282    #[inline(always)]
283    fn eq(&self, other: &FI) -> bool {
284        self.bits.eq(&FI::Ux::from(*other))
285    }
286}
287impl<FI> PartialEq<FI> for BitReader<FI>
288where
289    FI: Copy,
290    bool: From<FI>,
291{
292    #[inline(always)]
293    fn eq(&self, other: &FI) -> bool {
294        self.bits.eq(&bool::from(*other))
295    }
296}
297impl<FI> BitReader<FI> {
298    #[doc = " Value of the field as raw bits."]
299    #[inline(always)]
300    pub const fn bit(&self) -> bool {
301        self.bits
302    }
303    #[doc = " Returns `true` if the bit is clear (0)."]
304    #[inline(always)]
305    pub const fn bit_is_clear(&self) -> bool {
306        !self.bit()
307    }
308    #[doc = " Returns `true` if the bit is set (1)."]
309    #[inline(always)]
310    pub const fn bit_is_set(&self) -> bool {
311        self.bit()
312    }
313}
314#[doc(hidden)]
315pub struct Safe;
316#[doc(hidden)]
317pub struct Unsafe;
318#[doc = " Write field Proxy with unsafe `bits`"]
319pub type FieldWriter<'a, REG, const WI: u8, const O: u8, FI = u8> =
320    raw::FieldWriter<'a, REG, WI, O, FI, Unsafe>;
321#[doc = " Write field Proxy with safe `bits`"]
322pub type FieldWriterSafe<'a, REG, const WI: u8, const O: u8, FI = u8> =
323    raw::FieldWriter<'a, REG, WI, O, FI, Safe>;
324impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriter<'a, REG, WI, OF, FI>
325where
326    REG: Writable + RegisterSpec,
327    FI: FieldSpec,
328    REG::Ux: From<FI::Ux>,
329{
330    #[doc = " Field width"]
331    pub const WIDTH: u8 = WI;
332    #[doc = " Writes raw bits to the field"]
333    #[doc = ""]
334    #[doc = " # Safety"]
335    #[doc = ""]
336    #[doc = " Passing incorrect value can cause undefined behaviour. See reference manual"]
337    #[inline(always)]
338    pub unsafe fn bits(self, value: FI::Ux) -> &'a mut W<REG> {
339        self.w.bits &= !(REG::Ux::mask::<WI>() << OF);
340        self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::<WI>()) << OF;
341        self.w
342    }
343    #[doc = " Writes `variant` to the field"]
344    #[inline(always)]
345    pub fn variant(self, variant: FI) -> &'a mut W<REG> {
346        unsafe { self.bits(FI::Ux::from(variant)) }
347    }
348}
349impl<'a, REG, const WI: u8, const OF: u8, FI> FieldWriterSafe<'a, REG, WI, OF, FI>
350where
351    REG: Writable + RegisterSpec,
352    FI: FieldSpec,
353    REG::Ux: From<FI::Ux>,
354{
355    #[doc = " Field width"]
356    pub const WIDTH: u8 = WI;
357    #[doc = " Writes raw bits to the field"]
358    #[inline(always)]
359    pub fn bits(self, value: FI::Ux) -> &'a mut W<REG> {
360        self.w.bits &= !(REG::Ux::mask::<WI>() << OF);
361        self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::<WI>()) << OF;
362        self.w
363    }
364    #[doc = " Writes `variant` to the field"]
365    #[inline(always)]
366    pub fn variant(self, variant: FI) -> &'a mut W<REG> {
367        self.bits(FI::Ux::from(variant))
368    }
369}
370macro_rules! bit_proxy {
371    ($ writer : ident , $ mwv : ident) => {
372        #[doc(hidden)]
373        pub struct $mwv;
374        #[doc = " Bit-wise write field proxy"]
375        pub type $writer<'a, REG, const O: u8, FI = bool> = raw::BitWriter<'a, REG, O, FI, $mwv>;
376        impl<'a, REG, const OF: u8, FI> $writer<'a, REG, OF, FI>
377        where
378            REG: Writable + RegisterSpec,
379            bool: From<FI>,
380        {
381            #[doc = " Field width"]
382            pub const WIDTH: u8 = 1;
383            #[doc = " Writes bit to the field"]
384            #[inline(always)]
385            pub fn bit(self, value: bool) -> &'a mut W<REG> {
386                self.w.bits &= !(REG::Ux::one() << OF);
387                self.w.bits |= (REG::Ux::from(value) & REG::Ux::one()) << OF;
388                self.w
389            }
390            #[doc = " Writes `variant` to the field"]
391            #[inline(always)]
392            pub fn variant(self, variant: FI) -> &'a mut W<REG> {
393                self.bit(bool::from(variant))
394            }
395        }
396    };
397}
398bit_proxy!(BitWriter, BitM);
399bit_proxy!(BitWriter1S, Bit1S);
400bit_proxy!(BitWriter0C, Bit0C);
401bit_proxy!(BitWriter1C, Bit1C);
402bit_proxy!(BitWriter0S, Bit0S);
403bit_proxy!(BitWriter1T, Bit1T);
404bit_proxy!(BitWriter0T, Bit0T);
405impl<'a, REG, const OF: u8, FI> BitWriter<'a, REG, OF, FI>
406where
407    REG: Writable + RegisterSpec,
408    bool: From<FI>,
409{
410    #[doc = " Sets the field bit"]
411    #[inline(always)]
412    pub fn set_bit(self) -> &'a mut W<REG> {
413        self.w.bits |= REG::Ux::one() << OF;
414        self.w
415    }
416    #[doc = " Clears the field bit"]
417    #[inline(always)]
418    pub fn clear_bit(self) -> &'a mut W<REG> {
419        self.w.bits &= !(REG::Ux::one() << OF);
420        self.w
421    }
422}
423impl<'a, REG, const OF: u8, FI> BitWriter1S<'a, REG, OF, FI>
424where
425    REG: Writable + RegisterSpec,
426    bool: From<FI>,
427{
428    #[doc = " Sets the field bit"]
429    #[inline(always)]
430    pub fn set_bit(self) -> &'a mut W<REG> {
431        self.w.bits |= REG::Ux::one() << OF;
432        self.w
433    }
434}
435impl<'a, REG, const OF: u8, FI> BitWriter0C<'a, REG, OF, FI>
436where
437    REG: Writable + RegisterSpec,
438    bool: From<FI>,
439{
440    #[doc = " Clears the field bit"]
441    #[inline(always)]
442    pub fn clear_bit(self) -> &'a mut W<REG> {
443        self.w.bits &= !(REG::Ux::one() << OF);
444        self.w
445    }
446}
447impl<'a, REG, const OF: u8, FI> BitWriter1C<'a, REG, OF, FI>
448where
449    REG: Writable + RegisterSpec,
450    bool: From<FI>,
451{
452    #[doc = "Clears the field bit by passing one"]
453    #[inline(always)]
454    pub fn clear_bit_by_one(self) -> &'a mut W<REG> {
455        self.w.bits |= REG::Ux::one() << OF;
456        self.w
457    }
458}
459impl<'a, REG, const OF: u8, FI> BitWriter0S<'a, REG, OF, FI>
460where
461    REG: Writable + RegisterSpec,
462    bool: From<FI>,
463{
464    #[doc = "Sets the field bit by passing zero"]
465    #[inline(always)]
466    pub fn set_bit_by_zero(self) -> &'a mut W<REG> {
467        self.w.bits &= !(REG::Ux::one() << OF);
468        self.w
469    }
470}
471impl<'a, REG, const OF: u8, FI> BitWriter1T<'a, REG, OF, FI>
472where
473    REG: Writable + RegisterSpec,
474    bool: From<FI>,
475{
476    #[doc = "Toggle the field bit by passing one"]
477    #[inline(always)]
478    pub fn toggle_bit(self) -> &'a mut W<REG> {
479        self.w.bits |= REG::Ux::one() << OF;
480        self.w
481    }
482}
483impl<'a, REG, const OF: u8, FI> BitWriter0T<'a, REG, OF, FI>
484where
485    REG: Writable + RegisterSpec,
486    bool: From<FI>,
487{
488    #[doc = "Toggle the field bit by passing zero"]
489    #[inline(always)]
490    pub fn toggle_bit(self) -> &'a mut W<REG> {
491        self.w.bits &= !(REG::Ux::one() << OF);
492        self.w
493    }
494}