Struct cudarc::cublas::safe::CudaBlas

pub struct CudaBlas { /* private fields */ }

Wrapper around sys::cublasHandle_t

1. Create with CudaBlas::new()
2. Execute gemm/gemv kernels with Gemv and Gemm. Both f32 and f64 are supported for both

Note: This maintains a instance of Arc<CudaDevice>, so will prevent the device from being dropped.

Implementations

impl CudaBlas

pub fn new(device: Arc<CudaDevice>) -> Result<Self, CublasError>

Creates a new cublas handle and sets the stream to the device’s stream.

pub unsafe fn set_stream( &self, opt_stream: Option<&CudaStream> ) -> Result<(), CublasError>

Sets the handle’s current to either the stream specified, or the device’s default work stream.

Safety

This is unsafe because you can end up scheduling multiple concurrent kernels that all write to the same memory address.

Trait Implementations

impl Debug for CudaBlas

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Drop for CudaBlas

fn drop(&mut self)

Executes the destructor for this type.

impl Gemm<f16> for CudaBlas

unsafe fn gemm<A: DevicePtr<f16>, B: DevicePtr<f16>, C: DevicePtrMut<f16>>( &self, cfg: GemmConfig<f16>, a: &A, b: &B, c: &mut C ) -> Result<(), CublasError>

Matrix matrix multiplication. See nvidia docs

unsafe fn gemm_strided_batched<A: DevicePtr<f16>, B: DevicePtr<f16>, C: DevicePtrMut<f16>>( &self, cfg: StridedBatchedConfig<f16>, a: &A, b: &B, c: &mut C ) -> Result<(), CublasError>

Batched matrix multiplication with stride support on batch dimension. See nvidia docs

impl Gemm<f32> for CudaBlas

unsafe fn gemm<A: DevicePtr<f32>, B: DevicePtr<f32>, C: DevicePtrMut<f32>>( &self, cfg: GemmConfig<f32>, a: &A, b: &B, c: &mut C ) -> Result<(), CublasError>

Matrix matrix multiplication. See nvidia docs

unsafe fn gemm_strided_batched<A: DevicePtr<f32>, B: DevicePtr<f32>, C: DevicePtrMut<f32>>( &self, cfg: StridedBatchedConfig<f32>, a: &A, b: &B, c: &mut C ) -> Result<(), CublasError>

Batched matrix multiplication with stride support on batch dimension. See nvidia docs

impl Gemm<f64> for CudaBlas

unsafe fn gemm<A: DevicePtr<f64>, B: DevicePtr<f64>, C: DevicePtrMut<f64>>( &self, cfg: GemmConfig<f64>, a: &A, b: &B, c: &mut C ) -> Result<(), CublasError>

Matrix matrix multiplication. See nvidia docs

unsafe fn gemm_strided_batched<A: DevicePtr<f64>, B: DevicePtr<f64>, C: DevicePtrMut<f64>>( &self, cfg: StridedBatchedConfig<f64>, a: &A, b: &B, c: &mut C ) -> Result<(), CublasError>

Batched matrix multiplication with stride support on batch dimension. See nvidia docs

impl Gemv<f32> for CudaBlas

unsafe fn gemv<A: DevicePtr<f32>, X: DevicePtr<f32>, Y: DevicePtrMut<f32>>( &self, cfg: GemvConfig<f32>, a: &A, x: &X, y: &mut Y ) -> Result<(), CublasError>

Matrix vector multiplication.

impl Gemv<f64> for CudaBlas

unsafe fn gemv<A: DevicePtr<f64>, X: DevicePtr<f64>, Y: DevicePtrMut<f64>>( &self, cfg: GemvConfig<f64>, a: &A, x: &X, y: &mut Y ) -> Result<(), CublasError>

Matrix vector multiplication.

impl Send for CudaBlas

impl Sync for CudaBlas