Crate cubek_std

Modules§

as_cmma_layout
autotune: How a family races its candidates: the priority band that orders a round, and the autotune a family builds its candidates into (Autotune), measured against the problem’s roofline (Roofline).
config: Process-wide defaults for CubeK kernels.
cube_count
devices: Devices a dev machine cannot show you, as functions a routine’s geometry is unit-tested against, and the few changes a test makes to one.
from_cmma_layout
launch: Shared utilities for launching kernels.
layout
legacy: What the routines written before Routine share: a blueprint forced or inferred from a strategy.
matmul_axes: The axis labels of a matmul’s space, defined once.
microkernel: What kernels are built from.
plan: How a call runs, as a tree of plans: a routine, a step and then a plan, a list of plans tried in order, or an autotune table. Each is a Plan, so each nests in the others.
routine: A kernel written around one microkernel: the Routine trait, the Grid it launches on, and the LaunchSettings that grid is checked as.
selector: The shape of a selector’s sizing loop: grow over an ascending list of candidates and keep the one that fits.

InputBinding
MatmulDim: Matrix dimension specifier for matmul operations.
MatrixLayout: Layout of a 2D structure such as a tensor, shared memory or slice, used within any matmul kernel level
MatrixLayoutExpand
StageIdent

CPU_CACHE_LINE_BYTES: A CPU’s transaction is its cache line: 64 bytes on every x86 and Apple core a CPU runtime runs on.
GPU_TRANSACTION_BYTES: Bytes one coalesced memory transaction moves on the GPUs cubek has met: 128 on CUDA, HIP, Metal and Vulkan hardware alike, at wave32 and wave64. A property of the memory system, not of the plane width that fetches through it.
NVFP4_BLOCK: Values of k one NVFP4 block scale covers.
TMA_ALIGNMENT_BYTES: Bytes a descriptor’s start address and strides are whole multiples of, and the least a box’s inner row moves.
TMA_ROW_BYTES: Bytes of a box’s inner row the TMA engine copies at full speed: shorter rows land as many more, smaller requests. A measurement rather than a derivation, the engine’s speed being the device’s: on the RTX PRO 6000 a stage landed in 32-byte rows copies about 40% slower than the same stage in 64-byte rows (the NVFP4 product with no contraction, Qwen3-4B’s down projection at 2048 rows, 126 against 89 µs). The step rule cuts a stage the engine fills to it (MatmulStep::filled_by_tma in cubek-matmul).
UNIT_REGISTERS: 32-bit registers one unit addresses before a kernel spills to memory: NVIDIA’s 255. The NVFP4 settings read it, which a device offers only with NVIDIA’s block-scaled instruction, and a unit’s register block unrolls no more cells than it.

Instructions: The ranking of a device’s fragment contractions: an iterator over one of cubecl’s MatmulFeatures sets (cmma, mma), narrowed and ordered the way a routine picks from it.

as_cmma_layout: Maps the matmul MatrixLayout to cmma’s MatrixLayout, for use in Cmma API.
block_scaled_nvfp4: Whether hw contracts NVFP4 as it is stored: a block-scaled instruction over e2m1 operands among its manual_mma shapes.
from_cmma_layout: Maps the cmma’s MatrixLayout to matmul MatrixLayout.
manual_mma: The fragment contractions cubek’s own transport over the matrix intrinsics (mma) runs on hw: the runtime’s mma set, and its block-scaled instructions over NVFP4, e2m1 operands under an e4m3 scale every NVFP4_BLOCK values of k, which the transport runs on the stored words as they lie.