[−][src]Trait z80emu::z80::Flavour

pub trait Flavour: Clone + Copy + Default + PartialEq + Eq {
    const CONSTANT_OUT_DATA: u8;
    const ACCEPTING_INT_RESETS_IFF2_EARLY: bool;

    fn tag() -> &'static str;
    fn memptr_mix(msb: u8, lsb: u8) -> (u8, u8);
    fn begin_instruction(&mut self);
    fn flags_modified(&mut self);
    fn get_q(&self, acc: u8, flags: CpuFlags) -> u8;
    fn cpu_into_any(cpu: Z80<Self>) -> Z80Any;
    fn unwrap_cpu_any(cpu_any: Z80Any) -> Z80<Self>;

    fn reset(&mut self) { ... }
}

A trait for implementing exceptions to the undocumented Z80 behaviour.

It's been reported that depending on the CPU technology (NMOS, CMOS) and the manufacturer (Zilog, NEC, other clones) there are certain differences of undocumented behaviour and mainly affects the way the Flags' undocumented bits 3 and 5 are being modified.

Associated Constants

`const CONSTANT_OUT_DATA: u8`

The value being actually put on the data bus while executing the undocumented instruction OUT (C),(HL).

`const ACCEPTING_INT_RESETS_IFF2_EARLY: bool`

Should be true if the IFF2 is being reset early when accepting an interrupt, while an instruction is being executed, so LD A,I or LD A,R may report modified IFF2 value.

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Required methods

`fn tag() -> &'static str`

Returns the string identifier of this flavour.

`fn memptr_mix(msb: u8, lsb: u8) -> (u8, u8)`

The way MEMPTR is being updated for: LD (nnnn),A, LD (BC),A, LD (DE),A and OUT (nn),A is being controlled by this function. The current Accumulator value is being passed as msb and the lower 8-bits of the current destination address is being provided as lsb. The function should return the (MSB, LSB) value to set the MEMPTR with.

`fn begin_instruction(&mut self)`

This method is being called each time before an instructions is being executed or an interrupt is being accepted, including NMI. It might modify some state and is being used together with Flavour::flags_modified and Flavour::get_q to prepare a value applied to bits 3 and 5 of the Flags for the SCF/CCF instructions.