[dependencies.bit_field]
version = "0.10"
[dependencies.bitflags]
version = "1.3"
[package]
categories = ["embedded", "hardware-support", "no-std"]
description = "Low level access to T-Head XuanTie RISC-V processors"
documentation = "https://docs.rs/xuantie"
edition = "2021"
keywords = ["riscv", "register", "peripheral"]
license = "MulanPSL-2.0"
name = "xuantie"
readme = "README.md"
repository = "https://github.com/luojia65/xuantie"
resolver = "2"
version = "0.0.5"
[package.metadata.docs.rs]
default-target = "riscv64imac-unknown-none-elf"
targets = ["riscv32i-unknown-none-elf", "riscv32imc-unknown-none-elf", "riscv32imac-unknown-none-elf", "riscv64imac-unknown-none-elf", "riscv64gc-unknown-none-elf"]