Type Alias xmc4800::usic0_ch0::brg::CLKSEL_W

pub type CLKSEL_W<'a, REG> = FieldWriter<'a, REG, 2, CLKSEL_A>;

Field CLKSEL writer - Clock Selection

Aliased Type

struct CLKSEL_W<'a, REG> { /* private fields */ }

Implementations

impl<'a, REG> CLKSEL_W<'a, REG>

where REG: Writable + RegisterSpec, REG::Ux: From<u8>,

pub fn value1(self) -> &'a mut W<REG>

The fractional divider frequency fFD is selected.

pub fn value3(self) -> &'a mut W<REG>

The trigger signal DX1T defines fPIN. Signal MCLK toggles with fPIN.

pub fn value4(self) -> &'a mut W<REG>

Signal MCLK corresponds to the DX1S signal and the frequency fPIN is derived from the rising edges of DX1S.