[−][src]Enum xmc4800::usic0_ch0::dx1cr::DCEN_A
Delay Compensation Enable
Value on reset: 0
Variants
0: The receive shift clock is dependent on INSW selection.
1: The receive shift clock is connected to the selected data input line. This setting is used if delay compensation is required in SSC and IIS protocols, else DCEN should always be 0.
Trait Implementations
impl From<DCEN_A> for bool
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impl PartialEq<DCEN_A> for DCEN_A
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impl Debug for DCEN_A
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impl Copy for DCEN_A
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impl Clone for DCEN_A
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fn clone(&self) -> DCEN_A
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fn clone_from(&mut self, source: &Self)
1.0.0[src]
Auto Trait Implementations
Blanket Implementations
impl<T> From<T> for T
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impl<T, U> TryFrom<U> for T where
U: Into<T>,
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U: Into<T>,
type Error = Infallible
The type returned in the event of a conversion error.
fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>
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impl<T, U> Into<U> for T where
U: From<T>,
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U: From<T>,
impl<T, U> TryInto<U> for T where
U: TryFrom<T>,
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U: TryFrom<T>,
type Error = <U as TryFrom<T>>::Error
The type returned in the event of a conversion error.
fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>
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impl<T> Borrow<T> for T where
T: ?Sized,
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T: ?Sized,
impl<T> BorrowMut<T> for T where
T: ?Sized,
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T: ?Sized,
fn borrow_mut(&mut self) -> &mut T
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impl<T> Any for T where
T: 'static + ?Sized,
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T: 'static + ?Sized,
impl<T> Same<T> for T
type Output = T
Should always be Self