Module xmc4800::usic0_ch0::brg

Baud Rate Generator Register

Structs

CLKSEL_W	Write proxy for field CLKSEL
CTQSEL_W	Write proxy for field CTQSEL
DCTQ_W	Write proxy for field DCTQ
MCLKCFG_W	Write proxy for field MCLKCFG
PCTQ_W	Write proxy for field PCTQ
PDIV_W	Write proxy for field PDIV
PPPEN_W	Write proxy for field PPPEN
SCLKCFG_W	Write proxy for field SCLKCFG
SCLKOSEL_W	Write proxy for field SCLKOSEL
TMEN_W	Write proxy for field TMEN

Enums

CLKSEL_A	Clock Selection
CTQSEL_A	Input Selection for CTQ
MCLKCFG_A	Master Clock Configuration
PPPEN_A	Enable 2:1 Divider for fPPP
SCLKCFG_A	Shift Clock Output Configuration
SCLKOSEL_A	Shift Clock Output Select
TMEN_A	Timing Measurement Enable

Type Definitions

CLKSEL_R	Reader of field CLKSEL
CTQSEL_R	Reader of field CTQSEL
DCTQ_R	Reader of field DCTQ
MCLKCFG_R	Reader of field MCLKCFG
PCTQ_R	Reader of field PCTQ
PDIV_R	Reader of field PDIV
PPPEN_R	Reader of field PPPEN
R	Reader of register BRG
SCLKCFG_R	Reader of field SCLKCFG
SCLKOSEL_R	Reader of field SCLKOSEL
TMEN_R	Reader of field TMEN
W	Writer for register BRG