[−][src]Type Definition xmc4800::ebu::busrcon0::R
type R = R<u32, BUSRCON0>;
Reader of register BUSRCON0
Methods
impl R
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pub fn fetblen(&self) -> FETBLEN_R
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Bits 0:2 - Burst Length for Synchronous Burst
pub fn fbbmsel(&self) -> FBBMSEL_R
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Bit 3 - Synchronous burst buffer mode select
pub fn bfsss(&self) -> BFSSS_R
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Bit 4 - Read Single Stage Synchronization:
pub fn fdbken(&self) -> FDBKEN_R
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Bit 5 - Burst FLASH Clock Feedback Enable
pub fn bfcmsel(&self) -> BFCMSEL_R
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Bit 6 - Burst Flash Clock Mode Select
pub fn naa(&self) -> NAA_R
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Bit 7 - Enable flash non-array access workaround
pub fn ecse(&self) -> ECSE_R
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Bit 16 - Early Chip Select for Synchronous Burst
pub fn ebse(&self) -> EBSE_R
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Bit 17 - Early Burst Signal Enable for Synchronous Burst
pub fn dba(&self) -> DBA_R
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Bit 18 - Disable Burst Address Wrapping
pub fn waitinv(&self) -> WAITINV_R
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Bit 19 - Reversed polarity at WAIT
pub fn bcgen(&self) -> BCGEN_R
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Bits 20:21 - Byte Control Signal Control
pub fn portw(&self) -> PORTW_R
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Bits 22:23 - Device Addressing Mode
pub fn wait(&self) -> WAIT_R
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Bits 24:25 - External Wait Control: 0=OFF (default after reset)., 1=Asynchronous input at WAIT., 2=Synchronous input at WAIT., 3=reserved., 0=OFF (default after reset)., 1=Wait for page load (Early WAIT)., 2=Wait for page load (WAIT with data)., 3=Abort and retry access.,
pub fn aap(&self) -> AAP_R
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Bit 26 - Asynchronous Address phase:
pub fn agen(&self) -> AGEN_R
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Bits 28:31 - Device Type for Region