Type Alias xmc4400::scu_hibernate::hdcr::W
source · pub type W = W<HDCR_SPEC>;
Expand description
Register HDCR
writer
Aliased Type§
struct W { /* private fields */ }
Implementations§
source§impl W
impl W
sourcepub fn wkpep(&mut self) -> WKPEP_W<'_, HDCR_SPEC>
pub fn wkpep(&mut self) -> WKPEP_W<'_, HDCR_SPEC>
Bit 0 - Wake-Up on Pin Event Positive Edge Enable
sourcepub fn wkpen(&mut self) -> WKPEN_W<'_, HDCR_SPEC>
pub fn wkpen(&mut self) -> WKPEN_W<'_, HDCR_SPEC>
Bit 1 - Wake-up on Pin Event Negative Edge Enable
sourcepub fn ulpwdgen(&mut self) -> ULPWDGEN_W<'_, HDCR_SPEC>
pub fn ulpwdgen(&mut self) -> ULPWDGEN_W<'_, HDCR_SPEC>
Bit 3 - ULP WDG Alarm Enable
sourcepub fn xtalgpi1sel(&mut self) -> XTALGPI1SEL_W<'_, HDCR_SPEC>
pub fn xtalgpi1sel(&mut self) -> XTALGPI1SEL_W<'_, HDCR_SPEC>
Bit 5 - Multiplex Control for RTC_XTAL_1 Select as GPI Input
sourcepub fn stdbysel(&mut self) -> STDBYSEL_W<'_, HDCR_SPEC>
pub fn stdbysel(&mut self) -> STDBYSEL_W<'_, HDCR_SPEC>
Bit 7 - fSTDBY Clock Selection
sourcepub fn wkupsel(&mut self) -> WKUPSEL_W<'_, HDCR_SPEC>
pub fn wkupsel(&mut self) -> WKUPSEL_W<'_, HDCR_SPEC>
Bit 8 - Wake-Up from Hibernate Trigger Input Selection
sourcepub fn gpi0sel(&mut self) -> GPI0SEL_W<'_, HDCR_SPEC>
pub fn gpi0sel(&mut self) -> GPI0SEL_W<'_, HDCR_SPEC>
Bit 10 - General Purpose Input 0 Selection
sourcepub fn gpi1sel(&mut self) -> GPI1SEL_W<'_, HDCR_SPEC>
pub fn gpi1sel(&mut self) -> GPI1SEL_W<'_, HDCR_SPEC>
Bit 11 - General Purpose Input 1 Selection
sourcepub fn hibio0pol(&mut self) -> HIBIO0POL_W<'_, HDCR_SPEC>
pub fn hibio0pol(&mut self) -> HIBIO0POL_W<'_, HDCR_SPEC>
Bit 12 - HIBIO0 Polarity Set
sourcepub fn hibio1pol(&mut self) -> HIBIO1POL_W<'_, HDCR_SPEC>
pub fn hibio1pol(&mut self) -> HIBIO1POL_W<'_, HDCR_SPEC>
Bit 13 - HIBIO1 Polarity Set
sourcepub fn adig0sel(&mut self) -> ADIG0SEL_W<'_, HDCR_SPEC>
pub fn adig0sel(&mut self) -> ADIG0SEL_W<'_, HDCR_SPEC>
Bit 14 - Select Analog Channel 0 or Digital Output Path
sourcepub fn adig1sel(&mut self) -> ADIG1SEL_W<'_, HDCR_SPEC>
pub fn adig1sel(&mut self) -> ADIG1SEL_W<'_, HDCR_SPEC>
Bit 15 - Select Analog Channel 1 or Digital Output Path
sourcepub fn hibio0sel(&mut self) -> HIBIO0SEL_W<'_, HDCR_SPEC>
pub fn hibio0sel(&mut self) -> HIBIO0SEL_W<'_, HDCR_SPEC>
Bits 16:19 - HIB_IO_0 Pin I/O Control (default HIBOUT)
sourcepub fn hibio1sel(&mut self) -> HIBIO1SEL_W<'_, HDCR_SPEC>
pub fn hibio1sel(&mut self) -> HIBIO1SEL_W<'_, HDCR_SPEC>
Bits 20:23 - HIB_IO_1 Pin I/O Control (Default WKUP)
sourcepub fn vbatlo(&mut self) -> VBATLO_W<'_, HDCR_SPEC>
pub fn vbatlo(&mut self) -> VBATLO_W<'_, HDCR_SPEC>
Bit 24 - Wake-Up on VBAT Falling Below Threshold Enable
sourcepub fn vbathi(&mut self) -> VBATHI_W<'_, HDCR_SPEC>
pub fn vbathi(&mut self) -> VBATHI_W<'_, HDCR_SPEC>
Bit 25 - Wake-Up on VBAT Rising Above Threshold Enable
sourcepub fn ahibio0lo(&mut self) -> AHIBIO0LO_W<'_, HDCR_SPEC>
pub fn ahibio0lo(&mut self) -> AHIBIO0LO_W<'_, HDCR_SPEC>
Bit 26 - Wake-Up on Analog HIB_IO_0 Falling Below Threshold Enable
sourcepub fn ahibio0hi(&mut self) -> AHIBIO0HI_W<'_, HDCR_SPEC>
pub fn ahibio0hi(&mut self) -> AHIBIO0HI_W<'_, HDCR_SPEC>
Bit 27 - Wake-Up on Analog HIB_IO_0 Rising Above Threshold Enable
sourcepub fn ahibio1lo(&mut self) -> AHIBIO1LO_W<'_, HDCR_SPEC>
pub fn ahibio1lo(&mut self) -> AHIBIO1LO_W<'_, HDCR_SPEC>
Bit 28 - Wake-Up on Analog HIB_IO_1 Falling Below Threshold Enable
sourcepub fn ahibio1hi(&mut self) -> AHIBIO1HI_W<'_, HDCR_SPEC>
pub fn ahibio1hi(&mut self) -> AHIBIO1HI_W<'_, HDCR_SPEC>
Bit 29 - Wake-Up on Analog HIB_IO_1 Rising Above Threshold Enable