Type Alias xmc4200::posif0::pconf::W

pub type W = W<PCONF_SPEC>;

Register PCONF writer

Aliased Type

struct W { /* private fields */ }

Implementations

impl W

pub fn fsel(&mut self) -> FSEL_W<'_, PCONF_SPEC>

Bits 0:1 - Function Selector

pub fn qdcm(&mut self) -> QDCM_W<'_, PCONF_SPEC>

Bit 2 - Position Decoder Mode selection

pub fn hidg(&mut self) -> HIDG_W<'_, PCONF_SPEC>

Bit 4 - Idle generation enable

pub fn mcue(&mut self) -> MCUE_W<'_, PCONF_SPEC>

Bit 5 - Multi-Channel Pattern SW update enable

pub fn insel0(&mut self) -> INSEL0_W<'_, PCONF_SPEC>

Bits 8:9 - PhaseA/Hal input 1 selector

pub fn insel1(&mut self) -> INSEL1_W<'_, PCONF_SPEC>

Bits 10:11 - PhaseB/Hall input 2 selector

pub fn insel2(&mut self) -> INSEL2_W<'_, PCONF_SPEC>

Bits 12:13 - Index/Hall input 3 selector

pub fn dsel(&mut self) -> DSEL_W<'_, PCONF_SPEC>

Bit 16 - Delay Pin selector

pub fn spes(&mut self) -> SPES_W<'_, PCONF_SPEC>

Bit 17 - Edge selector for the sampling trigger

pub fn msets(&mut self) -> MSETS_W<'_, PCONF_SPEC>

Bits 18:20 - Pattern update signal select

pub fn mses(&mut self) -> MSES_W<'_, PCONF_SPEC>

Bit 21 - Multi-Channel pattern update trigger edge

pub fn msyns(&mut self) -> MSYNS_W<'_, PCONF_SPEC>

Bits 22:23 - PWM synchronization signal selector

pub fn ewis(&mut self) -> EWIS_W<'_, PCONF_SPEC>

Bits 24:25 - Wrong Hall Event selection

pub fn ewie(&mut self) -> EWIE_W<'_, PCONF_SPEC>

Bit 26 - External Wrong Hall Event enable

pub fn ewil(&mut self) -> EWIL_W<'_, PCONF_SPEC>

Bit 27 - External Wrong Hall Event active level

pub fn lpc(&mut self) -> LPC_W<'_, PCONF_SPEC>

Bits 28:30 - Low Pass Filters Configuration