Module xmc4100::usic0_ch0::pcr_sscmode

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Protocol Control Register [SSC Mode]

Structs§

Enums§

Type Aliases§

  • Field CTQSEL1 reader - Input Frequency Selection
  • Field CTQSEL1 writer - Input Frequency Selection
  • Field DCTQ1 reader - Divider Factor DCTQ1 for Tiw and Tnf
  • Field DCTQ1 writer - Divider Factor DCTQ1 for Tiw and Tnf
  • Field DX2TIEN reader - DX2T Interrupt Enable
  • Field DX2TIEN writer - DX2T Interrupt Enable
  • Field FEM reader - Frame End Mode
  • Field FEM writer - Frame End Mode
  • Field MCLK reader - Master Clock Enable
  • Field MCLK writer - Master Clock Enable
  • Field MSLSEN reader - MSLS Enable
  • Field MSLSEN writer - MSLS Enable
  • Field MSLSIEN reader - MSLS Interrupt Enable
  • Field MSLSIEN writer - MSLS Interrupt Enable
  • Field PARIEN reader - Parity Error Interrupt Enable
  • Field PARIEN writer - Parity Error Interrupt Enable
  • Field PCTQ1 reader - Divider Factor PCTQ1 for Tiw and Tnf
  • Field PCTQ1 writer - Divider Factor PCTQ1 for Tiw and Tnf
  • Register PCR_SSCMode reader
  • Field SELCTR reader - Select Control
  • Field SELCTR writer - Select Control
  • Field SELINV reader - Select Inversion
  • Field SELINV writer - Select Inversion
  • Field SELO reader - Select Output
  • Field SELO writer - Select Output
  • Field SLPHSEL reader - Slave Mode Clock Phase Select
  • Field SLPHSEL writer - Slave Mode Clock Phase Select
  • Field TIWEN reader - Enable Inter-Word Delay Tiw
  • Field TIWEN writer - Enable Inter-Word Delay Tiw
  • Register PCR_SSCMode writer