[−][src]Module xmc1100::usic0_ch0::pcr_sscmode

Protocol Control Register [SSC Mode]

Structs

CTQSEL1_W	Write proxy for field `CTQSEL1`
DCTQ1_W	Write proxy for field `DCTQ1`
DX2TIEN_W	Write proxy for field `DX2TIEN`
FEM_W	Write proxy for field `FEM`
MCLK_W	Write proxy for field `MCLK`
MSLSEN_W	Write proxy for field `MSLSEN`
MSLSIEN_W	Write proxy for field `MSLSIEN`
PARIEN_W	Write proxy for field `PARIEN`
PCTQ1_W	Write proxy for field `PCTQ1`
SELCTR_W	Write proxy for field `SELCTR`
SELINV_W	Write proxy for field `SELINV`
SELO_W	Write proxy for field `SELO`
SLPHSEL_W	Write proxy for field `SLPHSEL`
TIWEN_W	Write proxy for field `TIWEN`

CTQSEL1_A	Input Frequency Selection
DX2TIEN_A	DX2T Interrupt Enable
FEM_A	Frame End Mode
MCLK_A	Master Clock Enable
MSLSEN_A	MSLS Enable
MSLSIEN_A	MSLS Interrupt Enable
PARIEN_A	Parity Error Interrupt Enable
SELCTR_A	Select Control
SELINV_A	Select Inversion
SELO_A	Select Output
SLPHSEL_A	Slave Mode Clock Phase Select
TIWEN_A	Enable Inter-Word Delay Tiw

CTQSEL1_R	Reader of field `CTQSEL1`
DCTQ1_R	Reader of field `DCTQ1`
DX2TIEN_R	Reader of field `DX2TIEN`
FEM_R	Reader of field `FEM`
MCLK_R	Reader of field `MCLK`
MSLSEN_R	Reader of field `MSLSEN`
MSLSIEN_R	Reader of field `MSLSIEN`
PARIEN_R	Reader of field `PARIEN`
PCTQ1_R	Reader of field `PCTQ1`
R	Reader of register PCR_SSCMode
SELCTR_R	Reader of field `SELCTR`
SELINV_R	Reader of field `SELINV`
SELO_R	Reader of field `SELO`
SLPHSEL_R	Reader of field `SLPHSEL`
TIWEN_R	Reader of field `TIWEN`
W	Writer for register PCR_SSCMode