Struct x86_64::registers::control::Cr4Flags [−][src]
pub struct Cr4Flags { /* fields omitted */ }
Expand description
Configuration flags of the Cr4
register.
Implementations
Enables hardware-supported performance enhancements for software running in virtual-8086 mode.
Enables support for protected-mode virtual interrupts.
When set, only privilege-level 0 can execute the RDTSC
or RDTSCP
instructions.
Enables I/O breakpoint capability and enforces treatment of DR4
and DR5
registers
as reserved.
Enables the use of 4MB physical frames; ignored if
PHYSICAL_ADDRESS_EXTENSION
is set (so always ignored in long mode).
Enables physical address extensions and 2MB physical frames. Required in long mode.
Enables the machine-check exception mechanism.
Enables the global page feature, allowing some page translations to
be marked as global (see PageTableFlags::GLOBAL
).
Allows software running at any privilege level to use the RDPMC
instruction.
Enables the use of legacy SSE instructions; allows using FXSAVE
/FXRSTOR
for saving
processor state of 128-bit media instructions.
Enables the SIMD floating-point exception (#XF
) for handling unmasked 256-bit and
128-bit media floating-point errors.
Prevents the execution of the SGDT
, SIDT
, SLDT
, SMSW
, and STR
instructions by
user-mode software.
Enables VMX instructions (Intel Only).
Enables SMX instructions (Intel Only).
Enables software running in 64-bit mode at any privilege level to read and write the FS.base and GS.base hidden segment register state.
Enables extended processor state management instructions, including XGETBV
and XSAVE
.
Enables the Key Locker feature (Intel Only).
This enables creation and use of opaque AES key handles; see the Intel Key Locker Specification for more information.
Prevents the execution of instructions that reside in pages accessible by user-mode software when the processor is in supervisor-mode.
Enables restrictions for supervisor-mode software when reading data from user-mode pages.
Enables protection keys for user-mode pages.
Also enables access to the PKRU register (via the RDPKRU
/WRPKRU
instructions) to set user-mode protection key access controls.
Enables Control-flow Enforcement Technology (CET)
This enables the shadow stack feature, ensuring return addresses read
via RET
and IRET
have not been corrupted.
Enables protection keys for supervisor-mode pages (Intel Only).
Also enables the IA32_PKRS
MSR to set supervisor-mode protection
key access controls.
Convert from underlying bit representation, unless that representation contains bits that do not correspond to a flag.
Convert from underlying bit representation, dropping any bits that do not correspond to flags.
Convert from underlying bit representation, preserving all bits (even those not corresponding to a defined flag).
Returns true
if there are flags common to both self
and other
.
Returns true
all of the flags in other
are contained within self
.
Trait Implementations
Disables all flags disabled in the set.
Adds the set of flags.
Toggles the set of flags.
Extends a collection with the contents of an iterator. Read more
extend_one
)Extends a collection with exactly one element.
extend_one
)Reserves capacity in a collection for the given number of additional elements. Read more
This method returns an ordering between self
and other
values if one exists. Read more
This method tests less than (for self
and other
) and is used by the <
operator. Read more
This method tests less than or equal to (for self
and other
) and is used by the <=
operator. Read more
This method tests greater than (for self
and other
) and is used by the >
operator. Read more
Disables all flags enabled in the set.