pub struct ProcessorCapacityAndFeatureInfo { /* private fields */ }
Expand description

Processor Capacity Parameters and Extended Feature Identification (LEAF=0x8000_0008).

This function provides the size or capacity of various architectural parameters that vary by implementation, as well as an extension to the 0x8000_0001 feature identifiers.

Platforms

✅ AMD 🟡 Intel

Implementations

Physical Address Bits

Platforms

✅ AMD ✅ Intel

Linear Address Bits

Platforms

✅ AMD ✅ Intel

Guest Physical Address Bits

This number applies only to guests using nested paging. When this field is zero, refer to the PhysAddrSize field for the maximum guest physical address size.

Platforms

✅ AMD ❌ Intel (reserved=0)

CLZERO instruction supported if set.

Platforms

✅ AMD ❌ Intel (reserved=false)

Instruction Retired Counter MSR available if set.

Platforms

✅ AMD ❌ Intel (reserved=false)

FP Error Pointers Restored by XRSTOR if set.

Platforms

✅ AMD ❌ Intel (reserved=false)

INVLPGB and TLBSYNC instruction supported if set.

Platforms

✅ AMD ❌ Intel (reserved=false)

RDPRU instruction supported if set.

Platforms

✅ AMD ❌ Intel (reserved=false)

MCOMMIT instruction supported if set.

Platforms

✅ AMD ❌ Intel (reserved=false)

WBNOINVD instruction supported if set.

Platforms

✅ AMD ✅ Intel

WBINVD/WBNOINVD are interruptible if set.

Platforms

✅ AMD ❌ Intel (reserved=false)

EFER.LMSLE is unsupported if set.

Platforms

✅ AMD ❌ Intel (reserved=false)

INVLPGB support for invalidating guest nested translations if set.

Platforms

✅ AMD ❌ Intel (reserved=false)

Performance time-stamp counter size (in bits).

Indicates the size of MSRC001_0280[PTSC].

Platforms

✅ AMD ❌ Intel (reserved=false)

APIC ID size.

A value of zero indicates that legacy methods must be used to determine the maximum number of logical processors, as indicated by CPUID Fn8000_0008_ECX[NC].

Platforms

✅ AMD ❌ Intel (reserved=0)

The size of the apic_id_size field determines the maximum number of logical processors (MNLP) that the package could theoretically support, and not the actual number of logical processors that are implemented or enabled in the package, as indicated by CPUID Fn8000_0008_ECX[NC].

MNLP = (2 raised to the power of ApicIdSize[3:0]) (if not 0)

Platforms

✅ AMD ❌ Intel (reserved=0)

Number of physical threads in the processor.

Platforms

✅ AMD ❌ Intel (reserved=0)

Maximum page count for INVLPGB instruction.

Platforms

✅ AMD ❌ Intel (reserved=0)

The maximum ECX value recognized by RDPRU.

Platforms

✅ AMD ❌ Intel (reserved=0)

Trait Implementations

Formats the value using the given formatter. Read more

This method tests for self and other values to be equal, and is used by ==. Read more

This method tests for !=.

Auto Trait Implementations

Blanket Implementations

Gets the TypeId of self. Read more

Immutably borrows from an owned value. Read more

Mutably borrows from an owned value. Read more

Returns the argument unchanged.

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

The type returned in the event of a conversion error.

Performs the conversion.

The type returned in the event of a conversion error.

Performs the conversion.