Enum wasmbin::instructions::Instruction

source ·

#[repr(u8)]pub enum Instruction {
Show 191 variants    Unreachable = 0,
    Nop = 1,
    BlockStart(BlockType),
    LoopStart(BlockType),
    IfStart(BlockType),
    IfElse = 5,
    Throw(ExceptionId),
    ThrowRef = 10,
    End = 11,
    Br(LabelId),
    BrIf(LabelId),
    BrTable {
        branches: Vec<LabelId>,
        otherwise: LabelId,
    },
    Return = 15,
    Call(FuncId),
    CallIndirect(CallIndirect),
    ReturnCall(FuncId),
    ReturnCallIndirect(CallIndirect),
    Drop = 26,
    Select = 27,
    SelectWithTypes(Vec<ValueType>),
    TryTable(TryTable),
    LocalGet(LocalId),
    LocalSet(LocalId),
    LocalTee(LocalId),
    GlobalGet(GlobalId),
    GlobalSet(GlobalId),
    TableGet(TableId),
    TableSet(TableId),
    I32Load(MemArg),
    I64Load(MemArg),
    F32Load(MemArg),
    F64Load(MemArg),
    I32Load8S(MemArg),
    I32Load8U(MemArg),
    I32Load16S(MemArg),
    I32Load16U(MemArg),
    I64Load8S(MemArg),
    I64Load8U(MemArg),
    I64Load16S(MemArg),
    I64Load16U(MemArg),
    I64Load32S(MemArg),
    I64Load32U(MemArg),
    I32Store(MemArg),
    I64Store(MemArg),
    F32Store(MemArg),
    F64Store(MemArg),
    I32Store8(MemArg),
    I32Store16(MemArg),
    I64Store8(MemArg),
    I64Store16(MemArg),
    I64Store32(MemArg),
    MemorySize(MemId),
    MemoryGrow(MemId),
    I32Const(i32),
    I64Const(i64),
    F32Const(FloatConst<f32>),
    F64Const(FloatConst<f64>),
    I32Eqz = 69,
    I32Eq = 70,
    I32Ne = 71,
    I32LtS = 72,
    I32LtU = 73,
    I32GtS = 74,
    I32GtU = 75,
    I32LeS = 76,
    I32LeU = 77,
    I32GeS = 78,
    I32GeU = 79,
    I64Eqz = 80,
    I64Eq = 81,
    I64Ne = 82,
    I64LtS = 83,
    I64LtU = 84,
    I64GtS = 85,
    I64GtU = 86,
    I64LeS = 87,
    I64LeU = 88,
    I64GeS = 89,
    I64GeU = 90,
    F32Eq = 91,
    F32Ne = 92,
    F32Lt = 93,
    F32Gt = 94,
    F32Le = 95,
    F32Ge = 96,
    F64Eq = 97,
    F64Ne = 98,
    F64Lt = 99,
    F64Gt = 100,
    F64Le = 101,
    F64Ge = 102,
    I32Clz = 103,
    I32Ctz = 104,
    I32PopCnt = 105,
    I32Add = 106,
    I32Sub = 107,
    I32Mul = 108,
    I32DivS = 109,
    I32DivU = 110,
    I32RemS = 111,
    I32RemU = 112,
    I32And = 113,
    I32Or = 114,
    I32Xor = 115,
    I32Shl = 116,
    I32ShrS = 117,
    I32ShrU = 118,
    I32RotL = 119,
    I32RotR = 120,
    I64Clz = 121,
    I64Ctz = 122,
    I64PopCnt = 123,
    I64Add = 124,
    I64Sub = 125,
    I64Mul = 126,
    I64DivS = 127,
    I64DivU = 128,
    I64RemS = 129,
    I64RemU = 130,
    I64And = 131,
    I64Or = 132,
    I64Xor = 133,
    I64Shl = 134,
    I64ShrS = 135,
    I64ShrU = 136,
    I64RotL = 137,
    I64RotR = 138,
    F32Abs = 139,
    F32Neg = 140,
    F32Ceil = 141,
    F32Floor = 142,
    F32Trunc = 143,
    F32Nearest = 144,
    F32Sqrt = 145,
    F32Add = 146,
    F32Sub = 147,
    F32Mul = 148,
    F32Div = 149,
    F32Min = 150,
    F32Max = 151,
    F32CopySign = 152,
    F64Abs = 153,
    F64Neg = 154,
    F64Ceil = 155,
    F64Floor = 156,
    F64Trunc = 157,
    F64Nearest = 158,
    F64Sqrt = 159,
    F64Add = 160,
    F64Sub = 161,
    F64Mul = 162,
    F64Div = 163,
    F64Min = 164,
    F64Max = 165,
    F64CopySign = 166,
    I32WrapI64 = 167,
    I32TruncF32S = 168,
    I32TruncF332U = 169,
    I32TruncF64S = 170,
    I32TruncF64U = 171,
    I64ExtendI32S = 172,
    I64ExtendI32U = 173,
    I64TruncF32S = 174,
    I64TruncF32U = 175,
    I64TruncF64S = 176,
    I64TruncF64U = 177,
    F32ConvertI32S = 178,
    F32ConvertI32U = 179,
    F32ConvertI64S = 180,
    F32ConvertI64U = 181,
    F32DemoteF64 = 182,
    F64ConvertI32S = 183,
    F64ConvertI32U = 184,
    F64ConvertI64S = 185,
    F64ConvertI64U = 186,
    F64PromoteF32 = 187,
    I32ReinterpretF32 = 188,
    I64ReinterpretF64 = 189,
    F32ReinterpretI32 = 190,
    F64ReinterpretI64 = 191,
    I32Extend8S = 192,
    I32Extend16S = 193,
    I64Extend8S = 194,
    I64Extend16S = 195,
    I64Extend32S = 196,
    RefNull(RefType),
    RefIsNull = 209,
    RefFunc(FuncId),
    Misc(Misc),
    SIMD(SIMD),
    Atomic(Atomic),
}

Expand description

WebAssembly instruction set.

In most cases, these will map 1:1 to the instructions in the spec, but an exception is made for structured control flow instructions (block, loop and if). Representing those as nested blocks would be ideal semantically, but is very expensive and tends to blow up the stack for even moderately-sized modules. Instead, we follow the other WebAssembly parsers and represent them as a start (BlockStart, LoopStart or IfStart) instruction followed by the contents of the block, and an End instruction - all in the same flat instruction list.