Trait w5500_ll::Registers

source · 
pub trait Registers {
    type Error;


Show 87 methods    // Required methods
    fn read(
        &mut self,
        addr: u16,
        block: u8,
        data: &mut [u8]
    ) -> Result<(), Self::Error>;
    fn write(
        &mut self,
        addr: u16,
        block: u8,
        data: &[u8]
    ) -> Result<(), Self::Error>;

    // Provided methods
    fn mr(&mut self) -> Result<Mode, Self::Error> { ... }
    fn set_mr(&mut self, mode: Mode) -> Result<(), Self::Error> { ... }
    fn gar(&mut self) -> Result<Ipv4Addr, Self::Error> { ... }
    fn set_gar(&mut self, gar: &Ipv4Addr) -> Result<(), Self::Error> { ... }
    fn subr(&mut self) -> Result<Ipv4Addr, Self::Error> { ... }
    fn set_subr(&mut self, subr: &Ipv4Addr) -> Result<(), Self::Error> { ... }
    fn shar(&mut self) -> Result<Eui48Addr, Self::Error> { ... }
    fn set_shar(&mut self, shar: &Eui48Addr) -> Result<(), Self::Error> { ... }
    fn sipr(&mut self) -> Result<Ipv4Addr, Self::Error> { ... }
    fn set_sipr(&mut self, sipr: &Ipv4Addr) -> Result<(), Self::Error> { ... }
    fn intlevel(&mut self) -> Result<u16, Self::Error> { ... }
    fn set_intlevel(&mut self, intlevel: u16) -> Result<(), Self::Error> { ... }
    fn ir(&mut self) -> Result<Interrupt, Self::Error> { ... }
    fn set_ir(&mut self, interrupt: Interrupt) -> Result<(), Self::Error> { ... }
    fn imr(&mut self) -> Result<Interrupt, Self::Error> { ... }
    fn set_imr(&mut self, mask: Interrupt) -> Result<(), Self::Error> { ... }
    fn sir(&mut self) -> Result<u8, Self::Error> { ... }
    fn simr(&mut self) -> Result<u8, Self::Error> { ... }
    fn set_simr(&mut self, simr: u8) -> Result<(), Self::Error> { ... }
    fn rtr(&mut self) -> Result<u16, Self::Error> { ... }
    fn set_rtr(&mut self, rtr: u16) -> Result<(), Self::Error> { ... }
    fn rcr(&mut self) -> Result<u8, Self::Error> { ... }
    fn set_rcr(&mut self, rcr: u8) -> Result<(), Self::Error> { ... }
    fn ptimer(&mut self) -> Result<u8, Self::Error> { ... }
    fn set_ptimer(&mut self, ptimer: u8) -> Result<(), Self::Error> { ... }
    fn pmagic(&mut self) -> Result<u8, Self::Error> { ... }
    fn set_pmagic(&mut self, pmagic: u8) -> Result<(), Self::Error> { ... }
    fn phar(&mut self) -> Result<Eui48Addr, Self::Error> { ... }
    fn set_phar(&mut self, phar: &Eui48Addr) -> Result<(), Self::Error> { ... }
    fn psid(&mut self) -> Result<u16, Self::Error> { ... }
    fn set_psid(&mut self, psid: u16) -> Result<(), Self::Error> { ... }
    fn pmru(&mut self) -> Result<u16, Self::Error> { ... }
    fn set_pmru(&mut self, pmru: u16) -> Result<(), Self::Error> { ... }
    fn uipr(&mut self) -> Result<Ipv4Addr, Self::Error> { ... }
    fn uportr(&mut self) -> Result<u16, Self::Error> { ... }
    fn phycfgr(&mut self) -> Result<PhyCfg, Self::Error> { ... }
    fn set_phycfgr(&mut self, phycfg: PhyCfg) -> Result<(), Self::Error> { ... }
    fn version(&mut self) -> Result<u8, Self::Error> { ... }
    fn sn_mr(&mut self, sn: Sn) -> Result<SocketMode, Self::Error> { ... }
    fn set_sn_mr(&mut self, sn: Sn, mode: SocketMode) -> Result<(), Self::Error> { ... }
    fn sn_cr(&mut self, sn: Sn) -> Result<u8, Self::Error> { ... }
    fn set_sn_cr(
        &mut self,
        sn: Sn,
        cmd: SocketCommand
    ) -> Result<(), Self::Error> { ... }
    fn sn_ir(&mut self, sn: Sn) -> Result<SocketInterrupt, Self::Error> { ... }
    fn set_sn_ir<T: Into<u8>>(
        &mut self,
        sn: Sn,
        sn_ir: T
    ) -> Result<(), Self::Error> { ... }
    fn sn_sr(&mut self, sn: Sn) -> Result<Result<SocketStatus, u8>, Self::Error> { ... }
    fn sn_port(&mut self, sn: Sn) -> Result<u16, Self::Error> { ... }
    fn set_sn_port(&mut self, sn: Sn, port: u16) -> Result<(), Self::Error> { ... }
    fn sn_dhar(&mut self, sn: Sn) -> Result<Eui48Addr, Self::Error> { ... }
    fn set_sn_dhar(
        &mut self,
        sn: Sn,
        dhar: &Eui48Addr
    ) -> Result<(), Self::Error> { ... }
    fn sn_dipr(&mut self, sn: Sn) -> Result<Ipv4Addr, Self::Error> { ... }
    fn set_sn_dipr(
        &mut self,
        sn: Sn,
        dipr: &Ipv4Addr
    ) -> Result<(), Self::Error> { ... }
    fn sn_dport(&mut self, sn: Sn) -> Result<u16, Self::Error> { ... }
    fn set_sn_dport(&mut self, sn: Sn, port: u16) -> Result<(), Self::Error> { ... }
    fn sn_dest(&mut self, sn: Sn) -> Result<SocketAddrV4, Self::Error> { ... }
    fn set_sn_dest(
        &mut self,
        sn: Sn,
        addr: &SocketAddrV4
    ) -> Result<(), Self::Error> { ... }
    fn sn_mssr(&mut self, sn: Sn) -> Result<u16, Self::Error> { ... }
    fn set_sn_mssr(&mut self, sn: Sn, mssr: u16) -> Result<(), Self::Error> { ... }
    fn sn_tos(&mut self, sn: Sn) -> Result<u8, Self::Error> { ... }
    fn set_sn_tos(&mut self, sn: Sn, tos: u8) -> Result<(), Self::Error> { ... }
    fn sn_ttl(&mut self, sn: Sn) -> Result<u8, Self::Error> { ... }
    fn set_sn_ttl(&mut self, sn: Sn, ttl: u8) -> Result<(), Self::Error> { ... }
    fn sn_rxbuf_size(
        &mut self,
        sn: Sn
    ) -> Result<Result<BufferSize, u8>, Self::Error> { ... }
    fn set_sn_rxbuf_size(
        &mut self,
        sn: Sn,
        size: BufferSize
    ) -> Result<(), Self::Error> { ... }
    fn sn_txbuf_size(
        &mut self,
        sn: Sn
    ) -> Result<Result<BufferSize, u8>, Self::Error> { ... }
    fn set_sn_txbuf_size(
        &mut self,
        sn: Sn,
        size: BufferSize
    ) -> Result<(), Self::Error> { ... }
    fn sn_tx_fsr(&mut self, sn: Sn) -> Result<u16, Self::Error> { ... }
    fn sn_tx_rd(&mut self, sn: Sn) -> Result<u16, Self::Error> { ... }
    fn sn_tx_wr(&mut self, sn: Sn) -> Result<u16, Self::Error> { ... }
    fn set_sn_tx_wr(&mut self, sn: Sn, ptr: u16) -> Result<(), Self::Error> { ... }
    fn sn_tx_ptrs(&mut self, sn: Sn) -> Result<TxPtrs, Self::Error> { ... }
    fn sn_rx_rsr(&mut self, sn: Sn) -> Result<u16, Self::Error> { ... }
    fn sn_rx_rd(&mut self, sn: Sn) -> Result<u16, Self::Error> { ... }
    fn set_sn_rx_rd(&mut self, sn: Sn, ptr: u16) -> Result<(), Self::Error> { ... }
    fn sn_rx_wr(&mut self, sn: Sn) -> Result<u16, Self::Error> { ... }
    fn sn_rx_ptrs(&mut self, sn: Sn) -> Result<RxPtrs, Self::Error> { ... }
    fn sn_imr(&mut self, sn: Sn) -> Result<SocketInterruptMask, Self::Error> { ... }
    fn set_sn_imr(
        &mut self,
        sn: Sn,
        mask: SocketInterruptMask
    ) -> Result<(), Self::Error> { ... }
    fn sn_frag(&mut self, sn: Sn) -> Result<u16, Self::Error> { ... }
    fn set_sn_frag(&mut self, sn: Sn, frag: u16) -> Result<(), Self::Error> { ... }
    fn sn_kpalvtr(&mut self, sn: Sn) -> Result<u8, Self::Error> { ... }
    fn set_sn_kpalvtr(&mut self, sn: Sn, kpalvtr: u8) -> Result<(), Self::Error> { ... }
    fn set_sn_tx_buf(
        &mut self,
        sn: Sn,
        ptr: u16,
        buf: &[u8]
    ) -> Result<(), Self::Error> { ... }
    fn sn_tx_buf(
        &mut self,
        sn: Sn,
        ptr: u16,
        buf: &mut [u8]
    ) -> Result<(), Self::Error> { ... }
    fn sn_rx_buf(
        &mut self,
        sn: Sn,
        ptr: u16,
        buf: &mut [u8]
    ) -> Result<(), Self::Error> { ... }
    fn set_sn_rx_buf(
        &mut self,
        sn: Sn,
        ptr: u16,
        buf: &[u8]
    ) -> Result<(), Self::Error> { ... }

}
Expand description

W5500 register setters and getters.

  • All register getters are simply the name of the register.
  • All register setters are the name of the register prefixed with set_.

Most of the register documentation is taken from the data sheet.

Required Associated Types§

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type Error

Register accessor error type.

Required Methods§

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fn read( &mut self, addr: u16, block: u8, data: &mut [u8] ) -> Result<(), Self::Error>

Read from the W5500.

Arguments
  • addr - Starting address of the memory being read.
  • block - W5500 block select bits
  • data - Buffer to read data into. The number of bytes read is equal to the length of this buffer.
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fn write( &mut self, addr: u16, block: u8, data: &[u8] ) -> Result<(), Self::Error>

Write to the W5500.

Arguments
  • addr - Starting address of the memory being written.
  • block - W5500 block select bits
  • data - Buffer of data to write. The number of bytes written is equal to the length of this buffer.

Provided Methods§

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fn mr(&mut self) -> Result<Mode, Self::Error>

Get the mode register.

Example
use w5500_ll::{eh1::vdm::W5500, Mode, Registers};

let mut w5500 = W5500::new(spi);
let mode: Mode = w5500.mr()?;
assert_eq!(mode, Mode::default());
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fn set_mr(&mut self, mode: Mode) -> Result<(), Self::Error>

Set the mode register.

Example
use w5500_ll::{eh1::vdm::W5500, Mode, Registers};

const MODE: Mode = Mode::DEFAULT.enable_wol();
let mut w5500 = W5500::new(spi);
w5500.set_mr(MODE)?;
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fn gar(&mut self) -> Result<Ipv4Addr, Self::Error>

Get the gateway IP address.

Example
use w5500_ll::{eh1::vdm::W5500, net::Ipv4Addr, Registers};

let mut w5500 = W5500::new(spi);
let gar = w5500.gar()?;
assert_eq!(gar, Ipv4Addr::UNSPECIFIED);
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fn set_gar(&mut self, gar: &Ipv4Addr) -> Result<(), Self::Error>

Set the gateway IP address.

Example
use w5500_ll::{eh1::vdm::W5500, net::Ipv4Addr, Registers};

let mut w5500 = W5500::new(spi);
w5500.set_gar(&Ipv4Addr::new(192, 168, 0, 1))?;
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fn subr(&mut self) -> Result<Ipv4Addr, Self::Error>

Get the subnet mask.

Example
use w5500_ll::{eh1::vdm::W5500, net::Ipv4Addr, Registers};

let mut w5500 = W5500::new(spi);
let subr = w5500.subr()?;
assert_eq!(subr, Ipv4Addr::UNSPECIFIED);
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fn set_subr(&mut self, subr: &Ipv4Addr) -> Result<(), Self::Error>

Set the subnet mask.

Example
use w5500_ll::{eh1::vdm::W5500, net::Ipv4Addr, Registers};

let mut w5500 = W5500::new(spi);
w5500.set_subr(&Ipv4Addr::new(255, 255, 255, 0))?;
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fn shar(&mut self) -> Result<Eui48Addr, Self::Error>

Get the source hardware address.

Example
use w5500_ll::{eh1::vdm::W5500, net::Eui48Addr, Registers};

let mut w5500 = W5500::new(spi);
let shar = w5500.shar()?;
assert_eq!(shar, Eui48Addr::UNSPECIFIED);
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fn set_shar(&mut self, shar: &Eui48Addr) -> Result<(), Self::Error>

Set the source hardware address.

Example
use w5500_ll::{eh1::vdm::W5500, net::Eui48Addr, Registers};

let mut w5500 = W5500::new(spi);
w5500.set_shar(&Eui48Addr::new(0x12, 0x34, 0x00, 0x00, 0x00, 0x00))?;
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fn sipr(&mut self) -> Result<Ipv4Addr, Self::Error>

Get the source (client) IP address.

Example
use w5500_ll::{eh1::vdm::W5500, net::Ipv4Addr, Registers};

let mut w5500 = W5500::new(spi);
let sipr = w5500.sipr()?;
assert_eq!(sipr, Ipv4Addr::UNSPECIFIED);
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fn set_sipr(&mut self, sipr: &Ipv4Addr) -> Result<(), Self::Error>

Set the source (client) IP address.

Example
use w5500_ll::{eh1::vdm::W5500, net::Ipv4Addr, Registers};

let mut w5500 = W5500::new(spi);
w5500.set_sipr(&Ipv4Addr::new(192, 168, 0, 150))?;
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fn intlevel(&mut self) -> Result<u16, Self::Error>

Get the interrupt low level time.

INTLEVEL configures the assert wait time (IAWT).

When the next interrupt occurs, the interrupt in (INTn) will assert to low after INTLEVEL time.

The equation is:

IAWT = (INTLEVEL + 1) * PLLCLK * 4

When INTLEVEL > 0.

You might want to take a look at the data sheet, there is a handy timing diagram there.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
let intlevel: u16 = w5500.intlevel()?;
assert_eq!(intlevel, 0x00);
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fn set_intlevel(&mut self, intlevel: u16) -> Result<(), Self::Error>

Set the interrupt low level time.

See Registers::intlevel for more information.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
w5500.set_intlevel(0x1234)?;
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fn ir(&mut self) -> Result<Interrupt, Self::Error>

Get the interrupt status.

1 indicates the interrupt is raised.

Example
use w5500_ll::{eh1::vdm::W5500, Interrupt, Registers};

let mut w5500 = W5500::new(spi);
let ir: Interrupt = w5500.ir()?;
assert_eq!(ir, Interrupt::default());
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fn set_ir(&mut self, interrupt: Interrupt) -> Result<(), Self::Error>

Set the interrupt status.

Setting an interrupt bit to 1 will clear the interrupt.

Example
use w5500_ll::{eh1::vdm::W5500, Interrupt, Registers};

let mut w5500 = W5500::new(spi);
let ir: Interrupt = w5500.ir()?;
w5500.set_ir(ir)?;
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fn imr(&mut self) -> Result<Interrupt, Self::Error>

Get the interrupt mask.

0 indicates the interrupt is masked.

Example
use w5500_ll::{eh1::vdm::W5500, Interrupt, Registers};

let mut w5500 = W5500::new(spi);
let imr: Interrupt = w5500.imr()?;
assert_eq!(imr, Interrupt::default());
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fn set_imr(&mut self, mask: Interrupt) -> Result<(), Self::Error>

Set the interrupt mask.

Setting an interrupt bit to 1 will mask the interrupt. When a bit of IMR is 1 and the corresponding interrupt is 1 an interrupt will be issued. If a bit of IMR is 0, and interrupt will not be issued even if the corresponding IR bit is 1.

Example
use w5500_ll::{eh1::vdm::W5500, Interrupt, Registers};

// enable the magic packet interrupt
const IMR: Interrupt = Interrupt::DEFAULT.set_mp();

let mut w5500 = W5500::new(spi);
w5500.set_imr(IMR)?;
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fn sir(&mut self) -> Result<u8, Self::Error>

Get the socket interrupt status.

SIMR indicates the interrupt status of all sockets. Each bit of SIR will be 1 until sn_ir is cleared. If sn_ir is not equal to 0x00 the nth bit of sir is 1 and the INTn pin is asserted until SIR is 0x00.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, SOCKETS};

let mut w5500 = W5500::new(spi);
let sir = w5500.sir()?;
// clear all socket interrupts
for socket in SOCKETS.iter() {
    if 1 << (*socket as u8) & sir != 0 {
        let sn_ir = w5500.sn_ir(*socket)?;
        w5500.set_sn_ir(*socket, sn_ir)?;
    }
}
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fn simr(&mut self) -> Result<u8, Self::Error>

Get the socket interrupt mask.

Each bit of SIMR corresponds to each bit of Registers::sir. When a bit of SIMR is 1 and the corresponding bit of SIR is 1 and interrupt will be issued. If a bit of SIMR is 0 an interrupt will be not issued even if the corresponding bit of SIR is 1.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
let simr: u8 = w5500.simr()?;
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fn set_simr(&mut self, simr: u8) -> Result<(), Self::Error>

Set the socket interrupt mask.

See Registers::simr for more information.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
// enable all socket interrupts
w5500.set_simr(0xFF)?;
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fn rtr(&mut self) -> Result<u16, Self::Error>

Get the retry time.

RTR configures the re-transmission timeout period. The unit of timeout period is 100 us and the default of RTR is 0x07D0 or 2000. And so the default timeout period is 200 ms (100 us X 2000). During the time configured by RTR, the W5500 waits for the peer response to the packet that is transmitted by Sn_CR (CONNECT, DISCON, CLOSE, SEND, SEND_MAC, SEND_KEEP command). If the peer does not respond within the RTR time, the W5500 re-transmits the packet or issues a timeout.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
let rtr: u16 = w5500.rtr()?;
assert_eq!(rtr, 0x07D0);
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fn set_rtr(&mut self, rtr: u16) -> Result<(), Self::Error>

Set the retry time.

See Registers::rtr for more information.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
w5500.set_rtr(0x1234)?;
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fn rcr(&mut self) -> Result<u8, Self::Error>

Get the retry count.

RCR configured the number of re-transmission attempts. When the number of re-transmission equals RCR + 1 the socket timeout interrupt is raised.

There is a LOT more information in the data sheet, including some equations that would be very annoying to input.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
let rcr: u8 = w5500.rcr()?;
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fn set_rcr(&mut self, rcr: u8) -> Result<(), Self::Error>

Set the retry count.

See Registers::rcr for more information.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
w5500.set_rcr(0x0A)?;
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fn ptimer(&mut self) -> Result<u8, Self::Error>

Get the PPP link control protocol request timer.

PTIMER configures the time for sending LCP echo request.

The unit of time is 25 milliseconds, for a register value of 200 the timer is 5 seconds.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
let ptimer: u8 = w5500.ptimer()?;
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fn set_ptimer(&mut self, ptimer: u8) -> Result<(), Self::Error>

Set the PPP link control protocol request timer.

See Registers::ptimer for more information.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
w5500.set_ptimer(200)?;
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fn pmagic(&mut self) -> Result<u8, Self::Error>

Get the PPP link control protocol magic number.

PMAGIC configures the 4 byte magic number used in the LCP echo request. For a register value of 0x01 the magic number is 0x01010101.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
let pmagic: u8 = w5500.pmagic()?;
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fn set_pmagic(&mut self, pmagic: u8) -> Result<(), Self::Error>

Set the PPP link control protocol magic number.

See Registers::pmagic for more information.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
w5500.set_pmagic(0x01)?;
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fn phar(&mut self) -> Result<Eui48Addr, Self::Error>

Get the destination hardware address in PPPoE mode.

Example
use w5500_ll::{eh1::vdm::W5500, net::Eui48Addr, Registers};

let mut w5500 = W5500::new(spi);
let phar = w5500.phar()?;
assert_eq!(phar, Eui48Addr::UNSPECIFIED);
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fn set_phar(&mut self, phar: &Eui48Addr) -> Result<(), Self::Error>

Set the destination hardware address in PPPoE mode.

Example
use w5500_ll::{eh1::vdm::W5500, net::Eui48Addr, Registers};

let mut w5500 = W5500::new(spi);
w5500.set_phar(&Eui48Addr::new(0x12, 0x34, 0x00, 0x00, 0x00, 0x00))?;
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fn psid(&mut self) -> Result<u16, Self::Error>

Get the session ID in PPPoE mode.

PSID should be written to the PPPoE server session ID acquired in the PPPoE connection process.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
let psid: u16 = w5500.psid()?;
assert_eq!(psid, 0x0000);
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fn set_psid(&mut self, psid: u16) -> Result<(), Self::Error>

Set the session ID in PPPoE mode.

See Registers::psid for more information.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
w5500.set_psid(0x1234)?;
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fn pmru(&mut self) -> Result<u16, Self::Error>

Get the maximum receive unit in PPPoE mode.

PMRU configures the maximum receive unit of PPPoE.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
let pmru: u16 = w5500.pmru()?;
assert_eq!(pmru, 0x0000);
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fn set_pmru(&mut self, pmru: u16) -> Result<(), Self::Error>

Set the maximum receive unit in PPPoE mode.

See Registers::pmru for more information.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
w5500.set_pmru(0x1234)?;
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fn uipr(&mut self) -> Result<Ipv4Addr, Self::Error>

Get the unreachable IP address.

This awkward wording is taken directly from the data-sheet:

W5500 receives an ICMP packet (destination port unreachable) when data is sent to a port number which socket is not open and the UNREACH bit of Registers::ir becomes 1 and UIPR and UPORTR indicates the destination IP address and port number respectively.

Example
use w5500_ll::{eh1::vdm::W5500, net::Ipv4Addr, Registers};

let mut w5500 = W5500::new(spi);
let uipr = w5500.uipr()?;
assert_eq!(uipr, Ipv4Addr::UNSPECIFIED);
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fn uportr(&mut self) -> Result<u16, Self::Error>

Get the unreachable port.

See Registers::uipr for more information.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
let uportr = w5500.uportr()?;
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fn phycfgr(&mut self) -> Result<PhyCfg, Self::Error>

Get the PHY configuration.

Example
use w5500_ll::{eh1::vdm::W5500, PhyCfg, Registers};

let mut w5500 = W5500::new(spi);
let phy_cfg: PhyCfg = w5500.phycfgr()?;
assert_eq!(phy_cfg, PhyCfg::default());
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fn set_phycfgr(&mut self, phycfg: PhyCfg) -> Result<(), Self::Error>

Set the PHY configuration.

Example
use w5500_ll::{eh1::vdm::W5500, OperationMode, PhyCfg, Registers};

const PHY_CFG: PhyCfg = PhyCfg::DEFAULT.set_opmdc(OperationMode::Auto);
let mut w5500 = W5500::new(spi);
w5500.set_phycfgr(PHY_CFG)?;
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fn version(&mut self) -> Result<u8, Self::Error>

Get the version.

The value returned is always 0x04.

This register is extremely useful as a sanity check to ensure SPI communications are working with the W5500.

Example
use w5500_ll::{eh1::vdm::W5500, Registers};

let mut w5500 = W5500::new(spi);
let version = w5500.version()?;
assert_eq!(version, 0x04);
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fn sn_mr(&mut self, sn: Sn) -> Result<SocketMode, Self::Error>

Get the socket mode.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketMode};

let mut w5500 = W5500::new(spi);
let socket_mode = w5500.sn_mr(Sn::Sn0)?;
assert_eq!(socket_mode, SocketMode::default());
source

fn set_sn_mr(&mut self, sn: Sn, mode: SocketMode) -> Result<(), Self::Error>

Set the socket mode.

Example
use w5500_ll::{eh1::vdm::W5500, Protocol, Registers, Sn, SocketMode};

const SOCKET_MODE: SocketMode = SocketMode::DEFAULT.set_protocol(Protocol::Tcp);
let mut w5500 = W5500::new(spi);
w5500.set_sn_mr(Sn::Sn0, SOCKET_MODE)?;
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fn sn_cr(&mut self, sn: Sn) -> Result<u8, Self::Error>

Get the socket command.

The only use for reading this register is to check if a socket command has been accepted.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketCommand};

let mut w5500 = W5500::new(spi);
w5500.set_sn_cr(Sn::Sn0, SocketCommand::Open)?;
while w5500.sn_cr(Sn::Sn0)? != SocketCommand::Accepted.into() {}
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fn set_sn_cr(&mut self, sn: Sn, cmd: SocketCommand) -> Result<(), Self::Error>

Set the socket command.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketCommand};

let mut w5500 = W5500::new(spi);
w5500.set_sn_cr(Sn::Sn0, SocketCommand::Open)?;
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fn sn_ir(&mut self, sn: Sn) -> Result<SocketInterrupt, Self::Error>

Get the socket interrupt status.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
let socket_interrupts = w5500.sn_ir(Sn::Sn0)?;
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fn set_sn_ir<T: Into<u8>>( &mut self, sn: Sn, sn_ir: T ) -> Result<(), Self::Error>

Set the socket interrupt status.

This is a write 1 to clear register.

Examples

Clearing all raised interrupts.

use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketInterrupt};

let mut w5500 = W5500::new(spi);
let socket_interrupts: SocketInterrupt = w5500.sn_ir(Sn::Sn0)?;
w5500.set_sn_ir(Sn::Sn0, socket_interrupts)?;

Clearing only the SENDOK interrupt.

use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketInterrupt};

let mut w5500 = W5500::new(spi);
w5500.set_sn_ir(Sn::Sn0, SocketInterrupt::SENDOK_MASK)?;
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fn sn_sr(&mut self, sn: Sn) -> Result<Result<SocketStatus, u8>, Self::Error>

Get the socket status.

Note: This method returns a nested core::result::Result.

The outermost Result is for handling bus errors, similar to most of the other methods in this trait.

The innermost Result<SocketStatus, u8> is the result of a u8 to SocketStatus conversion because not every value of u8 corresponds to a valid SocketStatus.

  • u8 values that have a corresponding SocketStatus will be converted and returned in the Ok variant of the inner Result.
  • u8 values that do not corresponding SocketStatus will have the raw u8 byte returned in the Err variant of the inner Result.
Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketStatus};

let mut w5500 = W5500::new(spi);
let sn_sr = w5500.sn_sr(Sn::Sn0)?;
assert_eq!(sn_sr, Ok(SocketStatus::Closed));
source

fn sn_port(&mut self, sn: Sn) -> Result<u16, Self::Error>

Get the socket source port.

This is only valid in TCP/UDP mode. This should be set before sending the OPEN command.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketMode};

let mut w5500 = W5500::new(spi);
let socket_port: u16 = w5500.sn_port(Sn::Sn0)?;
source

fn set_sn_port(&mut self, sn: Sn, port: u16) -> Result<(), Self::Error>

Set the socket source port.

See Registers::sn_port for more information.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
w5500.set_sn_port(Sn::Sn0, 68)?;
source

fn sn_dhar(&mut self, sn: Sn) -> Result<Eui48Addr, Self::Error>

Get the socket destination hardware address.

Sn_DHAR configures the destination hardware address of Socket n when using SEND_MAC command in UDP mode or it indicates that it is acquired in ARP-process by CONNECT/SEND command.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
let dhar = w5500.sn_dhar(Sn::Sn0)?;
source

fn set_sn_dhar(&mut self, sn: Sn, dhar: &Eui48Addr) -> Result<(), Self::Error>

Set the socket destination hardware address.

See Registers::sn_dhar for more information.

Example
use w5500_ll::{eh1::vdm::W5500, net::Eui48Addr, Registers, Sn};

let dhar = Eui48Addr::new(0x12, 0x34, 0x00, 0x00, 0x00, 0x00);
let mut w5500 = W5500::new(spi);
w5500.set_sn_dhar(Sn::Sn0, &dhar)?;
source

fn sn_dipr(&mut self, sn: Sn) -> Result<Ipv4Addr, Self::Error>

Get the socket destination IP address.

This register configures or indicates the destination IP address. It it valid when the socket is in TCP/UDP mode.

In TCP client mode it configures the TCP server address before the SocketCommand::Connect command.

In TCP server mode it indicates the IP address of the TCP client after successfully establishing a connection.

In UDP mode it configures an IP address of the peer to receive the UDP packet send by the SocketCommand::Send or SocketCommand::SendMac command.

Example
use w5500_ll::{eh1::vdm::W5500, net::Ipv4Addr, Registers, Sn};

let mut w5500 = W5500::new(spi);
let dipr = w5500.sn_dipr(Sn::Sn0)?;
assert_eq!(dipr, Ipv4Addr::UNSPECIFIED);
source

fn set_sn_dipr(&mut self, sn: Sn, dipr: &Ipv4Addr) -> Result<(), Self::Error>

Set the socket destination IP address.

See Registers::sn_dipr for more information.

Example
use w5500_ll::{eh1::vdm::W5500, net::Ipv4Addr, Registers, Sn};

let mut w5500 = W5500::new(spi);
w5500.set_sn_dipr(Sn::Sn0, &Ipv4Addr::new(192, 168, 0, 11))?;
source

fn sn_dport(&mut self, sn: Sn) -> Result<u16, Self::Error>

Get the socket destination port.

This register configures or indicates the destination port number of the socket. It is valid when the socket is used in TCP/UDP mode.

In TCP client mode, it configures the listen port number of the TCP server before the SocketCommand::Send command.

In TCP server mode, it indicates the port number of the TCP client after successfully establishing connection.

In UDP mode, it configures the port number of the peer to be transmitted in the UDP packet by the SocketCommand::Send or SocketCommand::SendMac command.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketMode};

let mut w5500 = W5500::new(spi);
let socket_destination_port: u16 = w5500.sn_dport(Sn::Sn0)?;
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fn set_sn_dport(&mut self, sn: Sn, port: u16) -> Result<(), Self::Error>

Set the socket destination port.

See Registers::sn_dport for more information.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
w5500.set_sn_dport(Sn::Sn0, 67)?;
source

fn sn_dest(&mut self, sn: Sn) -> Result<SocketAddrV4, Self::Error>

Get the socket destination IPv4 and port.

This is equivalent to Registers::sn_dipr and Registers::sn_dport in a single read transaction.

Example
use w5500_ll::{
    eh1::vdm::W5500,
    net::{Ipv4Addr, SocketAddrV4},
    Registers, Sn,
};

let mut w5500 = W5500::new(spi);
let addr = w5500.sn_dest(Sn::Sn0)?;
assert_eq!(addr, SocketAddrV4::new(Ipv4Addr::new(0, 0, 0, 0), 0));
source

fn set_sn_dest( &mut self, sn: Sn, addr: &SocketAddrV4 ) -> Result<(), Self::Error>

Set the socket destination IPv4 and port.

This is equivalent to Registers::set_sn_dipr and Registers::set_sn_dport in a single writer transaction.

Example
use w5500_ll::{
    eh1::vdm::W5500,
    net::{Ipv4Addr, SocketAddrV4},
    Registers, Sn,
};

let addr: SocketAddrV4 = SocketAddrV4::new(Ipv4Addr::new(192, 168, 0, 11), 67);
let mut w5500 = W5500::new(spi);
w5500.set_sn_dest(Sn::Sn0, &addr)?;
source

fn sn_mssr(&mut self, sn: Sn) -> Result<u16, Self::Error>

Get the socket maximum segment size.

This register configures or indicates the MTU (Maximum Transfer Unit) of the socket.

The default MTU is valid when the socket is used in TCP / UDP mode. However, when used in PPPoE mode it is determined within the PPPoE MTU.

ModeNormal DefaultNormal RangePPPoE DefaultPPPoE Range
TCP14601 - 146014521 - 1452
UDP14721 - 147214641 - 1464
MACRAW1514151415141514

When socket n is used in MACRAW mode, the default MTU is applied because the MTU is not processed internally. Therefore, when transmitting the data bigger than default MTU, the host should manually divide the data into the unit of default MTU. When socket n is used in TCP/UDP mode, and transmitting data bigger than the MTU, the data is automatically divided into the unit of MTU.

In UDP mode, the configured MTU is used. When transmitting data to a peer with the different MTU size, the ICMP (Fragment MTU) packet might be received. In this case, IR(FMTU) becomes 1 and the peer information such as the MTU size and IP address is indicated from FMTUR and UIPR respectively. If IR[MTU] = 1, the user cannot transmit data to the peer.

To resume the communication with peer, do as followed.

  1. Close socket n with the SocketCommand::Close command.
  2. Set Sn_MSS to the indicated MTU from FMTUR
  3. Open socket n with the SocketCommand::Open command.
  4. Resume the communication with the peer.
Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
let sn__mssr: u16 = w5500.sn_mssr(Sn::Sn0)?;
source

fn set_sn_mssr(&mut self, sn: Sn, mssr: u16) -> Result<(), Self::Error>

Set the socket maximum segment size.

See Registers::sn_mssr for lots more information.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
w5500.set_sn_mssr(Sn::Sn0, 1460)?;
source

fn sn_tos(&mut self, sn: Sn) -> Result<u8, Self::Error>

Get the IP type of service.

This register configures the TOS (Type of service field in IP header) for socket n. Configure this field before sending the SocketCommand::Open command.

For more details see iana.org/assignments/ip-parameters.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
let tos: u8 = w5500.sn_tos(Sn::Sn0)?;
source

fn set_sn_tos(&mut self, sn: Sn, tos: u8) -> Result<(), Self::Error>

Set the IP type of service.

For more information see Registers::sn_tos.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
w5500.set_sn_tos(Sn::Sn0, 1)?;
source

fn sn_ttl(&mut self, sn: Sn) -> Result<u8, Self::Error>

Get the time to live.

This register configures the TTL (Time to Live field in the IP header) for socket n.

For more details see https://www.iana.org/assignments/ip-parameters.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
let ttl: u8 = w5500.sn_ttl(Sn::Sn0)?;
source

fn set_sn_ttl(&mut self, sn: Sn, ttl: u8) -> Result<(), Self::Error>

Set the time to live.

For more information see Registers::sn_ttl.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
w5500.set_sn_ttl(Sn::Sn0, 0x80)?;
source

fn sn_rxbuf_size( &mut self, sn: Sn ) -> Result<Result<BufferSize, u8>, Self::Error>

Get the socket RX buffer size.

The buffer size can be configured to any of the sizes in BufferSize.

The sum of all the socket RX buffers cannot exceed 16 KiB.

Note: This method returns a nested core::result::Result.

The outermost Result is for handling bus errors, similar to most of the other methods in this trait.

The innermost Result<BufferSize, u8> is the result of a u8 to BufferSize conversion because not every value of u8 corresponds to a valid BufferSize.

  • u8 values that have a corresponding BufferSize will be converted and returned in the Ok variant of the inner Result.
  • u8 values that do not corresponding BufferSize will have the raw u8 byte returned in the Err variant of the inner Result.
Example
use w5500_ll::{eh1::vdm::W5500, BufferSize, Registers, Sn};

let mut w5500 = W5500::new(spi);
let sn_rxbuf_size = w5500.sn_rxbuf_size(Sn::Sn0)?;
assert_eq!(sn_rxbuf_size, Ok(BufferSize::KB2));
source

fn set_sn_rxbuf_size( &mut self, sn: Sn, size: BufferSize ) -> Result<(), Self::Error>

Set the socket RX buffer size.

See Registers::sn_rxbuf_size for more information.

Example
use w5500_ll::{eh1::vdm::W5500, BufferSize, Registers, Sn};

let mut w5500 = W5500::new(spi);
w5500.set_sn_rxbuf_size(Sn::Sn0, BufferSize::KB1)?;
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fn sn_txbuf_size( &mut self, sn: Sn ) -> Result<Result<BufferSize, u8>, Self::Error>

Get the socket TX buffer size.

The buffer size can be configured to any of the sizes in BufferSize.

The sum of all the socket TX buffers cannot exceed 16 KiB.

Note: This method returns a nested core::result::Result.

The outermost Result is for handling bus errors, similar to most of the other methods in this trait.

The innermost Result<BufferSize, u8> is the result of a u8 to BufferSize conversion because not every value of u8 corresponds to a valid BufferSize.

  • u8 values that have a corresponding BufferSize will be converted and returned in the Ok variant of the inner Result.
  • u8 values that do not corresponding BufferSize will have the raw u8 byte returned in the Err variant of the inner Result.
Example
use w5500_ll::{eh1::vdm::W5500, BufferSize, Registers, Sn};

let mut w5500 = W5500::new(spi);
let sn_txbuf_size = w5500.sn_txbuf_size(Sn::Sn0)?;
assert_eq!(sn_txbuf_size, Ok(BufferSize::KB2));
source

fn set_sn_txbuf_size( &mut self, sn: Sn, size: BufferSize ) -> Result<(), Self::Error>

Set the socket TX buffer size.

See Registers::sn_rxbuf_size for more information.

Example
use w5500_ll::{eh1::vdm::W5500, BufferSize, Registers, Sn};

let mut w5500 = W5500::new(spi);
w5500.set_sn_txbuf_size(Sn::Sn0, BufferSize::KB1)?;
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fn sn_tx_fsr(&mut self, sn: Sn) -> Result<u16, Self::Error>

Get transmit buffer free size.

This register indicates the free size of socket n TX buffer. It is initialized to the configured size by Registers::sn_txbuf_size. Data bigger than Sn_TX_FSR should not be written to the TX buffer to prevent buffer overflow.

Check this register before writing data to the socket TX buffer, and if data is equal or smaller than its checked size, transmit the data with the SocketCommand::Send or SocketCommand::SendMac command after saving the data in Socket n TX buffer.

If data is bigger than its checked size, transmit the data after dividing into the checked size and saving in the socket TX buffer.

If Registers::sn_mr is not in TCP mode, this register is automatically calculated as the difference between Registers::sn_tx_wr and Registers::sn_tx_rd.

If Registers::sn_mr is in TCP mode, this register is automatically calculated as the difference between the internal ACK pointer which indicates the point of data is received already by the connected peer.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketMode};

let mut w5500 = W5500::new(spi);
let sn_tx_fsr: u16 = w5500.sn_tx_fsr(Sn::Sn0)?;
source

fn sn_tx_rd(&mut self, sn: Sn) -> Result<u16, Self::Error>

Get the socket TX read pointer.

This register is initialized by the SocketCommand::Open command. However, in TCP mode, this is re-initialized while connecting with TCP.

After initialization, this is auto-increased by the SocketCommand::Send command.

The SocketCommand::Send command transmits the saved data from the current Registers::sn_tx_rd to the Registers::sn_tx_wr in the socket n TX buffer. After transmitting the saved data, the SocketCommand::Send command increases Registers::sn_tx_rd the as same as Registers::sn_tx_wr.

If its increment value exceeds the maximum value 0xFFFF, (greater than 0x10000 and the carry bit occurs), then the carry bit is ignored and will automatically update with the lower 16 bits value.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketMode};

let mut w5500 = W5500::new(spi);
let sn_tx_rd: u16 = w5500.sn_tx_rd(Sn::Sn0)?;
source

fn sn_tx_wr(&mut self, sn: Sn) -> Result<u16, Self::Error>

Get the socket TX write pointer.

This register is initialized by the SocketCommand::Open command. However, in TCP mode, this is re-initialized while connecting with TCP.

This should be updated as follows:

  1. Read the starting address for transmitting data.
  2. Write data to the socket TX buffer buffer.
  3. Update this register by the number of bytes written to the TX buffer. Allow wrapping to occur upon u16 overflow.
  4. Transmit the saved data in the socket TX buffer by using the SocketCommand::Send command.

See Registers::set_sn_tx_buf for an additional example.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
let sn_tx_wr: u16 = w5500.sn_tx_wr(Sn::Sn0)?;
source

fn set_sn_tx_wr(&mut self, sn: Sn, ptr: u16) -> Result<(), Self::Error>

Set the socket TX write pointer.

See Registers::sn_tx_wr for more information.

See Registers::set_sn_tx_buf for an example.

source

fn sn_tx_ptrs(&mut self, sn: Sn) -> Result<TxPtrs, Self::Error>

Get the socket TX free size and write pointer

This is equivalent to Registers::sn_tx_fsr and Registers::sn_tx_wr in a single read transaction.

source

fn sn_rx_rsr(&mut self, sn: Sn) -> Result<u16, Self::Error>

Get the socket received data size.

This register indicates the data size received and saved in the socket RX buffer. This register does not exceed the configured size (Registers::set_sn_rxbuf_size) and is calculated as the difference between Registers::sn_rx_wr and Registers::sn_rx_rd.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
let sn_rx_rsr: u16 = w5500.sn_rx_rsr(Sn::Sn0)?;
source

fn sn_rx_rd(&mut self, sn: Sn) -> Result<u16, Self::Error>

Get the socket read data pointer.

This register is initialized by the SocketCommand::Open command.

This should be updated as follows:

  1. Read the starting address for reading data.
  2. Read from the socket RX buffer.
  3. Update this register by the number of bytes read from the RX buffer. Allow wrapping to occur upon u16 overflow.
  4. Send a SocketCommand::Recv command to notify the W5500 of the retrieved data.

See Registers::sn_rx_buf for an additional example.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
let sn_rx_rd: u16 = w5500.sn_rx_rd(Sn::Sn0)?;
source

fn set_sn_rx_rd(&mut self, sn: Sn, ptr: u16) -> Result<(), Self::Error>

Set the socket read data pointer.

See Registers::sn_rx_rd for more information. See Registers::sn_rx_buf for an example.

source

fn sn_rx_wr(&mut self, sn: Sn) -> Result<u16, Self::Error>

Get the socket RX write pointer.

This register is initialized by the SocketCommand::Open command, and it is auto-incremented by hardware.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
let sn_rx_wr: u16 = w5500.sn_rx_wr(Sn::Sn0)?;
source

fn sn_rx_ptrs(&mut self, sn: Sn) -> Result<RxPtrs, Self::Error>

Get the socket RX recieved size size and write pointer

This is equivalent to Registers::sn_rx_rsr and Registers::sn_rx_rd in a single read transaction.

source

fn sn_imr(&mut self, sn: Sn) -> Result<SocketInterruptMask, Self::Error>

Get the socket interrupt mask.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketInterruptMask};

let mut w5500 = W5500::new(spi);
let sn_imr: SocketInterruptMask = w5500.sn_imr(Sn::Sn0)?;
assert_eq!(sn_imr, SocketInterruptMask::default());
source

fn set_sn_imr( &mut self, sn: Sn, mask: SocketInterruptMask ) -> Result<(), Self::Error>

Set the socket interrupt mask.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketInterruptMask};

let mut w5500 = W5500::new(spi);
w5500.set_sn_imr(Sn::Sn0, SocketInterruptMask::ALL_MASKED)?;
source

fn sn_frag(&mut self, sn: Sn) -> Result<u16, Self::Error>

Get the socket fragment.

This configures the fragment field in the IP header.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
let frag: u16 = w5500.sn_frag(Sn::Sn0)?;
assert_eq!(frag, 0x4000);
source

fn set_sn_frag(&mut self, sn: Sn, frag: u16) -> Result<(), Self::Error>

Set the socket fragment.

See Registers::sn_frag for more information.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
w5500.set_sn_frag(Sn::Sn0, 0)?;
source

fn sn_kpalvtr(&mut self, sn: Sn) -> Result<u8, Self::Error>

Get the socket keep alive time.

This register configures the transmitting timer of the keep alive (KA) packet for the socket. This is valid only in TCP mode, and is ignored in all other modes.

The time unit is 5 seconds.

The KA packet is transmittable after Registers::sn_sr is changed to SocketStatus::Established and after the data is transmitted or received to/from a peer at least once.

In the case of a non-zero keep alive value the W5500 automatically transmits a KA packet after time-period for checking the TCP connection (automatic-keepalive-process).

In case of a zero keep alive value, the keep alive packet can be transmitted with SocketCommand::SendKeep. This command is ignored for non-zero keep alive values.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
let sn_kpalvtr: u8 = w5500.sn_kpalvtr(Sn::Sn0)?;
source

fn set_sn_kpalvtr(&mut self, sn: Sn, kpalvtr: u8) -> Result<(), Self::Error>

Set the socket keep alive time.

See Registers::sn_kpalvtr for more information.

Example
use w5500_ll::{eh1::vdm::W5500, Registers, Sn};

let mut w5500 = W5500::new(spi);
// 50s keep alive timer
w5500.set_sn_kpalvtr(Sn::Sn0, 10)?;
source

fn set_sn_tx_buf( &mut self, sn: Sn, ptr: u16, buf: &[u8] ) -> Result<(), Self::Error>

Write the socket TX buffer.

Example
use core::cmp::min;
use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketCommand};

// the socket should already be opened at this point
const THE_SOCKET: Sn = Sn::Sn0;

let buf: [u8; 5] = [0x12, 0x34, 0x56, 0x78, 0x9A];

// transmit as many bytes as possible
// for large buffers this may not transmit all the available data
let tx_bytes: u16 = {
    min(w5500.sn_tx_fsr(THE_SOCKET)?, u16::try_from(buf.len()).unwrap_or(u16::MAX))
};
if tx_bytes == 0 {
    return Ok(());
}

let ptr: u16 = w5500.sn_tx_wr(THE_SOCKET)?;
w5500.set_sn_tx_buf(THE_SOCKET, ptr, &buf[..usize::from(tx_bytes)])?;
w5500.set_sn_tx_wr(THE_SOCKET, ptr.wrapping_add(tx_bytes))?;
w5500.set_sn_cr(THE_SOCKET, SocketCommand::Send)?;
source

fn sn_tx_buf( &mut self, sn: Sn, ptr: u16, buf: &mut [u8] ) -> Result<(), Self::Error>

Read the socket TX buffer.

This method is typically unused; there are very few use cases that require reading the TX buffer.

Example
use core::cmp::min;
use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketCommand};
let mut buf: [u8; 1] = [0];
w5500.sn_tx_buf(Sn::Sn0, 0, &mut buf)?;
source

fn sn_rx_buf( &mut self, sn: Sn, ptr: u16, buf: &mut [u8] ) -> Result<(), Self::Error>

Read the socket RX buffer.

Example
use core::cmp::min;
use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketCommand};

// the socket should already be opened at this point
// a socket interrupt will indicate there is data to be retrieved
const THE_SOCKET: Sn = Sn::Sn0;

// in reality you will need a larger buffer for most protocols
const BUF_LEN: usize = 16;
let mut buf: [u8; BUF_LEN] = [0; BUF_LEN];

let rx_bytes: u16 = {
    min(w5500.sn_rx_rsr(THE_SOCKET)?, u16::try_from(buf.len()).unwrap_or(u16::MAX))
};
if rx_bytes == 0 {
    return Ok(());
}

let ptr: u16 = w5500.sn_rx_rd(THE_SOCKET)?;
w5500.sn_rx_buf(THE_SOCKET, ptr, &mut buf[..usize::from(rx_bytes)])?;
w5500.set_sn_rx_rd(THE_SOCKET, ptr.wrapping_add(rx_bytes))?;
w5500.set_sn_cr(THE_SOCKET, SocketCommand::Recv)?;
source

fn set_sn_rx_buf( &mut self, sn: Sn, ptr: u16, buf: &[u8] ) -> Result<(), Self::Error>

Write the socket RX buffer.

This method is typically unused; there are very few use cases that require writing the RX buffer.

Example
use core::cmp::min;
use w5500_ll::{eh1::vdm::W5500, Registers, Sn, SocketCommand};
let buf: [u8; 1] = [0];
w5500.set_sn_rx_buf(Sn::Sn0, 0, &buf)?;

Object Safety§

This trait is not object safe.

Implementors§

source§

impl<SPI> Registers for w5500_ll::eh1::fdm::W5500<SPI>where SPI: SpiBus<u8>,

Available on crate feature eh1 only.
§

type Error = <SPI as ErrorType>::Error

source§

impl<SPI> Registers for w5500_ll::eh1::vdm::W5500<SPI>where SPI: SpiDevice,

Available on crate feature eh1 only.
§

type Error = <SPI as ErrorType>::Error

source§

impl<SPI, CS> Registers for w5500_ll::eh0::vdm_infallible::W5500<SPI, CS>where SPI: Transfer<u8, Error = Infallible> + Write<u8, Error = Infallible>, CS: OutputPin<Error = Infallible>,

Available on crate feature eh0 only.
§

type Error = Infallible

source§

impl<SPI, CS, SpiError> Registers for w5500_ll::eh0::vdm_infallible_gpio::W5500<SPI, CS>where SPI: Transfer<u8, Error = SpiError> + Write<u8, Error = SpiError>, CS: OutputPin<Error = Infallible>,

Available on crate feature eh0 only.
§

type Error = SpiError

source§

impl<SPI, CS, SpiError, PinError> Registers for w5500_ll::eh0::vdm::W5500<SPI, CS>where SPI: Transfer<u8, Error = SpiError> + Write<u8, Error = SpiError>, CS: OutputPin<Error = PinError>,

Available on crate feature eh0 only.
§

type Error = Error<SpiError, PinError>

source§

impl<SPI, SpiError> Registers for w5500_ll::eh0::fdm::W5500<SPI>where SPI: Transfer<u8, Error = SpiError> + Write<u8, Error = SpiError>,

Available on crate feature eh0 only.
§

type Error = SpiError