use crate::spi::{vdm_header, AccessMode};
use embedded_hal::digital::v2::OutputPin;
#[derive(Debug)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
pub struct W5500<SPI, CS> {
spi: SPI,
cs: CS,
}
impl<SPI, CS, SpiError> W5500<SPI, CS>
where
SPI: embedded_hal::blocking::spi::Transfer<u8, Error = SpiError>
+ embedded_hal::blocking::spi::Write<u8, Error = SpiError>,
CS: OutputPin<Error = core::convert::Infallible>,
{
pub fn new(spi: SPI, cs: CS) -> Self {
W5500 { spi, cs }
}
pub fn free(self) -> (SPI, CS) {
(self.spi, self.cs)
}
#[inline]
fn with_chip_enable<T, F>(&mut self, mut f: F) -> Result<T, SpiError>
where
F: FnMut(&mut SPI) -> Result<T, SpiError>,
{
self.cs.set_low().unwrap();
let result = f(&mut self.spi);
self.cs.set_high().unwrap();
result
}
}
impl<SPI, CS, SpiError> crate::Registers for W5500<SPI, CS>
where
SPI: embedded_hal::blocking::spi::Transfer<u8, Error = SpiError>
+ embedded_hal::blocking::spi::Write<u8, Error = SpiError>,
CS: OutputPin<Error = core::convert::Infallible>,
{
type Error = SpiError;
#[inline]
fn read(&mut self, address: u16, block: u8, data: &mut [u8]) -> Result<(), Self::Error> {
let header = vdm_header(address, block, AccessMode::Read);
self.with_chip_enable(|spi| {
spi.write(&header)?;
spi.transfer(data)?;
Ok(())
})
}
#[inline]
fn write(&mut self, address: u16, block: u8, data: &[u8]) -> Result<(), Self::Error> {
let header = vdm_header(address, block, AccessMode::Write);
self.with_chip_enable(|spi| {
spi.write(&header)?;
spi.write(data)?;
Ok(())
})
}
}